* [PATCH 0/3] crypto: xilinx: Map PLM error codes to Linux error
@ 2026-07-06 11:02 Harsh Jain
2026-07-06 11:02 ` [PATCH 1/3] firmware: xilinx: Rephrase documentation of aes API Harsh Jain
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Harsh Jain @ 2026-07-06 11:02 UTC (permalink / raw)
To: herbert, davem, linux-crypto, sarat.chand.savitala, michal.simek,
linux-arm-kernel
Cc: Harsh Jain
Update versal firmware API's to map GCM engine error code to Linux
error code.
Harsh Jain (3):
firmware: xilinx: Rephrase documentation of aes API
firmware: xilinx: Update AES PM-APIs to capture PLM error codes
crypto: xilinx: zynqmp-aes-gcm: Send firmware decoded code instead of
EBADMSG
drivers/crypto/xilinx/zynqmp-aes-gcm.c | 4 +-
drivers/firmware/xilinx/zynqmp-crypto.c | 115 ++++++++++++++++++------
2 files changed, 90 insertions(+), 29 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/3] firmware: xilinx: Rephrase documentation of aes API
2026-07-06 11:02 [PATCH 0/3] crypto: xilinx: Map PLM error codes to Linux error Harsh Jain
@ 2026-07-06 11:02 ` Harsh Jain
2026-07-06 11:02 ` [PATCH 2/3] firmware: xilinx: Update AES PM-APIs to capture PLM error codes Harsh Jain
2026-07-06 11:02 ` [PATCH 3/3] crypto: xilinx: zynqmp-aes-gcm: Send firmware decoded code instead of EBADMSG Harsh Jain
2 siblings, 0 replies; 4+ messages in thread
From: Harsh Jain @ 2026-07-06 11:02 UTC (permalink / raw)
To: herbert, davem, linux-crypto, sarat.chand.savitala, michal.simek,
linux-arm-kernel
Cc: Harsh Jain
Update aes API documentation to remove "+reason" string
Signed-off-by: Harsh Jain <h.jain@amd.com>
---
drivers/firmware/xilinx/zynqmp-crypto.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/xilinx/zynqmp-crypto.c b/drivers/firmware/xilinx/zynqmp-crypto.c
index f06f1e2f67b8..9ffa14d83377 100644
--- a/drivers/firmware/xilinx/zynqmp-crypto.c
+++ b/drivers/firmware/xilinx/zynqmp-crypto.c
@@ -132,7 +132,7 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_key_zero);
*
* This function provides support to init AES operation.
*
- * Return: Returns status, either success or error+reason
+ * Return: Returns status, either success or error code.
*/
int versal_pm_aes_op_init(const u64 hw_req)
{
@@ -229,7 +229,7 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_dec_final);
*
* This function initialise AES block.
*
- * Return: Returns status, either success or error+reason
+ * Return: Returns status, either success or error code.
*/
int versal_pm_aes_init(void)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] firmware: xilinx: Update AES PM-APIs to capture PLM error codes
2026-07-06 11:02 [PATCH 0/3] crypto: xilinx: Map PLM error codes to Linux error Harsh Jain
2026-07-06 11:02 ` [PATCH 1/3] firmware: xilinx: Rephrase documentation of aes API Harsh Jain
@ 2026-07-06 11:02 ` Harsh Jain
2026-07-06 11:02 ` [PATCH 3/3] crypto: xilinx: zynqmp-aes-gcm: Send firmware decoded code instead of EBADMSG Harsh Jain
2 siblings, 0 replies; 4+ messages in thread
From: Harsh Jain @ 2026-07-06 11:02 UTC (permalink / raw)
To: herbert, davem, linux-crypto, sarat.chand.savitala, michal.simek,
linux-arm-kernel
Cc: Harsh Jain
GCM engine in PLM has algorithm specific error code which currently not
handled in firmware code.
Update AES PM-API functions to convert engine error to Linux
error codes.
Signed-off-by: Harsh Jain <h.jain@amd.com>
---
drivers/firmware/xilinx/zynqmp-crypto.c | 111 +++++++++++++++++++-----
1 file changed, 87 insertions(+), 24 deletions(-)
diff --git a/drivers/firmware/xilinx/zynqmp-crypto.c b/drivers/firmware/xilinx/zynqmp-crypto.c
index 9ffa14d83377..5aba5a2fee7a 100644
--- a/drivers/firmware/xilinx/zynqmp-crypto.c
+++ b/drivers/firmware/xilinx/zynqmp-crypto.c
@@ -9,6 +9,39 @@
#include <linux/firmware/xlnx-zynqmp.h>
#include <linux/module.h>
+#define VERSAL_AES_GCM_TAG_MISMATCH 0x40
+#define VERSAL_AES_INVALID_PARAM 0x51
+#define VERSAL_AES_ZERO_PUF_KEY_NOT_ALLOWED 0x5b
+#define VERSAL_AES_UNALIGNED_SIZE_ERROR 0x5c
+
+static int versal_aes_status_to_errno(u32 status)
+{
+ switch (status) {
+ case VERSAL_AES_INVALID_PARAM:
+ pr_err("Xilinx AES: invalid parameter\n");
+ return -EINVAL;
+ case VERSAL_AES_GCM_TAG_MISMATCH:
+ return -EBADMSG;
+ case VERSAL_AES_UNALIGNED_SIZE_ERROR:
+ pr_err("Xilinx AES: unaligned size error\n");
+ return -EINVAL;
+ case VERSAL_AES_ZERO_PUF_KEY_NOT_ALLOWED:
+ pr_err("Xilinx AES: zero PUF key not allowed\n");
+ return -EINVAL;
+ default:
+ pr_err("Xilinx AES: unknown firmware error code: %u\n", status);
+ return -EINVAL;
+ }
+}
+
+static int versal_aes_ret_status(int ret, u32 fw_status)
+{
+ if (ret && fw_status)
+ return versal_aes_status_to_errno(fw_status);
+
+ return ret;
+}
+
/**
* zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
* AES-GCM core.
@@ -136,9 +169,14 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_key_zero);
*/
int versal_pm_aes_op_init(const u64 hw_req)
{
- return zynqmp_pm_invoke_fn(XSECURE_API_AES_OP_INIT, NULL, 2,
- lower_32_bits(hw_req),
- upper_32_bits(hw_req));
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_AES_OP_INIT, ret_payload, 2,
+ lower_32_bits(hw_req),
+ upper_32_bits(hw_req));
+
+ return versal_aes_ret_status(ret, ret_payload[0]);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_op_init);
@@ -149,14 +187,19 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_op_init);
*
* This function provides support to update AAD data.
*
- * Return: Returns status, either success or error+reason
+ * Return: Returns status, either success or error code.
*/
int versal_pm_aes_update_aad(const u64 aad_addr, const u32 aad_len)
{
- return zynqmp_pm_invoke_fn(XSECURE_API_AES_UPDATE_AAD, NULL, 3,
- lower_32_bits(aad_addr),
- upper_32_bits(aad_addr),
- aad_len);
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_AES_UPDATE_AAD, ret_payload, 3,
+ lower_32_bits(aad_addr),
+ upper_32_bits(aad_addr),
+ aad_len);
+
+ return versal_aes_ret_status(ret, ret_payload[0]);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_update_aad);
@@ -170,11 +213,16 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_update_aad);
*/
int versal_pm_aes_enc_update(const u64 in_params, const u64 in_addr)
{
- return zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_UPDATE, NULL, 4,
- lower_32_bits(in_params),
- upper_32_bits(in_params),
- lower_32_bits(in_addr),
- upper_32_bits(in_addr));
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_UPDATE, ret_payload, 4,
+ lower_32_bits(in_params),
+ upper_32_bits(in_params),
+ lower_32_bits(in_addr),
+ upper_32_bits(in_addr));
+
+ return versal_aes_ret_status(ret, ret_payload[0]);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_enc_update);
@@ -186,9 +234,14 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_enc_update);
*/
int versal_pm_aes_enc_final(const u64 gcm_addr)
{
- return zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_FINAL, NULL, 2,
- lower_32_bits(gcm_addr),
- upper_32_bits(gcm_addr));
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_FINAL, ret_payload, 2,
+ lower_32_bits(gcm_addr),
+ upper_32_bits(gcm_addr));
+
+ return versal_aes_ret_status(ret, ret_payload[0]);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_enc_final);
@@ -202,11 +255,16 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_enc_final);
*/
int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr)
{
- return zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_UPDATE, NULL, 4,
- lower_32_bits(in_params),
- upper_32_bits(in_params),
- lower_32_bits(in_addr),
- upper_32_bits(in_addr));
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_UPDATE, ret_payload, 4,
+ lower_32_bits(in_params),
+ upper_32_bits(in_params),
+ lower_32_bits(in_addr),
+ upper_32_bits(in_addr));
+
+ return versal_aes_ret_status(ret, ret_payload[0]);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_dec_update);
@@ -218,9 +276,14 @@ EXPORT_SYMBOL_GPL(versal_pm_aes_dec_update);
*/
int versal_pm_aes_dec_final(const u64 gcm_addr)
{
- return zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_FINAL, NULL, 2,
- lower_32_bits(gcm_addr),
- upper_32_bits(gcm_addr));
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_FINAL, ret_payload, 2,
+ lower_32_bits(gcm_addr),
+ upper_32_bits(gcm_addr));
+
+ return versal_aes_ret_status(ret, ret_payload[0]);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_dec_final);
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] crypto: xilinx: zynqmp-aes-gcm: Send firmware decoded code instead of EBADMSG
2026-07-06 11:02 [PATCH 0/3] crypto: xilinx: Map PLM error codes to Linux error Harsh Jain
2026-07-06 11:02 ` [PATCH 1/3] firmware: xilinx: Rephrase documentation of aes API Harsh Jain
2026-07-06 11:02 ` [PATCH 2/3] firmware: xilinx: Update AES PM-APIs to capture PLM error codes Harsh Jain
@ 2026-07-06 11:02 ` Harsh Jain
2 siblings, 0 replies; 4+ messages in thread
From: Harsh Jain @ 2026-07-06 11:02 UTC (permalink / raw)
To: herbert, davem, linux-crypto, sarat.chand.savitala, michal.simek,
linux-arm-kernel
Cc: Harsh Jain
Currently Failure in GCM AES decrypt is converted to -EBADMSG ignoring
actual firmware error code.
Update driver to send firmware reported error code.
Signed-off-by: Harsh Jain <h.jain@amd.com>
---
drivers/crypto/xilinx/zynqmp-aes-gcm.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/crypto/xilinx/zynqmp-aes-gcm.c b/drivers/crypto/xilinx/zynqmp-aes-gcm.c
index 2421bf30556d..7fcdd56f9046 100644
--- a/drivers/crypto/xilinx/zynqmp-aes-gcm.c
+++ b/drivers/crypto/xilinx/zynqmp-aes-gcm.c
@@ -344,10 +344,8 @@ static int versal_aes_aead_cipher(struct aead_request *req)
goto clearkey;
ret = versal_pm_aes_dec_final(dma_addr_data + gcm_offset);
- if (ret) {
- ret = -EBADMSG;
+ if (ret)
goto clearkey;
- }
}
dma_unmap_single(dev, dma_addr_data, kbuf_size, DMA_BIDIRECTIONAL);
dma_unmap_single(dev, dma_addr_hw_req, dmabuf_size, DMA_BIDIRECTIONAL);
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
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2026-07-06 11:02 [PATCH 0/3] crypto: xilinx: Map PLM error codes to Linux error Harsh Jain
2026-07-06 11:02 ` [PATCH 1/3] firmware: xilinx: Rephrase documentation of aes API Harsh Jain
2026-07-06 11:02 ` [PATCH 2/3] firmware: xilinx: Update AES PM-APIs to capture PLM error codes Harsh Jain
2026-07-06 11:02 ` [PATCH 3/3] crypto: xilinx: zynqmp-aes-gcm: Send firmware decoded code instead of EBADMSG Harsh Jain
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