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From: Vladimir Murzin <vladimir.murzin@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, maz@kernel.org, will@kernel.org,
	catalin.marinas@arm.com, ruanjinjie@huawei.com,
	liaochang1@huawei.com
Subject: [RFC PATCH v2 38/45] arm64: smp: Abstract SGI and LPI operations
Date: Mon, 27 Jul 2026 17:34:46 +0100	[thread overview]
Message-ID: <20260727163453.7969-39-vladimir.murzin@arm.com> (raw)
In-Reply-To: <20260727163453.7969-1-vladimir.murzin@arm.com>

SGI and LPI backed IPIs require different setup, enable, disable and
send operations. These differences are currently handled by repeatedly
checking percpu_ipi_descs. As the implementation specific logic grows,
these checks make the common IPI code increasingly difficult to
follow.

Introduce an operations structure for each implementation to
encapsulate the specific of SGI and LPI handling, leaving the common
IPI paths generic.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
 arch/arm64/kernel/smp.c | 163 +++++++++++++++++++++++++---------------
 1 file changed, 101 insertions(+), 62 deletions(-)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 6e5b673613ca..3dd4bc02caed 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -75,11 +75,18 @@ static DEFINE_PER_CPU_READ_MOSTLY(struct ipi_descs, pcpu_ipi_desc);
 
 #define get_ipi_desc(__cpu, __ipi) (per_cpu_ptr(&pcpu_ipi_desc, __cpu)->descs[__ipi])
 
-static bool percpu_ipi_descs __ro_after_init;
+struct ipi_irq_ops {
+	void (*setup)(int ipi, int ncpus);
+	void (*disable)(int cpu, int ipi);
+	void (*enable)(int cpu, int ipi);
+	void (*send)(const cpumask_t *mask, unsigned int nr);
+};
+
+static const struct ipi_irq_ops *ipi_ops __ro_after_init;
 
 static bool crash_stop;
 
-static void ipi_setup(int cpu);
+static void ipi_enable(int cpu);
 
 #ifdef CONFIG_HOTPLUG_CPU
 static void ipi_teardown(int cpu);
@@ -240,7 +247,7 @@ asmlinkage notrace void secondary_start_kernel(void)
 	 */
 	notify_cpu_starting(cpu);
 
-	ipi_setup(cpu);
+	ipi_enable(cpu);
 
 	numa_add_cpu(cpu);
 
@@ -916,13 +923,7 @@ static void __noreturn ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs
 
 static void arm64_send_ipi(const cpumask_t *mask, unsigned int nr)
 {
-	unsigned int cpu;
-
-	if (!percpu_ipi_descs)
-		__ipi_send_mask(get_ipi_desc(0, nr), mask);
-	else
-		for_each_cpu(cpu, mask)
-			__ipi_send_single(get_ipi_desc(cpu, nr), cpu);
+	ipi_ops->send(mask, nr);
 }
 
 static void arm64_backtrace_ipi(cpumask_t *mask)
@@ -1048,53 +1049,13 @@ static bool ipi_should_be_nmi(enum ipi_msg_type ipi)
 	}
 }
 
-static void ipi_setup(int cpu)
-{
-	int i;
-
-	if (WARN_ON_ONCE(!ipi_irq_base))
-		return;
-
-	for (i = 0; i < nr_ipi; i++) {
-		if (!percpu_ipi_descs) {
-			if (ipi_should_be_nmi(i)) {
-				prepare_percpu_nmi(ipi_irq_base + i);
-				enable_percpu_nmi(ipi_irq_base + i, 0);
-			} else {
-				enable_percpu_irq(ipi_irq_base + i, 0);
-			}
-		} else {
-			enable_irq(irq_desc_get_irq(get_ipi_desc(cpu, i)));
-		}
-	}
-}
-
-#ifdef CONFIG_HOTPLUG_CPU
-static void ipi_teardown(int cpu)
+static void ipi_sgi_setup(int ipi, int ncpus)
 {
-	int i;
+	int err, irq, cpu;
 
-	if (WARN_ON_ONCE(!ipi_irq_base))
+	if (WARN_ON_ONCE(ncpus))
 		return;
 
-	for (i = 0; i < nr_ipi; i++) {
-		if (!percpu_ipi_descs) {
-			if (ipi_should_be_nmi(i)) {
-				disable_percpu_nmi(ipi_irq_base + i);
-				teardown_percpu_nmi(ipi_irq_base + i);
-			} else {
-				disable_percpu_irq(ipi_irq_base + i);
-			}
-		} else {
-			disable_irq(irq_desc_get_irq(get_ipi_desc(cpu, i)));
-		}
-	}
-}
-#endif
-
-static void ipi_setup_sgi(int ipi)
-{
-	int err, irq, cpu;
 
 	irq = ipi_irq_base + ipi;
 
@@ -1112,7 +1073,50 @@ static void ipi_setup_sgi(int ipi)
 	irq_set_status_flags(irq, IRQ_HIDDEN);
 }
 
-static void ipi_setup_lpi(int ipi, int ncpus)
+static void ipi_sgi_enable(int cpu, int ipi)
+{
+	if (ipi_should_be_nmi(ipi)) {
+		prepare_percpu_nmi(ipi_irq_base + ipi);
+		enable_percpu_nmi(ipi_irq_base + ipi, 0);
+	} else {
+		enable_percpu_irq(ipi_irq_base + ipi, 0);
+	}
+}
+
+static void ipi_sgi_disable(int cpu, int ipi)
+{
+	if (ipi_should_be_nmi(ipi)) {
+		disable_percpu_nmi(ipi_irq_base + ipi);
+		teardown_percpu_nmi(ipi_irq_base + ipi);
+	} else {
+		disable_percpu_irq(ipi_irq_base + ipi);
+	}
+}
+
+static void ipi_sgi_send(const cpumask_t *mask, unsigned int nr)
+{
+	__ipi_send_mask(get_ipi_desc(0, nr), mask);
+}
+
+static const struct ipi_irq_ops ipi_sgi_ops = {
+	.disable = ipi_sgi_disable,
+	.enable = ipi_sgi_enable,
+	.setup = ipi_sgi_setup,
+	.send = ipi_sgi_send,
+};
+
+
+static void ipi_lpi_enable(int cpu, int ipi)
+{
+	enable_irq(irq_desc_get_irq(get_ipi_desc(cpu, ipi)));
+}
+
+static void ipi_lpi_disable(int cpu, int ipi)
+{
+	disable_irq(irq_desc_get_irq(get_ipi_desc(cpu, ipi)));
+}
+
+static void ipi_lpi_setup(int ipi, int ncpus)
 {
 	for (int cpu = 0; cpu < ncpus; cpu++) {
 		int err, irq;
@@ -1132,6 +1136,44 @@ static void ipi_setup_lpi(int ipi, int ncpus)
 	}
 }
 
+static void ipi_lpi_send(const cpumask_t *mask, unsigned int nr) {
+	int cpu;
+
+	for_each_cpu(cpu, mask)
+		__ipi_send_single(get_ipi_desc(cpu, nr), cpu);
+}
+
+static const struct ipi_irq_ops ipi_lpi_ops = {
+	.disable = ipi_lpi_disable,
+	.enable = ipi_lpi_enable,
+	.setup = ipi_lpi_setup,
+	.send = ipi_lpi_send,
+};
+
+static void ipi_enable(int cpu)
+{
+	int ipi;
+
+	if (WARN_ON_ONCE(!ipi_irq_base))
+		return;
+
+	for (ipi = 0; ipi < nr_ipi; ipi++)
+		ipi_ops->enable(cpu, ipi);
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+static void ipi_teardown(int cpu)
+{
+	int ipi;
+
+	if (WARN_ON_ONCE(!ipi_irq_base))
+		return;
+
+	for (ipi = 0; ipi < nr_ipi; ipi++)
+		ipi_ops->disable(cpu, ipi);
+}
+#endif
+
 void __init set_smp_ipi_range_percpu(int ipi_base, int n, int ncpus)
 {
 	int i;
@@ -1139,18 +1181,15 @@ void __init set_smp_ipi_range_percpu(int ipi_base, int n, int ncpus)
 	WARN_ON(n < MAX_IPI);
 	nr_ipi = min(n, MAX_IPI);
 
-	percpu_ipi_descs = !!ncpus;
 	ipi_irq_base = ipi_base;
 
-	for (i = 0; i < nr_ipi; i++) {
-		if (!percpu_ipi_descs)
-			ipi_setup_sgi(i);
-		else
-			ipi_setup_lpi(i, ncpus);
-	}
+	ipi_ops = ncpus ? &ipi_lpi_ops : &ipi_sgi_ops;
+
+	for (i = 0; i < nr_ipi; i++)
+		ipi_ops->setup(i, ncpus);
 
 	/* Setup the boot CPU immediately */
-	ipi_setup(smp_processor_id());
+	ipi_enable(smp_processor_id());
 }
 
 void arch_smp_send_reschedule(int cpu)
-- 
2.34.1



  parent reply	other threads:[~2026-07-27 16:38 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-27 16:34 [RFC PATCH v2 00/45] arm64: Add support for FEAT_NMI Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 01/45] arm64: ptrace: Remove INIT_PSTATE_EL2 Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 02/45] arm64: debug: don't mask DAIF for mdscr_write() Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 03/45] arm64: hibernate: mask DAIF before restoring hibernated kernel Vladimir Murzin
2026-07-28  1:17   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 04/45] arm64: hibernate: Restore DAIF state on error Vladimir Murzin
2026-07-28  1:16   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 05/45] arm64: suspend: rely on daif helpers to handle PMR Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 06/45] arm64: suspend: Initialize PMR on resume Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 07/45] arm64: entry: mask DAIF before returning from C EL1 handlers Vladimir Murzin
2026-07-28  2:00   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 08/45] irqchip/gic-v3: make the unmasking of pseudo-NMIs explicit when handling IRQs Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 09/45] arm64: entry: Avoid unnecessary local_irq_disable() on kernel exit Vladimir Murzin
2026-07-28  3:18   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 10/45] arm64: irqflags: Introduce arm64-specific irqflags type Vladimir Murzin
2026-07-28  2:42   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 11/45] arm64: irqflags: save and use both DAIF and PMR Vladimir Murzin
2026-07-28  3:46   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 12/45] arm64: interrupts: Add common exception state helpers Vladimir Murzin
2026-07-28  8:20   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 13/45] arm64: process: Use helper to check exception state Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 14/45] arm64: entry: Introduce entry specific exception masking helpers Vladimir Murzin
2026-07-28  8:48   ` Jinjie Ruan
2026-07-28  9:18   ` Jinjie Ruan
2026-07-28  9:29   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 15/45] arm64: entry: replace DAIF helpers with entry helpers Vladimir Murzin
2026-07-28  9:53   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 16/45] arm64: interrupts: Introduce exception masking save/restore helpers Vladimir Murzin
2026-07-28 11:56   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 17/45] arm64: interrupts: introduce a helper for GIC priority initialization Vladimir Murzin
2026-07-28 11:21   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 18/45] arm64: replace local_daif helpers Vladimir Murzin
2026-07-28 12:04   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 19/45] arm64: cpuidle: use new helpers to bypass interrupt priority masking Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 20/45] arm64: remove daifflags.h Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 21/45] arm64: gicv3: remove GIC_PRIO_PSR_I_SET Vladimir Murzin
2026-07-28 12:08   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 22/45] arm64: cpufeature: Remove system_has_prio_mask_debugging() Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 23/45] arm64: irqflags: Switch to CONFIG_DEBUG_IRQFLAGS Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 24/45] arm64: Kconfig: Remove CONFIG_ARM64_DEBUG_PRIORITY_MASKING Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 25/45] efi/runtime-wrappers: Permit architectures to override IRQ flags checks Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 26/45] arm64/efi: Implement override for " Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 27/45] arm64: booting: Document boot requirements for FEAT_NMI Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 28/45] arm64: sysreg: Add definitions for immediate versions of MSR ALLINT Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 29/45] arm64: ptrace: Add PSR_ALLINT_BIT Vladimir Murzin
2026-07-28  3:58   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 30/45] arm64: idreg: Add an override for FEAT_NMI Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 31/45] arm64: cpufeature: Detect PE support " Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 32/45] arm64: nmi: Manage masking for superpriority interrupts Vladimir Murzin
2026-07-28 12:14   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 33/45] arm64: irq: Report FEAT_NMI masking local IRQs Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 34/45] arm64: nmi: Add handling of superpriority interrupts as NMIs Vladimir Murzin
2026-07-28 12:25   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 35/45] arm64: suspend: Always initialise PSTATE.ALLINT Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 36/45] arm64/efi: Add ALLINT to IRQ flags checks Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 37/45] arm64: kprobes: Disable NMIs Vladimir Murzin
2026-07-27 16:34 ` Vladimir Murzin [this message]
2026-07-27 16:34 ` [RFC PATCH v2 39/45] arm64: smp: Fall back to IRQ when IPI NMI request fails Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 40/45] arm64: nmi: Add Kconfig for NMI Vladimir Murzin
2026-07-28  6:24   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 41/45] irqchip/gic-v3: Prepare for FEAT_GICv3_NMI support Vladimir Murzin
2026-07-28 12:29   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 42/45] irqchip/gic-v3: Implement " Vladimir Murzin
2026-07-28 12:31   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 43/45] arm64: smp: Add NMI support for LPI-backed IPIs Vladimir Murzin
2026-07-28 12:34   ` Jinjie Ruan
2026-07-27 16:34 ` [RFC PATCH v2 44/45] irqchip/gic-v5: Add NMI support for PPIs, SPIs and LPIs Vladimir Murzin
2026-07-27 16:34 ` [RFC PATCH v2 45/45] irqchip/gic-v5: Add NMI support for IPIs Vladimir Murzin

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