From: Colin Huang via B4 Relay <devnull+u8813345.gmail.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
colin.huang2@amd.com, Colin Huang <u8813345@gmail.com>,
Rex Fu <rex.fu.amd@gmail.com>
Subject: [PATCH v4 10/12] ARM: dts: aspeed: anacapa: Add LPDB fuse monitor GPIO expander
Date: Wed, 05 Aug 2026 21:02:38 +0800 [thread overview]
Message-ID: <20260805-anacapa-devlop-phase-devicetree-v4-10-5d67e0efa6c5@gmail.com> (raw)
In-Reply-To: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com>
From: Rex Fu <rex.fu.amd@gmail.com>
Add the PCA9554 GPIO expander for PDB fuse monitor signals.
Signed-off-by: Rex Fu <rex.fu.amd@gmail.com>
---
.../dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dts | 87 ++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dts
index 0eb547ad0ec1..f09dd1abe77d 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dts
@@ -8,6 +8,93 @@ / {
compatible = "facebook,anacapa-bmc-dvt", "aspeed,ast2600";
};
+// MB - PDB
+&i2c8 {
+ i2c-mux@72 {
+ i2c8mux0ch0: i2c@0 {
+ gpio@22 {
+ gpio-line-names =
+ "RPDB_FAN_FULL_SPEED_R_N", "RPDB_I2C_TMP432_U8_ALERT_R_N",
+ "RPDB_I2C_TMP432_U29_ALERT_R_N", "RPDB_GLOBAL_WP",
+ "RPDB_FAN_CT_FAN_FAIL_R_N", "RPDB_VERID_A0",
+ "RPDB_VERID_A1", "RPDB_VERID_A2",
+ "RPDB_ALERT_P50V_HSC2_R_N", "RPDB_ALERT_P50V_HSC3_R_N",
+ "RPDB_ALERT_P50V_HSC4_R_N", "RPDB_ALERT_P50V_STBY_R_N",
+ "RPDB_P12V_MB_VRM_ALERT_R_N",
+ "RPDB_P12V_STBY_VRM_ALERT_R_N",
+ "RPDB_PGD_P3V3_STBY_PWRGD_R",
+ "RPDB_P12V_STBY_VRM_PWRGD_BUF_R";
+ };
+ gpio@24 {
+ gpio-line-names =
+ "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R",
+ "RPDB_PWRGD_P50V_HSC4_SYS_R",
+ "RPDB_PWRGD_P50V_STBY_SYS_BUF_R",
+ "RPDB_P50V_FAN5_R2_PG", "RPDB_P50V_FAN6_R2_PG",
+ "RPDB_P50V_FAN7_R2_PG", "RPDB_P50V_FAN8_R2_PG",
+ "RPDB_SKU_ID0", "RPDB_FAN5_PRSNT_N_R",
+ "", "RPDB_FAN6_PRSNT_N_R",
+ "RPDB_FAN7_PRSNT_N_R", "RPDB_FAN8_PRSNT_N_R",
+ "", "";
+ };
+ gpio@38 {
+ compatible = "nxp,pca9554";
+ reg = <0x38>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&sgpiom0>;
+ interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
+
+ gpio-line-names =
+ "RPDB_P50V_FUSE2_TVS1", "RPDB_P50V_FUSE2_TVS2",
+ "RPDB_P50V_FUSE3_TVS1", "RPDB_P50V_FUSE3_TVS2",
+ "RPDB_P50V_FUSE4_TVS1", "",
+ "", "";
+ };
+ };
+ i2c8mux0ch1: i2c@1 {
+ gpio@22 {
+ gpio-line-names =
+ "LPDB_FAN_FULL_SPEED_R_N", "LPDB_I2C_TEMP75_U8_ALERT_R_N",
+ "LPDB_I2C_TMP432_U29_ALERT_R_N", "LPDB_GLOBAL_WP",
+ "LPDB_FAN_CT_FAN_FAIL_R_N", "LPDB_VERID_A0",
+ "LPDB_VERID_A1", "LPDB_VERID_A2",
+ "LPDB_ALERT_P50V_HSC0_R_N", "LPDB_ALERT_P50V_HSC1_R_N",
+ "LPDB_ALERT_P50V_HSC5_R_N", "LPDB_I2C_P12V_SW_VRM_ALERT_R_N",
+ "LPDB_EAM0_PRSNT_MOS_N_R", "LPDB_EAM1_PRSNT_MOS_N_R",
+ "LPDB_PWRGD_P50V_HSC5_SYS_R", "BARKLIP_PRSNT_N_R3";
+ };
+ gpio@24 {
+ gpio-line-names =
+ "LPDB_P50V_FAN0_R2_PG", "LPDB_P50V_FAN1_R2_PG",
+ "LPDB_P50V_FAN2_R2_PG", "LPDB_P50V_FAN3_R2_PG",
+ "LPDB_P50V_FAN4_R2_PG", "LPDB_FAN0_PRSNT_N_R",
+ "LPDB_FAN1_PRSNT_N_R", "LPDB_FAN2_PRSNT_N_R",
+ "LPDB_FAN3_PRSNT_N_R", "LPDB_FAN4_PRSNT_N_R",
+ "LPDB_SKU_ID0", "",
+ "", "",
+ "", "LPDB_PG_P3V3_R";
+ };
+ gpio@38 {
+ compatible = "nxp,pca9554";
+ reg = <0x38>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&sgpiom0>;
+ interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
+
+ gpio-line-names =
+ "LPDB_P50V_FUSE0_TVS1", "LPDB_P50V_FUSE0_TVS2",
+ "LPDB_P50V_FUSE1_TVS1", "LPDB_P50V_FUSE1_TVS2",
+ "LPDB_P50V_FUSE5_TVS1", "",
+ "", "";
+ };
+ };
+ };
+};
+
&sgpiom0 {
ngpios = <128>;
bus-frequency = <2000000>;
--
2.34.1
next prev parent reply other threads:[~2026-08-05 13:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 13:02 [PATCH v4 00/12] ARM: dts: aspeed: anacapa: restructure devicetree for development-phase Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 01/12] dt-bindings: arm: aspeed: Add Anacapa EVT1 EVT2 DVT board Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 02/12] ARM: dts: aspeed: anacapa: Add EVT1 devicetree and point wrapper to it Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 03/12] ARM: dts: aspeed: anacapa: Add EVT2 devicetree inheriting EVT1 Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 04/12] ARM: dts: aspeed: anacapa: Add DVT devicetree inheriting EVT2 Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 05/12] ARM: dts: aspeed: anacapa: Add additional EEPROM node for SCM Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 06/12] ARM: dts: aspeed: anacapa: Add eeprom device node for NFC adaptor board Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 07/12] ARM: dts: aspeed: anacapa: Align PDB fan GPIO numbering Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 08/12] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 09/12] ARM: dts: aspeed: anacapa: evt2: Add shunt resistor values for HSC monitors Colin Huang via B4 Relay
2026-08-05 13:02 ` Colin Huang via B4 Relay [this message]
2026-08-05 13:02 ` [PATCH v4 11/12] ARM: dts: aspeed: anacapa: Simplify leakage GPIO line names Colin Huang via B4 Relay
2026-08-05 13:02 ` [PATCH v4 12/12] ARM: dts: aspeed: anacapa: Add SPI flash VCC supply Colin Huang via B4 Relay
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