From: Jiaxing Hu <gahing@gahingwoo.com>
To: chaoyi.chen@rock-chips.com, royalnet026@gmail.com,
heiko@sntech.de, tomeu@tomeuvizoso.net, robin.murphy@arm.com,
diederik@cknow-tech.com
Cc: alchark@flipper.net, linux-rockchip@lists.infradead.org,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Jiaxing Hu <gahing@gahingwoo.com>
Subject: Re: [RFC PATCH v6 7/9] accel/rocket: add RK3576 NPU (RKNN) support
Date: Mon, 10 Aug 2026 22:47:18 +1200 [thread overview]
Message-ID: <20260810104718.1214191-1-gahing@gahingwoo.com> (raw)
In-Reply-To: <4f300b78-d96d-4d98-8819-dc292b0c9b97@rock-chips.com>
Hi Chaoyi,
Thank you, that settles it, and no apology needed for not reading the
series.
> For RK3576:
>
> - BIT[15:0] task_number
> - BIT[16] task_pp_en
> - BIT[17] task_count_clear
> - BIT[18] task_last_layer_clear
That matches the register trace bit for bit, and it is worth more than
the trace, because the trace could only say which word the vendor writes
and not what the bits in it are.
BIT[18] is new to me. I was setting it because the vendor's word had it
set and clearing it was not something I wanted to try blind. Now it can
be named rather than shipped as 0x7 << 16:
#define PC_TASK_CON_TASK_NUMBER GENMASK(15, 0)
#define PC_TASK_CON_TASK_PP_EN BIT(16)
#define PC_TASK_CON_TASK_COUNT_CLEAR BIT(17)
#define PC_TASK_CON_TASK_LAST_LAYER_CLEAR BIT(18)
with the RK3588 positions kept beside them, since the two differ only in
the width of the first field and that is exactly what made v1 through v6
wrong.
One question, if you have a moment. Is task_last_layer_clear meant to be
set on every submit, or only on the task that ends a layer? Setting it
unconditionally works on RK3576 here, but working and being right are
not the same thing, and I would rather not encode a guess in a driver
other people will copy from.
Thanks again,
Jiaxing
next prev parent reply other threads:[~2026-08-10 10:47 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-06 6:34 [RFC PATCH v6 0/9] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-08-06 6:34 ` [RFC PATCH v6 1/9] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-06 6:34 ` [RFC PATCH v6 2/9] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-08-06 6:34 ` [RFC PATCH v6 3/9] dt-bindings: iommu: rockchip: allow the RK3576 NPU MMU clock set Jiaxing Hu
2026-08-06 9:23 ` Diederik de Haas
2026-08-06 9:55 ` Jiaxing Hu
2026-08-06 11:29 ` Diederik de Haas
2026-08-06 6:34 ` [RFC PATCH v6 4/9] pmdomain/rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-08-06 6:34 ` [RFC PATCH v6 5/9] pmdomain/rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-08-06 6:34 ` [RFC PATCH v6 6/9] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-08-07 8:10 ` Diederik de Haas
2026-08-06 6:34 ` [RFC PATCH v6 7/9] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-08-07 8:48 ` Diederik de Haas
2026-08-07 12:55 ` Robin Murphy
2026-08-07 13:32 ` Diederik de Haas
2026-08-07 14:24 ` Robin Murphy
2026-08-07 21:16 ` Jiaxing Hu
2026-08-08 12:39 ` Igor Paunovic
2026-08-10 10:47 ` Jiaxing Hu
2026-08-10 1:31 ` Chaoyi Chen
2026-08-10 10:47 ` Jiaxing Hu [this message]
2026-08-06 6:34 ` [RFC PATCH v6 8/9] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Jiaxing Hu
2026-08-06 6:34 ` [RFC PATCH v6 9/9] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Jiaxing Hu
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