[PATCH 2/2] arm64: dts: imx8mp-ultra-mach-sbc: fix CBTU02043 USB Type-C orientation switch

["Peng Fan (OSS)" <peng.fan@oss.nxp.com>]

From: Peng Fan <peng.fan@nxp.com>

The CBTU02043 on this board is a crossbar switch used solely for USB
Type-C orientation switching, not for SBU signal muxing. Using the
gpio-sbu-mux driver is therefore incorrect.

Replace the gpio-sbu-mux node with:
- orientation-gpios on the ptn5110 TCPC node for CC orientation
  detection using GPIO4_IO20 (CBTU02043 SEL pin).
- A gpio-hog to hold the XSD (shutdown) pin (GPIO2_IO20) low, keeping
  the CBTU02043 always enabled.

This also fixes the enable-gpios polarity which was GPIO_ACTIVE_HIGH,
but the CBTU02043 XSD pin is active-low per the datasheet: LOW for
normal operation, HIGH for shutdown (high impedance).

Fixes: d1c1400bd3b8 ("arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../boot/dts/freescale/imx8mp-ultra-mach-sbc.dts   | 47 ++++++++--------------
 1 file changed, 17 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
index 3e6f9c88cc20..7e0550647751 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
@@ -23,21 +23,6 @@ chosen {
 		stdout-path = &uart2;
 	};
 
-	gpio-sbu-mux {
-		compatible = "nxp,cbdtu02043", "gpio-sbu-mux";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_sbu_mux>;
-		select-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
-		enable-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
-		orientation-switch;
-
-		port {
-			usb3_data_ss: endpoint {
-				remote-endpoint = <&typec_con_ss>;
-			};
-		};
-	};
-
 	gpio-keys {
 		compatible = "gpio-keys";
 
@@ -217,6 +202,15 @@ &gpio2 {
 		"", "", "", "", "#SD2_CD", "", "", "",
 		"", "", "", "", "#USB-C_EN", "", "", "",
 		"", "", "", "", "", "", "", "";
+
+	cbtu02043-xsd-hog {
+		gpio-hog;
+		gpios = <20 GPIO_ACTIVE_LOW>;
+		output-low;
+		line-name = "CBTU02043_XSD";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;
+	};
 };
 
 &gpio3 {
@@ -387,6 +381,7 @@ tcpc@52 {
 		pinctrl-0 = <&pinctrl_ptn5110>;
 		interrupt-parent = <&gpio4>;
 		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+		orientation-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
 
 		usb_con: connector {
 			compatible = "usb-c-connector";
@@ -411,14 +406,6 @@ typec_dr_sw: endpoint {
 						remote-endpoint = <&usb3_drd_sw>;
 					};
 				};
-
-				port@1 {
-					reg = <1>;
-
-					typec_con_ss: endpoint {
-						remote-endpoint = <&usb3_data_ss>;
-					};
-				};
 			};
 		};
 	};
@@ -563,6 +550,12 @@ &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
+	pinctrl_cbtu02043_xsd: cbtu02043-xsd-grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20			0x16	/* #USB-C_EN */
+		>;
+	};
+
 	pinctrl_ecspi1_cs: ecspi1-cs-grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x40	/* #SPI1_CS */
@@ -746,6 +739,7 @@ MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x1c0	/* #PMIC_INT */
 	pinctrl_ptn5110: ptn5110-grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x1c4	/* #USB-C_ALERT */
+			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16	/* #USB-C_SEL */
 		>;
 	};
 
@@ -767,13 +761,6 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
 		>;
 	};
 
-	pinctrl_sbu_mux: sbu-mux-grp {
-		fsl,pins = <
-			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16	/* #USB-C_SEL */
-			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20			0x16	/* #USB-C_EN */
-		>;
-	};
-
 	pinctrl_slb9670: slb9670-grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x40	/* #TPM_IRQ */

-- 
2.51.0