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* [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock
@ 2026-07-29 10:18 Rajesh Gugulothu
  2026-09-01  9:36 ` Gugulothu, Rajesh
  2026-09-01 11:56 ` Laurent Pinchart
  0 siblings, 2 replies; 3+ messages in thread
From: Rajesh Gugulothu @ 2026-07-29 10:18 UTC (permalink / raw)
  To: Laurent Pinchart, Mauro Carvalho Chehab, Michal Simek
  Cc: rajesh.gugulothu, linux-media, linux-arm-kernel, linux-kernel

This update enables the vtc to set the pixel clock based on the
specified timing parameters. A new fps field is added to struct
xvtc_config and the pixel rate is computed as fps * hsize * vsize.
After setting the rate, the actual clock rate is read back and a
warning is emitted if it deviates beyond a small tolerance.

The pixel rate is computed in unsigned long arithmetic to avoid a 32-bit
overflow in the fps * hsize * vsize product.

Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
---
 drivers/media/platform/xilinx/xilinx-vtc.c | 19 +++++++++++++++++++
 drivers/media/platform/xilinx/xilinx-vtc.h |  1 +
 2 files changed, 20 insertions(+)

diff --git a/drivers/media/platform/xilinx/xilinx-vtc.c b/drivers/media/platform/xilinx/xilinx-vtc.c
index 92fec7bb4..695eb2a46 100644
--- a/drivers/media/platform/xilinx/xilinx-vtc.c
+++ b/drivers/media/platform/xilinx/xilinx-vtc.c
@@ -141,6 +141,9 @@
 
 #define XVTC_GENERATOR_GLOBAL_DELAY		0x0104
 
+/* Value of 1 = .01% */
+#define XVTC_CLK_MAX_PCT_ERR			1
+
 /**
  * struct xvtc_device - Xilinx Video Timing Controller device structure
  * @xvip: Xilinx Video IP device
@@ -175,10 +178,26 @@ int xvtc_generator_start(struct xvtc_device *xvtc,
 			 const struct xvtc_config *config)
 {
 	int ret;
+	unsigned long s_rate;
+	unsigned long g_rate;
+	unsigned long clk_err;
 
 	if (!xvtc->has_generator)
 		return -ENXIO;
 
+	s_rate = (unsigned long)config->fps * config->hsize * config->vsize;
+	ret = clk_set_rate(xvtc->xvip.clk, s_rate);
+	if (ret < 0)
+		return ret;
+
+	/* Verify that the clock is within a reasonable tolerance. */
+	g_rate = clk_get_rate(xvtc->xvip.clk);
+	clk_err = (abs(g_rate - s_rate) * 10000) / (s_rate);
+	if (clk_err > XVTC_CLK_MAX_PCT_ERR)
+		dev_warn(xvtc->xvip.dev,
+			 "Failed to set clk rate: %lu, actual rate: %lu\n",
+			 s_rate, g_rate);
+
 	ret = clk_prepare_enable(xvtc->xvip.clk);
 	if (ret < 0)
 		return ret;
diff --git a/drivers/media/platform/xilinx/xilinx-vtc.h b/drivers/media/platform/xilinx/xilinx-vtc.h
index 855845911..0f360ed55 100644
--- a/drivers/media/platform/xilinx/xilinx-vtc.h
+++ b/drivers/media/platform/xilinx/xilinx-vtc.h
@@ -27,6 +27,7 @@ struct xvtc_config {
 	unsigned int vsync_start;
 	unsigned int vsync_end;
 	unsigned int vsize;
+	unsigned int fps;
 };
 
 struct xvtc_device *xvtc_of_get(struct device_node *np);
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* RE: [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock
  2026-07-29 10:18 [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock Rajesh Gugulothu
@ 2026-09-01  9:36 ` Gugulothu, Rajesh
  2026-09-01 11:56 ` Laurent Pinchart
  1 sibling, 0 replies; 3+ messages in thread
From: Gugulothu, Rajesh @ 2026-09-01  9:36 UTC (permalink / raw)
  To: Gugulothu, Rajesh, Laurent Pinchart, Mauro Carvalho Chehab,
	Simek, Michal
  Cc: linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org

AMD General

Hi All,

A gentle reminder on this patch. When you have a chance, could you please review it and let me know if any changes are needed?

Thanks,
Rajesh G

>-----Original Message-----
>From: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
>Sent: Wednesday, July 29, 2026 3:48 PM
>To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>; Mauro Carvalho
>Chehab <mchehab@kernel.org>; Simek, Michal <michal.simek@amd.com>
>Cc: Gugulothu, Rajesh <rajesh.gugulothu@amd.com>; linux-media@vger.kernel.org;
>linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
>Subject: [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock
>
>This update enables the vtc to set the pixel clock based on the specified timing
>parameters. A new fps field is added to struct xvtc_config and the pixel rate is
>computed as fps * hsize * vsize.
>After setting the rate, the actual clock rate is read back and a warning is emitted if it
>deviates beyond a small tolerance.
>
>The pixel rate is computed in unsigned long arithmetic to avoid a 32-bit overflow in
>the fps * hsize * vsize product.
>
>Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
>---
> drivers/media/platform/xilinx/xilinx-vtc.c | 19 +++++++++++++++++++
>drivers/media/platform/xilinx/xilinx-vtc.h |  1 +
> 2 files changed, 20 insertions(+)
>
>diff --git a/drivers/media/platform/xilinx/xilinx-vtc.c
>b/drivers/media/platform/xilinx/xilinx-vtc.c
>index 92fec7bb4..695eb2a46 100644
>--- a/drivers/media/platform/xilinx/xilinx-vtc.c
>+++ b/drivers/media/platform/xilinx/xilinx-vtc.c
>@@ -141,6 +141,9 @@
>
> #define XVTC_GENERATOR_GLOBAL_DELAY           0x0104
>
>+/* Value of 1 = .01% */
>+#define XVTC_CLK_MAX_PCT_ERR                  1
>+
> /**
>  * struct xvtc_device - Xilinx Video Timing Controller device structure
>  * @xvip: Xilinx Video IP device
>@@ -175,10 +178,26 @@ int xvtc_generator_start(struct xvtc_device *xvtc,
>                        const struct xvtc_config *config)
> {
>       int ret;
>+      unsigned long s_rate;
>+      unsigned long g_rate;
>+      unsigned long clk_err;
>
>       if (!xvtc->has_generator)
>               return -ENXIO;
>
>+      s_rate = (unsigned long)config->fps * config->hsize * config->vsize;
>+      ret = clk_set_rate(xvtc->xvip.clk, s_rate);
>+      if (ret < 0)
>+              return ret;
>+
>+      /* Verify that the clock is within a reasonable tolerance. */
>+      g_rate = clk_get_rate(xvtc->xvip.clk);
>+      clk_err = (abs(g_rate - s_rate) * 10000) / (s_rate);
>+      if (clk_err > XVTC_CLK_MAX_PCT_ERR)
>+              dev_warn(xvtc->xvip.dev,
>+                       "Failed to set clk rate: %lu, actual rate: %lu\n",
>+                       s_rate, g_rate);
>+
>       ret = clk_prepare_enable(xvtc->xvip.clk);
>       if (ret < 0)
>               return ret;
>diff --git a/drivers/media/platform/xilinx/xilinx-vtc.h
>b/drivers/media/platform/xilinx/xilinx-vtc.h
>index 855845911..0f360ed55 100644
>--- a/drivers/media/platform/xilinx/xilinx-vtc.h
>+++ b/drivers/media/platform/xilinx/xilinx-vtc.h
>@@ -27,6 +27,7 @@ struct xvtc_config {
>       unsigned int vsync_start;
>       unsigned int vsync_end;
>       unsigned int vsize;
>+      unsigned int fps;
> };
>
> struct xvtc_device *xvtc_of_get(struct device_node *np);
>--
>2.34.1



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock
  2026-07-29 10:18 [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock Rajesh Gugulothu
  2026-09-01  9:36 ` Gugulothu, Rajesh
@ 2026-09-01 11:56 ` Laurent Pinchart
  1 sibling, 0 replies; 3+ messages in thread
From: Laurent Pinchart @ 2026-09-01 11:56 UTC (permalink / raw)
  To: Rajesh Gugulothu
  Cc: Mauro Carvalho Chehab, Michal Simek, linux-media,
	linux-arm-kernel, linux-kernel, Tomi Valkeinen

CC'ing Tomi who is working on Xilinx V4L2 drivers.

On Wed, Jul 29, 2026 at 03:48:08PM +0530, Rajesh Gugulothu wrote:
> This update enables the vtc to set the pixel clock based on the
> specified timing parameters. A new fps field is added to struct
> xvtc_config and the pixel rate is computed as fps * hsize * vsize.
> After setting the rate, the actual clock rate is read back and a
> warning is emitted if it deviates beyond a small tolerance.
> 
> The pixel rate is computed in unsigned long arithmetic to avoid a 32-bit
> overflow in the fps * hsize * vsize product.
> 
> Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
> ---
>  drivers/media/platform/xilinx/xilinx-vtc.c | 19 +++++++++++++++++++
>  drivers/media/platform/xilinx/xilinx-vtc.h |  1 +
>  2 files changed, 20 insertions(+)
> 
> diff --git a/drivers/media/platform/xilinx/xilinx-vtc.c b/drivers/media/platform/xilinx/xilinx-vtc.c
> index 92fec7bb4..695eb2a46 100644
> --- a/drivers/media/platform/xilinx/xilinx-vtc.c
> +++ b/drivers/media/platform/xilinx/xilinx-vtc.c
> @@ -141,6 +141,9 @@
>  
>  #define XVTC_GENERATOR_GLOBAL_DELAY		0x0104
>  
> +/* Value of 1 = .01% */
> +#define XVTC_CLK_MAX_PCT_ERR			1
> +
>  /**
>   * struct xvtc_device - Xilinx Video Timing Controller device structure
>   * @xvip: Xilinx Video IP device
> @@ -175,10 +178,26 @@ int xvtc_generator_start(struct xvtc_device *xvtc,
>  			 const struct xvtc_config *config)
>  {
>  	int ret;
> +	unsigned long s_rate;
> +	unsigned long g_rate;
> +	unsigned long clk_err;
>  
>  	if (!xvtc->has_generator)
>  		return -ENXIO;
>  
> +	s_rate = (unsigned long)config->fps * config->hsize * config->vsize;
> +	ret = clk_set_rate(xvtc->xvip.clk, s_rate);
> +	if (ret < 0)
> +		return ret;
> +
> +	/* Verify that the clock is within a reasonable tolerance. */
> +	g_rate = clk_get_rate(xvtc->xvip.clk);
> +	clk_err = (abs(g_rate - s_rate) * 10000) / (s_rate);
> +	if (clk_err > XVTC_CLK_MAX_PCT_ERR)
> +		dev_warn(xvtc->xvip.dev,
> +			 "Failed to set clk rate: %lu, actual rate: %lu\n",
> +			 s_rate, g_rate);
> +
>  	ret = clk_prepare_enable(xvtc->xvip.clk);
>  	if (ret < 0)
>  		return ret;
> diff --git a/drivers/media/platform/xilinx/xilinx-vtc.h b/drivers/media/platform/xilinx/xilinx-vtc.h
> index 855845911..0f360ed55 100644
> --- a/drivers/media/platform/xilinx/xilinx-vtc.h
> +++ b/drivers/media/platform/xilinx/xilinx-vtc.h
> @@ -27,6 +27,7 @@ struct xvtc_config {
>  	unsigned int vsync_start;
>  	unsigned int vsync_end;
>  	unsigned int vsize;
> +	unsigned int fps;
>  };
>  
>  struct xvtc_device *xvtc_of_get(struct device_node *np);

-- 
Regards,

Laurent Pinchart


^ permalink raw reply	[flat|nested] 3+ messages in thread

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2026-07-29 10:18 [PATCH] media: xilinx: vtc: Dynamically calculate pixel clock Rajesh Gugulothu
2026-09-01  9:36 ` Gugulothu, Rajesh
2026-09-01 11:56 ` Laurent Pinchart

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