* [PATCH 0/2] spi: ma35d1-qspi: Flag the DTR capability correctly
@ 2026-09-04 16:15 Miquel Raynal
2026-09-04 16:15 ` [PATCH 1/2] spi: spi-mem: Enable DTR transfers using the standard API Miquel Raynal
2026-09-04 16:15 ` [PATCH 2/2] spi: ma35d1-qspi: Allow DTR operations with the regular SPI API Miquel Raynal
0 siblings, 2 replies; 3+ messages in thread
From: Miquel Raynal @ 2026-09-04 16:15 UTC (permalink / raw)
To: Mark Brown, Jacky Huang, Shan-Chun Hung
Cc: Thomas Petazzoni, linux-spi, linux-kernel, linux-arm-kernel,
Miquel Raynal
Mark pointed out that the DTR capability was not correctly enabled since
I had to set the extra ctlr->dtr_caps flag. For testing, I commented out
the spi-mem ops/caps and figured out DTR variants were still not picked
up. This was due to the spi-mem fallback implementation of ->exec_op()
not forwarding the DTR flag.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
Miquel Raynal (2):
spi: spi-mem: Enable DTR transfers using the standard API
spi: ma35d1-qspi: Allow DTR operations with the regular SPI API
drivers/spi/spi-ma35d1-qspi.c | 1 +
drivers/spi/spi-mem.c | 6 +++++-
2 files changed, 6 insertions(+), 1 deletion(-)
---
base-commit: 278cfc33d25f58105681196cecd9222c423d0c1c
change-id: 20260904-perso-ma35d1-master-2c2423043aed
Best regards,
--
Miquel Raynal <miquel.raynal@bootlin.com>
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH 1/2] spi: spi-mem: Enable DTR transfers using the standard API 2026-09-04 16:15 [PATCH 0/2] spi: ma35d1-qspi: Flag the DTR capability correctly Miquel Raynal @ 2026-09-04 16:15 ` Miquel Raynal 2026-09-04 16:15 ` [PATCH 2/2] spi: ma35d1-qspi: Allow DTR operations with the regular SPI API Miquel Raynal 1 sibling, 0 replies; 3+ messages in thread From: Miquel Raynal @ 2026-09-04 16:15 UTC (permalink / raw) To: Mark Brown, Jacky Huang, Shan-Chun Hung Cc: Thomas Petazzoni, linux-spi, linux-kernel, linux-arm-kernel, Miquel Raynal Most spi-mem operations today go through controllers implementing the spi-mem API. But it is also totally possible to use any standard SPI controller to operate these memories. If the controllers support DTR, there is no reason to prevent this feature from being used. Extend spi_mem_exec_op()'s fallback to the standard SPI API, by filling the transfer DTR information. Doing so also requires checking the dtr_caps flag, of course. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/spi/spi-mem.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 5f973ebfb8b6..94d122be1c93 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -172,7 +172,7 @@ bool spi_mem_default_supports_op(struct spi_mem *mem, op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr; if (op_is_dtr) { - if (!spi_mem_controller_is_capable(ctlr, dtr)) + if (!spi_mem_controller_is_capable(ctlr, dtr) && !ctlr->dtr_caps) return false; if (op->data.swap16 && !spi_mem_controller_is_capable(ctlr, swap16)) @@ -461,6 +461,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].len = op->cmd.nbytes; xfers[xferpos].tx_nbits = op->cmd.buswidth; xfers[xferpos].speed_hz = op->max_freq; + xfers[xferpos].dtr_mode = op->cmd.dtr; spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen++; @@ -476,6 +477,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].len = op->addr.nbytes; xfers[xferpos].tx_nbits = op->addr.buswidth; xfers[xferpos].speed_hz = op->max_freq; + xfers[xferpos].dtr_mode = op->addr.dtr; spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen += op->addr.nbytes; @@ -488,6 +490,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].tx_nbits = op->dummy.buswidth; xfers[xferpos].dummy_data = 1; xfers[xferpos].speed_hz = op->max_freq; + xfers[xferpos].dtr_mode = op->dummy.dtr; spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen += op->dummy.nbytes; @@ -504,6 +507,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].len = op->data.nbytes; xfers[xferpos].speed_hz = op->max_freq; + xfers[xferpos].dtr_mode = op->data.dtr; spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen += op->data.nbytes; -- 2.54.0 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] spi: ma35d1-qspi: Allow DTR operations with the regular SPI API 2026-09-04 16:15 [PATCH 0/2] spi: ma35d1-qspi: Flag the DTR capability correctly Miquel Raynal 2026-09-04 16:15 ` [PATCH 1/2] spi: spi-mem: Enable DTR transfers using the standard API Miquel Raynal @ 2026-09-04 16:15 ` Miquel Raynal 1 sibling, 0 replies; 3+ messages in thread From: Miquel Raynal @ 2026-09-04 16:15 UTC (permalink / raw) To: Mark Brown, Jacky Huang, Shan-Chun Hung Cc: Thomas Petazzoni, linux-spi, linux-kernel, linux-arm-kernel, Miquel Raynal The feature was implemented but not actually enabled for regular SPI operations (as opposed to spi-mem operations). Make sure the missing capability is actually set. Reported-by: Mark Brown <broonie@kernel.org> Closes: https://lore.kernel.org/all/09c3928f-4b58-4ac6-8e1a-84dfe3ff6b92@sirena.org.uk/ Fixes: 15e9362f6190 ("spi: ma35d1-qspi: Add DTR support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/spi/spi-ma35d1-qspi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-ma35d1-qspi.c b/drivers/spi/spi-ma35d1-qspi.c index 7f938d0c6f1f..ee3427640f3a 100644 --- a/drivers/spi/spi-ma35d1-qspi.c +++ b/drivers/spi/spi-ma35d1-qspi.c @@ -645,6 +645,7 @@ static int nuvoton_qspi_probe(struct platform_device *pdev) ctlr->max_message_size = nuvoton_qspi_max_message_size; ctlr->mem_ops = &nuvoton_qspi_mem_ops; ctlr->mem_caps = &nuvoton_qspi_mem_caps; + ctlr->dtr_caps = true; ctlr->set_cs = nuvoton_qspi_set_cs; ctlr->transfer_one = nuvoton_qspi_transfer_one; ctlr->bits_per_word_mask = SPI_BPW_MASK(8); -- 2.54.0 ^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-09-04 16:15 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-09-04 16:15 [PATCH 0/2] spi: ma35d1-qspi: Flag the DTR capability correctly Miquel Raynal 2026-09-04 16:15 ` [PATCH 1/2] spi: spi-mem: Enable DTR transfers using the standard API Miquel Raynal 2026-09-04 16:15 ` [PATCH 2/2] spi: ma35d1-qspi: Allow DTR operations with the regular SPI API Miquel Raynal
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