[PATCH 0/3] arm64: dts: mediatek: mt8188: SCP memory, thermal and touchpad fixes

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* [PATCH 0/3] arm64: dts: mediatek: mt8188: SCP memory, thermal and touchpad fixes
@ 2026-10-03 19:31 Michał Kopeć
  2026-10-03 19:31 ` [PATCH 1/3] arm64: dts: mediatek: mt8188-geralt: Reserve SCP dual-core memory region Michał Kopeć
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Michał Kopeć @ 2026-10-03 19:31 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Matthias Brugger
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Fei Shao,
	devicetree, linux-mediatek, linux-arm-kernel, linux-kernel,
	Michał Kopeć

These patches fix a memory reservation on the MT8188 based Chromebooks
(Geralt/Ciri), tune the CPU thermal zones of MT8188 and add the
touchpad of Ciri's detachable keyboard base.

The first is a fix for Ciri: a DRAM region that the trusted firmware
protects for the SCP was handed out to Linux and broke the GPU under
memory pressure.

The second makes the power allocator governor usable on the CPU thermal
zones, which prevents thermal shutdowns under sustained load.

The third adds the touchpad of the detachable keyboard base of Ciri.

The series is based on the v7.3-next/dts64 branch of the MediaTek tree.

Tested on Ciri (sku0).

Michał Kopeć (3):
  arm64: dts: mediatek: mt8188-geralt: Reserve SCP dual-core memory
    region
  arm64: dts: mediatek: mt8188: Add power allocator parameters to CPU
    zones
  arm64: dts: mediatek: mt8188-geralt: Add the detachable base touchpad

 .../boot/dts/mediatek/mt8188-geralt.dtsi      |  23 ++++
 arch/arm64/boot/dts/mediatek/mt8188.dtsi      | 110 +++++++++++++++++-
 arch/arm64/boot/dts/mediatek/mt8370.dtsi      |  14 +++
 3 files changed, 141 insertions(+), 6 deletions(-)

base-commit: bf89276b2db391cbb25d1a0e898280fe85b16fb5
-- 
2.55.0

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/3] arm64: dts: mediatek: mt8188-geralt: Reserve SCP dual-core memory region
  2026-10-03 19:31 [PATCH 0/3] arm64: dts: mediatek: mt8188: SCP memory, thermal and touchpad fixes Michał Kopeć
@ 2026-10-03 19:31 ` Michał Kopeć
  2026-10-03 19:31 ` [PATCH 2/3] arm64: dts: mediatek: mt8188: Add power allocator parameters to CPU zones Michał Kopeć
  2026-10-03 19:31 ` [PATCH 3/3] arm64: dts: mediatek: mt8188-geralt: Add the detachable base touchpad Michał Kopeć
  2 siblings, 0 replies; 4+ messages in thread
From: Michał Kopeć @ 2026-10-03 19:31 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Matthias Brugger
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Fei Shao,
	devicetree, linux-mediatek, linux-arm-kernel, linux-kernel,
	Michał Kopeć

The trusted firmware on MT8188 protects 0x70000000-0x79ffffff (the SCP
core1 DRAM region) in the EMI MPU. Only the application processor and
the SCP may access it; accesses from other bus masters, including the
GPU, are silently dropped on write and return zeros on read.

The region is not reserved in the device tree, so Linux hands it out as
ordinary memory. Under memory pressure, GPU buffers and GPU page tables
end up there, which causes silent loss of GPU writes, translation
faults on page-table entries that are valid from the CPU's point of
view, and the GPU resets that follow.

Reserve the region, as the ChromeOS device tree does. No driver uses
it, so describe it as a plain no-map reservation.

Fixes: 5e6af7f54189 ("arm64: dts: mediatek: Introduce MT8188 Geralt platform based Ciri")
Signed-off-by: Michał Kopeć <michal@nozomi.space>
---
 arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
index 801eee735afe6..d8edbde6ee4ac 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
@@ -197,6 +197,11 @@ adsp_dma_mem: memory@61000000 {
 			reg = <0 0x61000000 0 0x100000>;
 			no-map;
 		};
+
+		scp_dual_mem: memory@70000000 {
+			reg = <0 0x70000000 0 0xa000000>;
+			no-map;
+		};
 	};
 };

-- 
2.55.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 2/3] arm64: dts: mediatek: mt8188: Add power allocator parameters to CPU zones
  2026-10-03 19:31 [PATCH 0/3] arm64: dts: mediatek: mt8188: SCP memory, thermal and touchpad fixes Michał Kopeć
  2026-10-03 19:31 ` [PATCH 1/3] arm64: dts: mediatek: mt8188-geralt: Reserve SCP dual-core memory region Michał Kopeć
@ 2026-10-03 19:31 ` Michał Kopeć
  2026-10-03 19:31 ` [PATCH 3/3] arm64: dts: mediatek: mt8188-geralt: Add the detachable base touchpad Michał Kopeć
  2 siblings, 0 replies; 4+ messages in thread
From: Michał Kopeć @ 2026-10-03 19:31 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Matthias Brugger
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Fei Shao,
	devicetree, linux-mediatek, linux-arm-kernel, linux-kernel,
	Michał Kopeć

Under sustained load the CPU temperature on MT8188 rises from the passive
trip to the 100 C critical trip within seconds, faster than the step-wise
governor lowers the CPU frequency one step per poll, so the system hits a
thermal shutdown instead of throttling.

Describe the CPU thermal zones the way the ChromeOS kernel describes the
MT8188 SoC zone for the power allocator governor:

- a 68 C passive switch-on trip before the existing control trip,
- a sustainable power of 1500 mW,
- both CPU clusters as cooling devices in every CPU zone, weighted 2345
  for the little and 1024 for the big cluster,
- a 100 ms passive polling interval.

The step-wise governor ignores the switch-on trip, which has no cooling
devices, so zones that don't use the power allocator keep their existing
trip points. Limit the new little cluster maps of the big zones to the
four remaining little cores on MT8370.

Signed-off-by: Michał Kopeć <michal@nozomi.space>
---
 arch/arm64/boot/dts/mediatek/mt8188.dtsi | 110 +++++++++++++++++++++--
 arch/arm64/boot/dts/mediatek/mt8370.dtsi |  14 +++
 2 files changed, 118 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 14a320f0c70cb..07f5f4e62d7d6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -471,10 +471,17 @@ sound: sound {
 	thermal_zones: thermal-zones {
 		cpu-little0-thermal {
 			polling-delay = <1000>;
-			polling-delay-passive = <150>;
+			polling-delay-passive = <100>;
 			thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU0>;
+			sustainable-power = <1500>;
 
 			trips {
+				cpu_little0_switch_on: trip-switch-on {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cpu_little0_alert0: trip-alert0 {
 					temperature = <85000>;
 					hysteresis = <2000>;
@@ -503,16 +510,31 @@ cpu_little0_cooling_map0: map0 {
 							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <2345>;
+				};
+
+				map1 {
+					trip = <&cpu_little0_alert0>;
+					cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
 				};
 			};
 		};
 
 		cpu-little1-thermal {
 			polling-delay = <1000>;
-			polling-delay-passive = <150>;
+			polling-delay-passive = <100>;
 			thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU1>;
+			sustainable-power = <1500>;
 
 			trips {
+				cpu_little1_switch_on: trip-switch-on {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cpu_little1_alert0: trip-alert0 {
 					temperature = <85000>;
 					hysteresis = <2000>;
@@ -541,16 +563,31 @@ cpu_little1_cooling_map0: map0 {
 							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <2345>;
+				};
+
+				map1 {
+					trip = <&cpu_little1_alert0>;
+					cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
 				};
 			};
 		};
 
 		cpu-little2-thermal {
 			polling-delay = <1000>;
-			polling-delay-passive = <150>;
+			polling-delay-passive = <100>;
 			thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU2>;
+			sustainable-power = <1500>;
 
 			trips {
+				cpu_little2_switch_on: trip-switch-on {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cpu_little2_alert0: trip-alert0 {
 					temperature = <85000>;
 					hysteresis = <2000>;
@@ -579,16 +616,31 @@ cpu_little2_cooling_map0: map0 {
 							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <2345>;
+				};
+
+				map1 {
+					trip = <&cpu_little2_alert0>;
+					cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
 				};
 			};
 		};
 
 		cpu-little3-thermal {
 			polling-delay = <1000>;
-			polling-delay-passive = <150>;
+			polling-delay-passive = <100>;
 			thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU3>;
+			sustainable-power = <1500>;
 
 			trips {
+				cpu_little3_switch_on: trip-switch-on {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cpu_little3_alert0: trip-alert0 {
 					temperature = <85000>;
 					hysteresis = <2000>;
@@ -617,6 +669,14 @@ cpu_little3_cooling_map0: map0 {
 							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <2345>;
+				};
+
+				map1 {
+					trip = <&cpu_little3_alert0>;
+					cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
 				};
 			};
 		};
@@ -625,8 +685,15 @@ cpu-big0-thermal {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
 			thermal-sensors = <&lvts_mcu MT8188_MCU_BIG_CPU0>;
+			sustainable-power = <1500>;
 
 			trips {
+				cpu_big0_switch_on: trip-switch-on {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cpu_big0_alert0: trip-alert0 {
 					temperature = <85000>;
 					hysteresis = <2000>;
@@ -647,10 +714,22 @@ cpu_big0_crit: trip-crit {
 			};
 
 			cooling-maps {
-				map0 {
+				cpu_big0_cooling_map0: map0 {
+					trip = <&cpu_big0_alert0>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <2345>;
+				};
+
+				map1 {
 					trip = <&cpu_big0_alert0>;
 					cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
 				};
 			};
 		};
@@ -659,8 +738,15 @@ cpu-big1-thermal {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
 			thermal-sensors = <&lvts_mcu MT8188_MCU_BIG_CPU1>;
+			sustainable-power = <1500>;
 
 			trips {
+				cpu_big1_switch_on: trip-switch-on {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cpu_big1_alert0: trip-alert0 {
 					temperature = <85000>;
 					hysteresis = <2000>;
@@ -681,10 +767,22 @@ cpu_big1_crit: trip-crit {
 			};
 
 			cooling-maps {
-				map0 {
+				cpu_big1_cooling_map0: map0 {
+					trip = <&cpu_big1_alert0>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <2345>;
+				};
+
+				map1 {
 					trip = <&cpu_big1_alert0>;
 					cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 							 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
 				};
 			};
 		};
diff --git a/arch/arm64/boot/dts/mediatek/mt8370.dtsi b/arch/arm64/boot/dts/mediatek/mt8370.dtsi
index 7ac8b8d034945..61801f79e729e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8370.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8370.dtsi
@@ -59,6 +59,20 @@ &cpu_little3_cooling_map0 {
 				<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 };
 
+&cpu_big0_cooling_map0 {
+	cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+				<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+				<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+				<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
+&cpu_big1_cooling_map0 {
+	cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+				<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+				<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+				<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
 /*
  * Please note that overriding compatibles is a discouraged practice and is a
  * clear indication of nodes not being, well, compatible!
-- 
2.55.0



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 3/3] arm64: dts: mediatek: mt8188-geralt: Add the detachable base touchpad
  2026-10-03 19:31 [PATCH 0/3] arm64: dts: mediatek: mt8188: SCP memory, thermal and touchpad fixes Michał Kopeć
  2026-10-03 19:31 ` [PATCH 1/3] arm64: dts: mediatek: mt8188-geralt: Reserve SCP dual-core memory region Michał Kopeć
  2026-10-03 19:31 ` [PATCH 2/3] arm64: dts: mediatek: mt8188: Add power allocator parameters to CPU zones Michał Kopeć
@ 2026-10-03 19:31 ` Michał Kopeć
  2 siblings, 0 replies; 4+ messages in thread
From: Michał Kopeć @ 2026-10-03 19:31 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Matthias Brugger
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Fei Shao,
	devicetree, linux-mediatek, linux-arm-kernel, linux-kernel,
	Michał Kopeć

The touchpad of the detachable keyboard base is a HID over I2C device
at address 0x56 on I2C4, with its interrupt on GPIO148. Describe it as
the ChromeOS device tree does.

Signed-off-by: Michał Kopeć <michal@nozomi.space>
---
 .../arm64/boot/dts/mediatek/mt8188-geralt.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
index d8edbde6ee4ac..3bc15fd132149 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
@@ -494,6 +494,16 @@ &i2c4 {
 	pinctrl-0 = <&i2c4_pins>;
 	clock-frequency = <400000>;
 	status = "okay";
+
+	touchpad@56 {
+		compatible = "hid-over-i2c";
+		reg = <0x56>;
+		hid-descr-addr = <0x0001>;
+		interrupts-extended = <&pio 148 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hid_int>;
+		wakeup-source;
+	};
 };
 
 &i2c5 {
@@ -959,6 +969,14 @@ pins-gsc-ap-int-odl {
 		};
 	};
 
+	hid_int: hid-int-pins {
+		pins-ec-ap-hid-int-odl {
+			pinmux = <PINMUX_GPIO148__FUNC_B_GPIO148>;
+			input-enable;
+			bias-disable;
+		};
+	};
+
 	i2c0_pins: i2c0-pins {
 		pins-bus {
 			pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>,
-- 
2.55.0



^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2026-10-03 19:31 UTC | newest]

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2026-10-03 19:31 [PATCH 0/3] arm64: dts: mediatek: mt8188: SCP memory, thermal and touchpad fixes Michał Kopeć
2026-10-03 19:31 ` [PATCH 1/3] arm64: dts: mediatek: mt8188-geralt: Reserve SCP dual-core memory region Michał Kopeć
2026-10-03 19:31 ` [PATCH 2/3] arm64: dts: mediatek: mt8188: Add power allocator parameters to CPU zones Michał Kopeć
2026-10-03 19:31 ` [PATCH 3/3] arm64: dts: mediatek: mt8188-geralt: Add the detachable base touchpad Michał Kopeć

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