From: Leo Yan <leo.yan@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@arm.com>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Tamas Petz <tamas.petz@arm.com>,
Tamas Zsoldos <tamas.zsoldos@arm.com>,
Suyash Mahar <smahar@meta.com>, Amir Ayupov <aaupov@fb.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
Leo Yan <leo.yan@arm.com>
Subject: [PATCH v2 05/11] coresight: trbe: Leave headroom for stop-on-trigger mode
Date: Fri, 16 Oct 2026 22:11:43 +0100 [thread overview]
Message-ID: <20261016-trbe_buffer_refactor_v2-v2-5-383ac26382fa@arm.com> (raw)
In-Reply-To: <20261016-trbe_buffer_refactor_v2-v2-0-383ac26382fa@arm.com>
Arm ARM (ARM DDI 0487 M.c), rule R_XRRWP says:
| If a Trigger Event is generated when collection is not stopped and
| the trigger mode is Stop on trigger, then all of the following occur:
| The Trace Buffer Unit initiates a trace unit flush of the trace unit.
| ...
A Stop-on-trigger event may initiates a trace flush. The TRBE might
therefore continue writing trace data after the trigger event is
generated. If the trigger is programmed exactly at the boundary of the
free space, that flush can overwrite unconsumed trace data.
Reserve 4KiB of headroom when calculating the wrap-protection trigger
count. If the available space is not large enough to provide that
headroom, returns 0 for counter so effectively do not use it.
Subtract the headroom before rounding the count down to the hardware
alignment, retaining the check that the resulting trigger lies beyond
LIMIT. Rounding down preserves at least the requested headroom.
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
drivers/hwtracing/coresight/coresight-trbe.c | 27 +++++++++++++++++++++++----
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
index 95bbdbaca81bd59ac97b272216489c2f66393fa7..8187e264ff3c86d445b96c4935a8dbdf5ad9e77c 100644
--- a/drivers/hwtracing/coresight/coresight-trbe.c
+++ b/drivers/hwtracing/coresight/coresight-trbe.c
@@ -171,6 +171,21 @@ struct trbe_drvdata {
struct platform_device *pdev;
};
+/*
+ * Arm ARM (ARM DDI 0487 M.B), section D6.5.3 Trigger event, R_XRRWP states:
+ *
+ * "If a Trigger Event is generated when collection is not stopped and the
+ * trigger mode is Stop on trigger, then all of the following occur:
+ * - The Trace Buffer Unit initiates a trace unit flush of the trace unit.
+ * - The TRB_TRIG event is generated."
+ *
+ * The TRBE might therefore continue writing trace data after the trigger event
+ * is generated. When Stop-on-trigger is used to protect unconsumed data after
+ * buffer wrap, reserve 4KiB of headroom in the trigger count so it is safe to
+ * complete flush without overwriting that data.
+ */
+#define TRBE_TRIGGER_STOP_HEADROOM SZ_4K
+
/* Compute the buffer next state */
struct trbe_buf_next {
u64 head;
@@ -460,11 +475,15 @@ static u32 trbe_normal_trigger_count(struct perf_output_handle *handle,
* limit
*
* |>>>>>>>>
- * >>>>>>>>>>>>>>>>>>>>>|
- * ` Trigger counter covers the writable region, rounded down
- * to the hardware alignment.
+ * >>>>>>>>>>>>>>>>>|---|
+ * ` headroom
+ *
+ * Trigger counter covers the writable region, but leave headroom
+ * to avoid overwrite risk caused by trace unit flush after
+ * trigger event is generated.
*/
- count = round_down(handle->size, cpudata->trbe_hw_align);
+ count = round_down(handle->size - TRBE_TRIGGER_STOP_HEADROOM,
+ cpudata->trbe_hw_align);
if (count <= limit - head)
return 0;
--
2.34.1
next prev parent reply other threads:[~2026-10-16 21:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 21:11 [PATCH v2 00/11] coresight: trbe: Refactor buffer handling and add trigger support Leo Yan
2026-10-16 21:11 ` [PATCH v2 01/11] coresight: trbe: Remove misleading comment Leo Yan
2026-10-16 21:11 ` [PATCH v2 02/11] coresight: trbe: Refactor next buffer computation Leo Yan
2026-10-16 21:11 ` [PATCH v2 03/11] coresight: trbe: Track trigger count support per CPU Leo Yan
2026-10-16 21:11 ` [PATCH v2 04/11] coresight: trbe: Use trigger mode for buffer maintenance Leo Yan
2026-10-16 21:11 ` Leo Yan [this message]
2026-10-16 21:11 ` [PATCH v2 06/11] coresight: trbe: Save and restore trigger counter Leo Yan
2026-10-16 21:11 ` [PATCH v2 07/11] coresight: trbe: Add KUnit tests for compute normal buffer Leo Yan
2026-10-16 21:11 ` [PATCH v2 08/11] perf cs-etm: Reset decoder on COLLISION flag Leo Yan
2026-10-16 21:11 ` [PATCH v2 09/11] perf cs-etm: Reset per-thread decoder on CPU migration Leo Yan
2026-10-16 21:11 ` [PATCH v2 10/11] perf cs-etm: Reset decoder on AUX offset discontinuity Leo Yan
2026-10-16 21:11 ` [PATCH v2 11/11] perf cs-etm: Set watermark for AUX trace Leo Yan
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