* [PATCH v3 1/2] KVM: arm64: vgic: Require matching VGIC and ITS models
2026-10-20 16:39 [PATCH v3 0/2] KVM: arm64: Reject mismatched VGIC/ITS models Sascha Bischoff
@ 2026-10-20 16:39 ` Sascha Bischoff
2026-10-20 16:39 ` [PATCH v3 2/2] KVM: selftests: Reject GICv3 ITS with a GICv5 VGIC Sascha Bischoff
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Bischoff @ 2026-10-20 16:39 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, kvm
Cc: maz, oupton, fuad.tabba, joey.gouly, seiden, suzuki.poulose,
yuzenghui
On a GICv5 host with legacy support, KVM registers both VGICv3 and
VGICv5 devices. Without a model check, a VM can create a GICv3 ITS
alongside an incompatible VGIC, regardless of creation order.
The same problem exists for GICv2 on hosts that support a GICv3 ITS.
KVM used to allow userspace to create both devices in either order,
then ignored the ITS.
Record the VGIC model required by an ITS. Reject an ITS if the VM
already has an incompatible VGIC, and reject a VGIC if an existing
ITS requires a different model. These checks apply on every host:
a GICv2 VGIC and a GICv3 ITS now fail with -ENODEV in either order.
Allow either creation order when the models match.
Have vgic_has_its() require matching VGIC and ITS models, and drop
the separate has_its flag.
As part of this change, swap the type of vgic_model from u32 to enum
kvm_device_type. This requires updating the switch cases in
kvm_vgic_vcpu_init() and kvm_vgic_dist_destroy() to include default
cases, which we mark as unreachable().
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
---
arch/arm64/kvm/vgic/vgic-init.c | 17 +++++++++++++++++
arch/arm64/kvm/vgic/vgic-its.c | 15 ++++++++++++++-
arch/arm64/kvm/vgic/vgic-mmio-v3.c | 5 +----
include/kvm/arm_vgic.h | 5 +++--
4 files changed, 35 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c
index b5ea1e39c6862..e499cec70e607 100644
--- a/arch/arm64/kvm/vgic/vgic-init.c
+++ b/arch/arm64/kvm/vgic/vgic-init.c
@@ -125,6 +125,11 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
goto out_unlock;
}
+ if (kvm->arch.vgic.its_model && kvm->arch.vgic.its_model != type) {
+ ret = -ENODEV;
+ goto out_unlock;
+ }
+
if (kvm_id_regs_final(kvm))
goto out_unlock;
ret = 0;
@@ -437,6 +442,8 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
return ret;
switch (dist->vgic_model) {
+ case KVM_DEV_TYPE_ARM_VGIC_V2:
+ break;
case KVM_DEV_TYPE_ARM_VGIC_V3:
/*
* If we are creating a VCPU with a GICv3 we must also register
@@ -455,6 +462,9 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
*/
if (vcpu->vcpu_id >= kvm_vgic_global_state.max_gicv5_vcpus)
return -EINVAL;
+ break;
+ default:
+ unreachable();
}
return ret;
@@ -554,6 +564,10 @@ static void kvm_vgic_dist_destroy(struct kvm *kvm)
dist->nr_spis = 0;
dist->vgic_dist_base = VGIC_ADDR_UNDEF;
+ /* A VM may be destroyed without ever creating a VGIC. */
+ if (!dist->vgic_model)
+ goto out;
+
switch (dist->vgic_model) {
case KVM_DEV_TYPE_ARM_VGIC_V2:
dist->vgic_cpu_base = VGIC_ADDR_UNDEF;
@@ -571,8 +585,11 @@ static void kvm_vgic_dist_destroy(struct kvm *kvm)
kfree(dist->vgic_v5_irs_data);
dist->vgic_v5_irs_data = NULL;
break;
+ default:
+ unreachable();
}
+out:
xa_destroy(&dist->lpi_xa);
}
diff --git a/arch/arm64/kvm/vgic/vgic-its.c b/arch/arm64/kvm/vgic/vgic-its.c
index e5657cb603567..7df5869cff990 100644
--- a/arch/arm64/kvm/vgic/vgic-its.c
+++ b/arch/arm64/kvm/vgic/vgic-its.c
@@ -1875,6 +1875,19 @@ static int vgic_its_create(struct kvm_device *dev, u32 type)
mutex_lock(&dev->kvm->arch.config_lock);
+ /*
+ * Reject creation of a GICv3 ITS if:
+ * - The VM already has a VGIC other than GICv3.
+ * - An existing ITS requires a VGIC model other than GICv3.
+ */
+ if ((irqchip_in_kernel(dev->kvm) && !vgic_is_v3(dev->kvm)) ||
+ (dev->kvm->arch.vgic.its_model &&
+ dev->kvm->arch.vgic.its_model != KVM_DEV_TYPE_ARM_VGIC_V3)) {
+ mutex_unlock(&dev->kvm->arch.config_lock);
+ kfree(its);
+ return -ENODEV;
+ }
+
if (vgic_initialized(dev->kvm)) {
ret = vgic_v4_init(dev->kvm);
if (ret < 0) {
@@ -1902,7 +1915,7 @@ static int vgic_its_create(struct kvm_device *dev, u32 type)
xa_init(&its->translation_cache);
dev->kvm->arch.vgic.msis_require_devid = true;
- dev->kvm->arch.vgic.has_its = true;
+ dev->kvm->arch.vgic.its_model = KVM_DEV_TYPE_ARM_VGIC_V3;
its->enabled = false;
its->dev = dev;
diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
index 5ab789accc9d4..08f867ebc0df4 100644
--- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c
+++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
@@ -42,10 +42,7 @@ bool vgic_has_its(struct kvm *kvm)
{
struct vgic_dist *dist = &kvm->arch.vgic;
- if (dist->vgic_model != KVM_DEV_TYPE_ARM_VGIC_V3)
- return false;
-
- return dist->has_its;
+ return dist->its_model && dist->its_model == dist->vgic_model;
}
bool vgic_supports_direct_msis(struct kvm *kvm)
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index 7be81b936bf10..cad74eaff0a7e 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -502,7 +502,9 @@ struct vgic_dist {
bool initialized;
/* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
- u32 vgic_model;
+ enum kvm_device_type vgic_model;
+ /* VGIC model required by the VM's ITS devices. */
+ enum kvm_device_type its_model;
/* Implementation revision as reported in the GICD_IIDR */
u32 implementation_rev;
@@ -547,7 +549,6 @@ struct vgic_dist {
struct vgic_io_device dist_iodev;
struct vgic_io_device cpuif_iodev;
- bool has_its;
bool table_write_in_progress;
/*
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v3 2/2] KVM: selftests: Reject GICv3 ITS with a GICv5 VGIC
2026-10-20 16:39 [PATCH v3 0/2] KVM: arm64: Reject mismatched VGIC/ITS models Sascha Bischoff
2026-10-20 16:39 ` [PATCH v3 1/2] KVM: arm64: vgic: Require matching VGIC and ITS models Sascha Bischoff
@ 2026-10-20 16:39 ` Sascha Bischoff
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Bischoff @ 2026-10-20 16:39 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, kvm
Cc: maz, oupton, fuad.tabba, joey.gouly, seiden, suzuki.poulose,
yuzenghui
Check that a GICv3 ITS and a GICv5 VGIC cannot be paired, regardless
of which device is created first. Skip the check when the host does not
expose a GICv3 ITS.
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
---
tools/testing/selftests/kvm/arm64/vgic_v5.c | 32 +++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/tools/testing/selftests/kvm/arm64/vgic_v5.c b/tools/testing/selftests/kvm/arm64/vgic_v5.c
index d5df742b23001..5bf7d99d29147 100644
--- a/tools/testing/selftests/kvm/arm64/vgic_v5.c
+++ b/tools/testing/selftests/kvm/arm64/vgic_v5.c
@@ -2003,8 +2003,40 @@ int test_kvm_device(u32 gic_dev_type)
return 0;
}
+static void test_vgic_v3_its_with_vgic_v5(void)
+{
+ struct kvm_vm *vm = vm_create_barebones();
+ int gic_fd, its_fd, ret;
+
+ if (__kvm_test_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_ITS)) {
+ pr_info("No GICv3 ITS support; skipping mixed-model test.\n");
+ kvm_vm_free(vm);
+ return;
+ }
+
+ gic_fd = kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_V5);
+ ret = __kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_ITS);
+ TEST_ASSERT(ret < 0 && errno == ENODEV,
+ "GICv3 ITS created after GICv5 VGIC: ret=%d errno=%d",
+ ret, errno);
+ close(gic_fd);
+ kvm_vm_free(vm);
+
+ vm = vm_create_barebones();
+ its_fd = kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_ITS);
+ ret = __kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_V5);
+ TEST_ASSERT(ret < 0 && errno == ENODEV,
+ "GICv5 VGIC created after GICv3 ITS: ret=%d errno=%d",
+ ret, errno);
+ close(its_fd);
+ kvm_vm_free(vm);
+}
+
void run_tests(u32 gic_dev_type)
{
+ pr_info("Test VGICv5 and GICv3 ITS model mismatch\n");
+ test_vgic_v3_its_with_vgic_v5();
+
pr_info("Test VGICv5 address attrs\n");
test_vgic_v5_addr_attrs();
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread