[PATCH v1] KVM: arm64: pkvm: Clear GICv3 LRs in the hypervisor

[Vincent Donnefort <vdonnefort@google.com>]

The LR registers are architecturally UNKNOWN when the CPU boots or
resumes. However, in protected mode, only the used ones are reset.
During boot the HVC __vgic_v3_init_lrs() is never called because
vgic_present is only set in init_subsystems(), after cpu_hyp_init() was
called. Also, the PM notifier isn't registered for pKVM and the HVC
becomes unavailable after the host is deprivileged.

Let the hypervisor itself clear those registers on CPU_ON, resume and
before deprivileging the host.

Cc: stable@vger.kernel.org
Fixes: fa8c3d65538a ("KVM: arm64: Keep nVHE EL2 vector installed")
Signed-off-by: Vincent Donnefort <vdonnefort@google.com>
---
 arch/arm64/kvm/hyp/nvhe/hyp-main.c   | 3 +++
 arch/arm64/kvm/hyp/nvhe/psci-relay.c | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
index ac64a036b0a9..0e0ca29b224b 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
@@ -754,6 +754,9 @@ static void handle___pkvm_create_private_mapping(struct kvm_cpu_context *host_ct
 
 static void handle___pkvm_prot_finalize(struct kvm_cpu_context *host_ctxt)
 {
+	if (hyp_gicv3_nr_lr)
+		__vgic_v3_init_lrs();
+
 	cpu_reg(host_ctxt, 1) = __pkvm_prot_finalize();
 }
 
diff --git a/arch/arm64/kvm/hyp/nvhe/psci-relay.c b/arch/arm64/kvm/hyp/nvhe/psci-relay.c
index e20db999e328..a0e17e416bb5 100644
--- a/arch/arm64/kvm/hyp/nvhe/psci-relay.c
+++ b/arch/arm64/kvm/hyp/nvhe/psci-relay.c
@@ -213,6 +213,9 @@ static void __noreturn __kvm_host_psci_cpu_entry(unsigned long pc, unsigned long
 	write_sysreg_el1(INIT_SCTLR_EL1_MMU_OFF, SYS_SCTLR);
 	write_sysreg(INIT_PSTATE_EL1, SPSR_EL2);
 
+	if (hyp_gicv3_nr_lr)
+		__vgic_v3_init_lrs();
+
 	trace_hyp_exit(host_ctxt, HYP_REASON_PSCI);
 	__host_enter(host_ctxt);
 }

base-commit: c03c1a14507dfaf8b856c2608f9ac216021fc222
-- 
2.56.0.212.g129ede20d9-goog