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From: Jelly Jia <Jelly.Jia@cixtech.com>
To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, robin.murphy@arm.com
Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org,
	cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com
Subject: [PATCH v4 0/5] dmaengine: arm-dma350: Add slave support and Sky1 integration
Date: Fri, 23 Oct 2026 17:30:12 +0800	[thread overview]
Message-ID: <20261023093017.3248454-1-Jelly.Jia@cixtech.com> (raw)

Hello,

This series adds scatter-gather and cyclic slave transfer support to the
Arm DMA-350 driver, then describes the clock, reset and DMA address view
of the CIX Sky1 FCH integration.

Patch 1 fixes the source-trigger bit. Patch 2 adds peripheral transfers
with descriptor-owned resource mappings, coherent linked commands and
hardware-based residue reporting. Patches 3 and 4 document and handle
optional integration clocks and resets. Patch 5 describes the FCH DMA
address windows and adds its bus clock.

The controller nodes use arm,dma-350 in this revision. The driver changes
use standard integration resources and introduce no CIX-specific register
programming. The companion AUDSS interrupt-path series builds on this
one and manages the AUDSS interrupt gates in the CRU driver.

Changes since v3:
- Merge command-list synchronization into the slave/cyclic patch. Use
  descriptor-owned peripheral mappings, a coherent command pool and
  stable residue sampling; also handle little-endian commands, valid DMA
  address zero and maxburst in both directions. (Sashiko, v1-v3.)
- Keep clocks and resets optional and move allOf after required.
  (Krzysztof.) Use a deasserted reset rather than a reset pulse.
  (Sashiko, v3.)
- Describe DMA address windows with dma-ranges and omit memory-region
  from this series. (Rob.)
- Move AUDSS and its CRU-owned interrupt gates to the companion series,
  keeping CRU register accesses out of the DMA driver. (Conor's device
  separation comments.)
- Poll STOPCMD with a bounded timeout and retain IRQ and callback cleanup
  on timeout as best-effort teardown.
- Keep patch 1 unchanged and retain Frank's Reviewed-by.

Link: https://lore.kernel.org/r/20261012084155.2547480-1-Jelly.Jia@cixtech.com

Signed-off-by: Jelly Jia <Jelly.Jia@cixtech.com>

Jelly Jia (5):
  dmaengine: arm-dma350: Fix source trigger bit
  dmaengine: arm-dma350: Add slave and cyclic transfer support
  dt-bindings: dma: arm,dma-350: Document optional clocks and resets
  dmaengine: arm-dma350: Support integration clocks and resets
  arm64: dts: cix: Describe the Sky1 FCH DMA-350 integration

 .../devicetree/bindings/dma/arm,dma-350.yaml  |  16 +-
 arch/arm64/boot/dts/cix/sky1.dtsi             |  36 +-
 drivers/dma/arm-dma350.c                      | 771 +++++++++++++++++-
 3 files changed, 778 insertions(+), 45 deletions(-)


base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
-- 
2.54.0



             reply	other threads:[~2026-10-23  9:30 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-23  9:30 Jelly Jia [this message]
2026-10-23  9:30 ` [PATCH v4 1/5] dmaengine: arm-dma350: Fix source trigger bit Jelly Jia
2026-10-23  9:30 ` [PATCH v4 2/5] dmaengine: arm-dma350: Add slave and cyclic transfer support Jelly Jia
2026-10-23  9:30 ` [PATCH v4 3/5] dt-bindings: dma: arm,dma-350: Document optional clocks and resets Jelly Jia
2026-10-23  9:30 ` [PATCH v4 4/5] dmaengine: arm-dma350: Support integration " Jelly Jia
2026-10-23  9:30 ` [PATCH v4 5/5] arm64: dts: cix: Describe the Sky1 FCH DMA-350 integration Jelly Jia

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