From: Shaokun Zhang <zhangshaokun@hisilicon.com>
To: <linux-arm-kernel@lists.infradead.org>
Cc: Mark Rutland <mark.rutland@arm.com>, Will Deacon <will@kernel.org>
Subject: Re: [PATCH v2 3/3] arm64: perf: Correct the event index in sysfs
Date: Tue, 5 May 2020 12:29:23 +0800 [thread overview]
Message-ID: <22cb412e-ebc0-461f-c5a2-6c21e217b00a@hisilicon.com> (raw)
In-Reply-To: <1588652200-12341-3-git-send-email-zhangshaokun@hisilicon.com>
Hi Will,
On 2020/5/5 12:16, Shaokun Zhang wrote:
> When PMU event ID is equal or greater than 0x4000, it will be reduced
> by 0x4000 and it is not the raw number in the sysfs. Let's correct it
> and obtain the right event ID.
>
> Before this patch:
> cat /sys/bus/event_source/devices/armv8_pmuv3_0/events/sample_feed
> event=0x001
> After this patch:
> cat /sys/bus/event_source/devices/armv8_pmuv3_0/events/sample_feed
> event=0x4001
>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
> ---
> arch/arm64/kernel/perf_event.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
> index 32c87cd48cbe..bd73e7f0e652 100644
> --- a/arch/arm64/kernel/perf_event.c
> +++ b/arch/arm64/kernel/perf_event.c
> @@ -155,7 +155,7 @@ armv8pmu_events_sysfs_show(struct device *dev,
>
> pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
>
> - return sprintf(page, "event=0x%03llx\n", pmu_attr->id);
> + return sprintf(page, "event=0x%04llx\n", pmu_attr->id);
> }
>
> #define ARMV8_EVENT_ATTR(name, config) \
> @@ -263,10 +263,13 @@ armv8pmu_event_attr_is_visible(struct kobject *kobj,
> test_bit(pmu_attr->id, cpu_pmu->pmceid_bitmap))
> return attr->mode;
>
> - pmu_attr->id -= ARMV8_PMUV3_EXT_COMMON_EVENT_BASE;
> - if (pmu_attr->id < ARMV8_PMUV3_MAX_COMMON_EVENTS &&
> - test_bit(pmu_attr->id, cpu_pmu->pmceid_ext_bitmap))
> - return attr->mode;
> + if (pmu_attr->id > ARMV8_PMUV3_EXT_COMMON_EVENT_BASE) {
Apologies that this shall be:
if (pmu_attr->id >= ARMV8_PMUV3_EXT_COMMON_EVENT_BASE) {
Thanks,
Shaokun
> + u64 id = pmu_attr->id - ARMV8_PMUV3_EXT_COMMON_EVENT_BASE;
> +
> + if (id < ARMV8_PMUV3_MAX_COMMON_EVENTS && test_bit(id,
> + cpu_pmu->pmceid_ext_bitmap))
> + return attr->mode;
> + }
>
> return 0;
> }
>
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next prev parent reply other threads:[~2020-05-05 4:29 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-05 4:16 [PATCH v2 1/3] arm64: perf: Add support caps in sysfs Shaokun Zhang
2020-05-05 4:16 ` [PATCH v2 2/3] arm64: perf: Expose some new events via sysfs Shaokun Zhang
2020-05-05 4:16 ` [PATCH v2 3/3] arm64: perf: Correct the event index in sysfs Shaokun Zhang
2020-05-05 4:29 ` Shaokun Zhang [this message]
2020-05-18 3:18 ` [PATCH v2 1/3] arm64: perf: Add support caps " Shaokun Zhang
2020-05-27 12:31 ` Shaokun Zhang
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