* [PATCH net-next 0/3] net: stmmac: Add UltraRISC DP1000 GMAC support
@ 2026-09-01 1:27 Jia Wang
2026-09-01 1:27 ` [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible Jia Wang
` (2 more replies)
0 siblings, 3 replies; 11+ messages in thread
From: Jia Wang @ 2026-09-01 1:27 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maxime Chevallier, Maxime Coquelin, Alexandre Torgue,
Giuseppe Cavallaro, Jose Abreu
Cc: netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel,
Jia Wang
The UltraRISC DP1000 integrates a Synopsys DesignWare GMAC from the 5.20
series with fixed TX and RX RGMII clock delays that cannot be disabled.
For boards without PCB delays, "rgmii-id" describes the link. Passing this
mode unchanged to the PHY would enable another pair of delays and break the
RGMII timing.
Add a dedicated binding and a small DWMAC glue driver. The driver uses
phy_fix_phy_mode_for_mac_delays() to account for the fixed delays before
attaching the PHY and rejects unsupported RGMII modes.
Tested with:
1. dt_binding_check and dtbs_check.
2. RISC-V build with CONFIG_DWMAC_ULTRARISC=m.
3. Runtime validation on Shenzhen Rongda M0 with a YT8531S PHY and
Milk-V Titan with an RTL8211F PHY: ultrarisc-dwmac binds and
establishes a 1000 Mb/s full-duplex link on both boards.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
Jia Wang (3):
dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible
dt-bindings: net: Add UltraRISC DP1000 GMAC
net: stmmac: Add UltraRISC DP1000 GMAC support
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../bindings/net/ultrarisc,dp1000-gmac.yaml | 74 ++++++++++++++++++++++
MAINTAINERS | 6 ++
drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++++
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c | 54 ++++++++++++++++
6 files changed, 147 insertions(+)
---
base-commit: abdf623ddb75b24659018d3952d8f61937306ae5
change-id: 20260827-dwmac-ultrarisc-7c79f2f80fd1
Best regards,
--
Jia Wang <wangjia@ultrarisc.com>
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible 2026-09-01 1:27 [PATCH net-next 0/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang @ 2026-09-01 1:27 ` Jia Wang 2026-09-01 17:46 ` Conor Dooley 2026-09-01 1:27 ` [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC Jia Wang 2026-09-01 1:27 ` [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2 siblings, 1 reply; 11+ messages in thread From: Jia Wang @ 2026-09-01 1:27 UTC (permalink / raw) To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu Cc: netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, Jia Wang The UltraRISC DP1000 GMAC is based on a Synopsys DesignWare MAC. Allow its SoC-specific compatible in the common DWMAC compatible list. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 2449311c6d28..2ed4564ae99d 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -119,6 +119,7 @@ properties: - starfive,jh7110-dwmac - tesla,fsd-ethqos - thead,th1520-gmac + - ultrarisc,dp1000-gmac reg: minItems: 1 -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible 2026-09-01 1:27 ` [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible Jia Wang @ 2026-09-01 17:46 ` Conor Dooley 2026-09-02 9:35 ` Jia Wang 0 siblings, 1 reply; 11+ messages in thread From: Conor Dooley @ 2026-09-01 17:46 UTC (permalink / raw) To: Jia Wang Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel [-- Attachment #1: Type: text/plain, Size: 978 bytes --] On Tue, Sep 01, 2026 at 09:27:30AM +0800, Jia Wang wrote: > The UltraRISC DP1000 GMAC is based on a Synopsys DesignWare MAC. > > Allow its SoC-specific compatible in the common DWMAC compatible list. > > Signed-off-by: Jia Wang <wangjia@ultrarisc.com> > --- > Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > index 2449311c6d28..2ed4564ae99d 100644 > --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > @@ -119,6 +119,7 @@ properties: > - starfive,jh7110-dwmac > - tesla,fsd-ethqos > - thead,th1520-gmac > + - ultrarisc,dp1000-gmac This should not be a standalone patch, rather merged with the other dt one. > > reg: > minItems: 1 > > -- > 2.34.1 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible 2026-09-01 17:46 ` Conor Dooley @ 2026-09-02 9:35 ` Jia Wang 0 siblings, 0 replies; 11+ messages in thread From: Jia Wang @ 2026-09-02 9:35 UTC (permalink / raw) To: Conor Dooley Cc: Jia Wang, Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel On 2026-09-01 18:46 +0100, Conor Dooley wrote: > On Tue, Sep 01, 2026 at 09:27:30AM +0800, Jia Wang wrote: > > The UltraRISC DP1000 GMAC is based on a Synopsys DesignWare MAC. > > > > Allow its SoC-specific compatible in the common DWMAC compatible list. > > > > Signed-off-by: Jia Wang <wangjia@ultrarisc.com> > > --- > > Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > index 2449311c6d28..2ed4564ae99d 100644 > > --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > @@ -119,6 +119,7 @@ properties: > > - starfive,jh7110-dwmac > > - tesla,fsd-ethqos > > - thead,th1520-gmac > > + - ultrarisc,dp1000-gmac > > This should not be a standalone patch, rather merged with the other dt > one. > Thanks, I will squash this change into the DP1000-specific binding patch in v2. Best regards, Jia Wang > > > > reg: > > minItems: 1 > > > > -- > > 2.34.1 > > ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC 2026-09-01 1:27 [PATCH net-next 0/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2026-09-01 1:27 ` [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible Jia Wang @ 2026-09-01 1:27 ` Jia Wang 2026-09-01 17:47 ` Conor Dooley 2026-09-01 1:27 ` [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2 siblings, 1 reply; 11+ messages in thread From: Jia Wang @ 2026-09-01 1:27 UTC (permalink / raw) To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu Cc: netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, Jia Wang The DP1000 integrates a Synopsys DesignWare GMAC from the 5.20 series with one MMIO register range, one clock and one interrupt. It also provides fixed TX and RX RGMII clock delays that cannot be disabled. Board connections must therefore not add either delay in PCB traces, making "rgmii-id" the only supported phy-mode. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> --- .../bindings/net/ultrarisc,dp1000-gmac.yaml | 74 ++++++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 79 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml new file mode 100644 index 000000000000..13029302877b --- /dev/null +++ b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ultrarisc,dp1000-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UltraRISC DP1000 DWMAC Ethernet controller + +maintainers: + - Jia Wang <wangjia@ultrarisc.com> + +description: + The DP1000 integrates a Synopsys DesignWare GMAC controller from the + 5.20 series. The SoC integration adds fixed RGMII TX and RX clock delays + which cannot be disabled. Consequently, a functional RGMII link requires + a PCB without TX or RX clock delays, represented by "rgmii-id". + +select: + properties: + compatible: + contains: + const: ultrarisc,dp1000-gmac + required: + - compatible + +properties: + compatible: + items: + - const: ultrarisc,dp1000-gmac + - const: snps,dwmac-5.20 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: stmmaceth + + interrupts: + maxItems: 1 + + interrupt-names: + const: macirq + + phy-mode: + const: rgmii-id + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - phy-mode + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + ethernet@38000000 { + compatible = "ultrarisc,dp1000-gmac", "snps,dwmac-5.20"; + reg = <0x38000000 0x1000000>; + clocks = <&clk 0>; + clock-names = "stmmaceth"; + interrupts = <84>; + interrupt-names = "macirq"; + phy-mode = "rgmii-id"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 3a19da74d00c..3b96ff0734e6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -28004,6 +28004,11 @@ F: Documentation/devicetree/bindings/clock/ultrarisc,dp1000-clk.yaml F: drivers/clk/ultrarisc/* F: include/dt-bindings/clock/ultrarisc,dp1000-clk.h +ULTRARISC DP1000 DWMAC GLUE LAYER +M: Jia Wang <wangjia@ultrarisc.com> +S: Maintained +F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml + ULTRARISC DP1000 PINCTRL DRIVER M: Jia Wang <wangjia@ultrarisc.com> L: linux-gpio@vger.kernel.org -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC 2026-09-01 1:27 ` [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC Jia Wang @ 2026-09-01 17:47 ` Conor Dooley 0 siblings, 0 replies; 11+ messages in thread From: Conor Dooley @ 2026-09-01 17:47 UTC (permalink / raw) To: Jia Wang Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel [-- Attachment #1: Type: text/plain, Size: 3502 bytes --] On Tue, Sep 01, 2026 at 09:27:31AM +0800, Jia Wang wrote: > The DP1000 integrates a Synopsys DesignWare GMAC from the 5.20 series with > one MMIO register range, one clock and one interrupt. > > It also provides fixed TX and RX RGMII clock delays that cannot be > disabled. Board connections must therefore not add either delay in PCB > traces, making "rgmii-id" the only supported phy-mode. > > Signed-off-by: Jia Wang <wangjia@ultrarisc.com> This seems fine, just squash in the other binding patch. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../bindings/net/ultrarisc,dp1000-gmac.yaml | 74 ++++++++++++++++++++++ > MAINTAINERS | 5 ++ > 2 files changed, 79 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml > new file mode 100644 > index 000000000000..13029302877b > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/ultrarisc,dp1000-gmac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: UltraRISC DP1000 DWMAC Ethernet controller > + > +maintainers: > + - Jia Wang <wangjia@ultrarisc.com> > + > +description: > + The DP1000 integrates a Synopsys DesignWare GMAC controller from the > + 5.20 series. The SoC integration adds fixed RGMII TX and RX clock delays > + which cannot be disabled. Consequently, a functional RGMII link requires > + a PCB without TX or RX clock delays, represented by "rgmii-id". > + > +select: > + properties: > + compatible: > + contains: > + const: ultrarisc,dp1000-gmac > + required: > + - compatible > + > +properties: > + compatible: > + items: > + - const: ultrarisc,dp1000-gmac > + - const: snps,dwmac-5.20 > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: stmmaceth > + > + interrupts: > + maxItems: 1 > + > + interrupt-names: > + const: macirq > + > + phy-mode: > + const: rgmii-id > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - phy-mode > + > +allOf: > + - $ref: snps,dwmac.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + ethernet@38000000 { > + compatible = "ultrarisc,dp1000-gmac", "snps,dwmac-5.20"; > + reg = <0x38000000 0x1000000>; > + clocks = <&clk 0>; > + clock-names = "stmmaceth"; > + interrupts = <84>; > + interrupt-names = "macirq"; > + phy-mode = "rgmii-id"; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 3a19da74d00c..3b96ff0734e6 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -28004,6 +28004,11 @@ F: Documentation/devicetree/bindings/clock/ultrarisc,dp1000-clk.yaml > F: drivers/clk/ultrarisc/* > F: include/dt-bindings/clock/ultrarisc,dp1000-clk.h > > +ULTRARISC DP1000 DWMAC GLUE LAYER > +M: Jia Wang <wangjia@ultrarisc.com> > +S: Maintained > +F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml > + > ULTRARISC DP1000 PINCTRL DRIVER > M: Jia Wang <wangjia@ultrarisc.com> > L: linux-gpio@vger.kernel.org > > -- > 2.34.1 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support 2026-09-01 1:27 [PATCH net-next 0/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2026-09-01 1:27 ` [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible Jia Wang 2026-09-01 1:27 ` [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC Jia Wang @ 2026-09-01 1:27 ` Jia Wang 2026-09-01 7:29 ` Maxime Chevallier 2026-09-01 13:48 ` Andrew Lunn 2 siblings, 2 replies; 11+ messages in thread From: Jia Wang @ 2026-09-01 1:27 UTC (permalink / raw) To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu Cc: netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, Jia Wang The DP1000 GMAC integration provides fixed TX and RX RGMII clock delays that cannot be disabled. For boards without PCB delays, "rgmii-id" describes the link, but passing that mode unchanged to the PHY would enable a second set of delays. Use phy_fix_phy_mode_for_mac_delays() to translate "rgmii-id" to "rgmii" before attaching the PHY. Reject other RGMII modes because the fixed MAC delays cannot be combined with them without duplicating or omitting a delay. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> --- MAINTAINERS | 1 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +++++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c | 54 ++++++++++++++++++++++ 4 files changed, 67 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3b96ff0734e6..aacbab369b51 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -28008,6 +28008,7 @@ ULTRARISC DP1000 DWMAC GLUE LAYER M: Jia Wang <wangjia@ultrarisc.com> S: Maintained F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml +F: drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c ULTRARISC DP1000 PINCTRL DRIVER M: Jia Wang <wangjia@ultrarisc.com> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index e3dd5adda5ac..ab3c4cf96423 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -319,6 +319,17 @@ config DWMAC_THEAD the stmmac device driver. This driver is used for T-HEAD TH1520 ethernet controller. +config DWMAC_ULTRARISC + tristate "UltraRISC DWMAC support" + default ARCH_ULTRARISC + depends on OF && (ARCH_ULTRARISC || COMPILE_TEST) + help + Support for the Ethernet controller on the UltraRISC DP1000 SoC. + + This selects the UltraRISC platform specific glue layer support + for the stmmac device driver. This driver is used for the DP1000 + GMAC Ethernet controller. + config DWMAC_IMX8 tristate "NXP IMX8 DWMAC support" default ARCH_MXC diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index a1cea2f57252..b16a456b730e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o obj-$(CONFIG_DWMAC_SUN55I) += dwmac-sun55i.o obj-$(CONFIG_DWMAC_THEAD) += dwmac-thead.o +obj-$(CONFIG_DWMAC_ULTRARISC) += dwmac-ultrarisc.o obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o obj-$(CONFIG_DWMAC_LOONGSON1) += dwmac-loongson1.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c new file mode 100644 index 000000000000..4bdda2665338 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * UltraRISC DWMAC platform driver + * + * Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd. + */ + +#include <linux/module.h> +#include <linux/phy.h> +#include <linux/platform_device.h> + +#include "stmmac_platform.h" + +static int ultrarisc_dwmac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct device *dev = &pdev->dev; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return dev_err_probe(dev, ret, "failed to get resources\n"); + + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return dev_err_probe(dev, PTR_ERR(plat_dat), "failed to parse DT parameters\n"); + + plat_dat->phy_interface = + phy_fix_phy_mode_for_mac_delays(plat_dat->phy_interface, true, true); + if (plat_dat->phy_interface == PHY_INTERFACE_MODE_NA) + return dev_err_probe(dev, -EINVAL, "unsupported phy interface mode\n"); + + return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); +} + +static const struct of_device_id ultrarisc_dwmac_match[] = { + { .compatible = "ultrarisc,dp1000-gmac" }, + { } +}; +MODULE_DEVICE_TABLE(of, ultrarisc_dwmac_match); + +static struct platform_driver ultrarisc_dwmac_driver = { + .probe = ultrarisc_dwmac_probe, + .driver = { + .name = "ultrarisc-dwmac", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = ultrarisc_dwmac_match, + }, +}; +module_platform_driver(ultrarisc_dwmac_driver); + +MODULE_DESCRIPTION("UltraRISC DWMAC platform driver"); +MODULE_LICENSE("GPL"); -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support 2026-09-01 1:27 ` [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang @ 2026-09-01 7:29 ` Maxime Chevallier 2026-09-01 8:32 ` Jia Wang 2026-09-01 13:48 ` Andrew Lunn 1 sibling, 1 reply; 11+ messages in thread From: Maxime Chevallier @ 2026-09-01 7:29 UTC (permalink / raw) To: Jia Wang, Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu Cc: netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel Hello, On 9/1/26 03:27, Jia Wang wrote: > The DP1000 GMAC integration provides fixed TX and RX RGMII clock delays > that cannot be disabled. For boards without PCB delays, "rgmii-id" > describes the link, but passing that mode unchanged to the PHY would enable > a second set of delays. > > Use phy_fix_phy_mode_for_mac_delays() to translate "rgmii-id" to "rgmii" > before attaching the PHY. Reject other RGMII modes because the fixed MAC > delays cannot be combined with them without duplicating or omitting a > delay. > > Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Simple enough, this is nice :) One thing, I'm going to start requiring this for new glue drivers, can you give the output of "ethtool -t eth0" on your device with this new glue driver ? You'll have to enable CONFIG_STMMAC_SELFTESTS As this is is a 5.20, I'm expecting you'll get something like : 1. MAC Loopback 0 2. MMC Counters 0 3. EEE -95 4. Hash Filter MC 0 5. Perfect Filter UC 0 6. MC Filter 0 7. UC Filter 0 8. Flow Control -95 9. RSS -95 10. VLAN Filtering -110 11. VLAN Filtering (perf) -110 12. Double VLAN Filter -110 13. Double VLAN Filter (perf) -110 14. Flexible RX Parser -95 15. SA Insertion (desc) 0 16. SA Replacement (desc) 0 17. SA Insertion (reg) 0 18. SA Replacement (reg) 0 19. VLAN TX Insertion -110 20. SVLAN TX Insertion -95 21. L3 DA Filtering -95 22. L3 SA Filtering -95 23. L4 DA TCP Filtering -95 24. L4 SA TCP Filtering -95 25. L4 DA UDP Filtering -95 26. L4 SA UDP Filtering -95 27. ARP Offload -110 28. Jumbo Frame 0 29. Multichannel Jumbo -95 30. Split Header -95 31. TBS (ETF Scheduler) -95 -95 (-EOPNOTSUP) and 0 are OK, watch for any other values. If ARP Offload and any VLAN selftest (insertion and filtering), this is a known issue and you can ignore :) Maxime > --- > MAINTAINERS | 1 + > drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +++++ > drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + > .../net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c | 54 ++++++++++++++++++++++ > 4 files changed, 67 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 3b96ff0734e6..aacbab369b51 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -28008,6 +28008,7 @@ ULTRARISC DP1000 DWMAC GLUE LAYER > M: Jia Wang <wangjia@ultrarisc.com> > S: Maintained > F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml > +F: drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > > ULTRARISC DP1000 PINCTRL DRIVER > M: Jia Wang <wangjia@ultrarisc.com> > diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig > index e3dd5adda5ac..ab3c4cf96423 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig > +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig > @@ -319,6 +319,17 @@ config DWMAC_THEAD > the stmmac device driver. This driver is used for T-HEAD TH1520 > ethernet controller. > > +config DWMAC_ULTRARISC > + tristate "UltraRISC DWMAC support" > + default ARCH_ULTRARISC > + depends on OF && (ARCH_ULTRARISC || COMPILE_TEST) > + help > + Support for the Ethernet controller on the UltraRISC DP1000 SoC. > + > + This selects the UltraRISC platform specific glue layer support > + for the stmmac device driver. This driver is used for the DP1000 > + GMAC Ethernet controller. > + > config DWMAC_IMX8 > tristate "NXP IMX8 DWMAC support" > default ARCH_MXC > diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile > index a1cea2f57252..b16a456b730e 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/Makefile > +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile > @@ -36,6 +36,7 @@ obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o > obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o > obj-$(CONFIG_DWMAC_SUN55I) += dwmac-sun55i.o > obj-$(CONFIG_DWMAC_THEAD) += dwmac-thead.o > +obj-$(CONFIG_DWMAC_ULTRARISC) += dwmac-ultrarisc.o > obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o > obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o > obj-$(CONFIG_DWMAC_LOONGSON1) += dwmac-loongson1.o > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > new file mode 100644 > index 000000000000..4bdda2665338 > --- /dev/null > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > @@ -0,0 +1,54 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * UltraRISC DWMAC platform driver > + * > + * Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd. > + */ > + > +#include <linux/module.h> > +#include <linux/phy.h> > +#include <linux/platform_device.h> > + > +#include "stmmac_platform.h" > + > +static int ultrarisc_dwmac_probe(struct platform_device *pdev) > +{ > + struct plat_stmmacenet_data *plat_dat; > + struct stmmac_resources stmmac_res; > + struct device *dev = &pdev->dev; > + int ret; > + > + ret = stmmac_get_platform_resources(pdev, &stmmac_res); > + if (ret) > + return dev_err_probe(dev, ret, "failed to get resources\n"); > + > + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); > + if (IS_ERR(plat_dat)) > + return dev_err_probe(dev, PTR_ERR(plat_dat), "failed to parse DT parameters\n"); > + > + plat_dat->phy_interface = > + phy_fix_phy_mode_for_mac_delays(plat_dat->phy_interface, true, true); > + if (plat_dat->phy_interface == PHY_INTERFACE_MODE_NA) > + return dev_err_probe(dev, -EINVAL, "unsupported phy interface mode\n"); > + > + return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); > +} > + > +static const struct of_device_id ultrarisc_dwmac_match[] = { > + { .compatible = "ultrarisc,dp1000-gmac" }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, ultrarisc_dwmac_match); > + > +static struct platform_driver ultrarisc_dwmac_driver = { > + .probe = ultrarisc_dwmac_probe, > + .driver = { > + .name = "ultrarisc-dwmac", > + .pm = &stmmac_pltfr_pm_ops, > + .of_match_table = ultrarisc_dwmac_match, > + }, > +}; > +module_platform_driver(ultrarisc_dwmac_driver); > + > +MODULE_DESCRIPTION("UltraRISC DWMAC platform driver"); > +MODULE_LICENSE("GPL"); > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support 2026-09-01 7:29 ` Maxime Chevallier @ 2026-09-01 8:32 ` Jia Wang 2026-09-01 9:05 ` Maxime Chevallier 0 siblings, 1 reply; 11+ messages in thread From: Jia Wang @ 2026-09-01 8:32 UTC (permalink / raw) To: Maxime Chevallier Cc: Jia Wang, Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel On 2026-09-01 09:29 +0200, Maxime Chevallier wrote: > Hello, > > On 9/1/26 03:27, Jia Wang wrote: > > The DP1000 GMAC integration provides fixed TX and RX RGMII clock delays > > that cannot be disabled. For boards without PCB delays, "rgmii-id" > > describes the link, but passing that mode unchanged to the PHY would enable > > a second set of delays. > > > > Use phy_fix_phy_mode_for_mac_delays() to translate "rgmii-id" to "rgmii" > > before attaching the PHY. Reject other RGMII modes because the fixed MAC > > delays cannot be combined with them without duplicating or omitting a > > delay. > > > > Signed-off-by: Jia Wang <wangjia@ultrarisc.com> > > Simple enough, this is nice :) > > One thing, I'm going to start requiring this for new glue drivers, can you give > the output of "ethtool -t eth0" on your device with this new glue driver ? > > You'll have to enable CONFIG_STMMAC_SELFTESTS > > As this is is a 5.20, I'm expecting you'll get something like : > > 1. MAC Loopback 0 > 2. MMC Counters 0 > 3. EEE -95 > 4. Hash Filter MC 0 > 5. Perfect Filter UC 0 > 6. MC Filter 0 > 7. UC Filter 0 > 8. Flow Control -95 > 9. RSS -95 > 10. VLAN Filtering -110 > 11. VLAN Filtering (perf) -110 > 12. Double VLAN Filter -110 > 13. Double VLAN Filter (perf) -110 > 14. Flexible RX Parser -95 > 15. SA Insertion (desc) 0 > 16. SA Replacement (desc) 0 > 17. SA Insertion (reg) 0 > 18. SA Replacement (reg) 0 > 19. VLAN TX Insertion -110 > 20. SVLAN TX Insertion -95 > 21. L3 DA Filtering -95 > 22. L3 SA Filtering -95 > 23. L4 DA TCP Filtering -95 > 24. L4 SA TCP Filtering -95 > 25. L4 DA UDP Filtering -95 > 26. L4 SA UDP Filtering -95 > 27. ARP Offload -110 > 28. Jumbo Frame 0 > 29. Multichannel Jumbo -95 > 30. Split Header -95 > 31. TBS (ETF Scheduler) -95 > > -95 (-EOPNOTSUP) and 0 are OK, watch for any other values. > > If ARP Offload and any VLAN selftest (insertion and filtering), this is a known > issue and you can ignore :) > Thanks. I enabled CONFIG_STMMAC_SELFTESTS and ran the test on the Milk-V Titan with the new glue driver: 1. MAC Loopback 0 2. MMC Counters 0 3. EEE -95 4. Hash Filter MC 0 5. Perfect Filter UC -95 6. MC Filter -95 7. UC Filter -95 8. Flow Control 0 9. RSS -95 10. VLAN Filtering -110 11. VLAN Filtering (perf) -110 12. Double VLAN Filter -110 13. Double VLAN Filter (perf) -110 14. Flexible RX Parser -95 15. SA Insertion (desc) 0 16. SA Replacement (desc) 0 17. SA Insertion (reg) 0 18. SA Replacement (reg) 0 19. VLAN TX Insertion -110 20. SVLAN TX Insertion -110 21. L3 DA Filtering -95 22. L3 SA Filtering -95 23. L4 DA TCP Filtering -95 24. L4 SA TCP Filtering -95 25. L4 DA UDP Filtering -95 26. L4 SA UDP Filtering -95 27. ARP Offload -110 28. Jumbo Frame 0 29. Multichannel Jumbo -95 30. Split Header 0 31. TBS (ETF Scheduler) -95 > Maxime > > Best regards, Jia Wang > > --- > > MAINTAINERS | 1 + > > drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +++++ > > drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + > > .../net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c | 54 ++++++++++++++++++++++ > > 4 files changed, 67 insertions(+) > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 3b96ff0734e6..aacbab369b51 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -28008,6 +28008,7 @@ ULTRARISC DP1000 DWMAC GLUE LAYER > > M: Jia Wang <wangjia@ultrarisc.com> > > S: Maintained > > F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml > > +F: drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > > > > ULTRARISC DP1000 PINCTRL DRIVER > > M: Jia Wang <wangjia@ultrarisc.com> > > diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig > > index e3dd5adda5ac..ab3c4cf96423 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig > > +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig > > @@ -319,6 +319,17 @@ config DWMAC_THEAD > > the stmmac device driver. This driver is used for T-HEAD TH1520 > > ethernet controller. > > > > +config DWMAC_ULTRARISC > > + tristate "UltraRISC DWMAC support" > > + default ARCH_ULTRARISC > > + depends on OF && (ARCH_ULTRARISC || COMPILE_TEST) > > + help > > + Support for the Ethernet controller on the UltraRISC DP1000 SoC. > > + > > + This selects the UltraRISC platform specific glue layer support > > + for the stmmac device driver. This driver is used for the DP1000 > > + GMAC Ethernet controller. > > + > > config DWMAC_IMX8 > > tristate "NXP IMX8 DWMAC support" > > default ARCH_MXC > > diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile > > index a1cea2f57252..b16a456b730e 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/Makefile > > +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile > > @@ -36,6 +36,7 @@ obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o > > obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o > > obj-$(CONFIG_DWMAC_SUN55I) += dwmac-sun55i.o > > obj-$(CONFIG_DWMAC_THEAD) += dwmac-thead.o > > +obj-$(CONFIG_DWMAC_ULTRARISC) += dwmac-ultrarisc.o > > obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o > > obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o > > obj-$(CONFIG_DWMAC_LOONGSON1) += dwmac-loongson1.o > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > > new file mode 100644 > > index 000000000000..4bdda2665338 > > --- /dev/null > > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > > @@ -0,0 +1,54 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +/* > > + * UltraRISC DWMAC platform driver > > + * > > + * Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd. > > + */ > > + > > +#include <linux/module.h> > > +#include <linux/phy.h> > > +#include <linux/platform_device.h> > > + > > +#include "stmmac_platform.h" > > + > > +static int ultrarisc_dwmac_probe(struct platform_device *pdev) > > +{ > > + struct plat_stmmacenet_data *plat_dat; > > + struct stmmac_resources stmmac_res; > > + struct device *dev = &pdev->dev; > > + int ret; > > + > > + ret = stmmac_get_platform_resources(pdev, &stmmac_res); > > + if (ret) > > + return dev_err_probe(dev, ret, "failed to get resources\n"); > > + > > + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); > > + if (IS_ERR(plat_dat)) > > + return dev_err_probe(dev, PTR_ERR(plat_dat), "failed to parse DT parameters\n"); > > + > > + plat_dat->phy_interface = > > + phy_fix_phy_mode_for_mac_delays(plat_dat->phy_interface, true, true); > > + if (plat_dat->phy_interface == PHY_INTERFACE_MODE_NA) > > + return dev_err_probe(dev, -EINVAL, "unsupported phy interface mode\n"); > > + > > + return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); > > +} > > + > > +static const struct of_device_id ultrarisc_dwmac_match[] = { > > + { .compatible = "ultrarisc,dp1000-gmac" }, > > + { } > > +}; > > +MODULE_DEVICE_TABLE(of, ultrarisc_dwmac_match); > > + > > +static struct platform_driver ultrarisc_dwmac_driver = { > > + .probe = ultrarisc_dwmac_probe, > > + .driver = { > > + .name = "ultrarisc-dwmac", > > + .pm = &stmmac_pltfr_pm_ops, > > + .of_match_table = ultrarisc_dwmac_match, > > + }, > > +}; > > +module_platform_driver(ultrarisc_dwmac_driver); > > + > > +MODULE_DESCRIPTION("UltraRISC DWMAC platform driver"); > > +MODULE_LICENSE("GPL"); > > > > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support 2026-09-01 8:32 ` Jia Wang @ 2026-09-01 9:05 ` Maxime Chevallier 0 siblings, 0 replies; 11+ messages in thread From: Maxime Chevallier @ 2026-09-01 9:05 UTC (permalink / raw) To: Jia Wang Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel Hi, On 9/1/26 10:32, Jia Wang wrote: > On 2026-09-01 09:29 +0200, Maxime Chevallier wrote: >> Hello, >> >> On 9/1/26 03:27, Jia Wang wrote: >>> The DP1000 GMAC integration provides fixed TX and RX RGMII clock delays >>> that cannot be disabled. For boards without PCB delays, "rgmii-id" >>> describes the link, but passing that mode unchanged to the PHY would enable >>> a second set of delays. >>> >>> Use phy_fix_phy_mode_for_mac_delays() to translate "rgmii-id" to "rgmii" >>> before attaching the PHY. Reject other RGMII modes because the fixed MAC >>> delays cannot be combined with them without duplicating or omitting a >>> delay. [...] > > Thanks. I enabled CONFIG_STMMAC_SELFTESTS and ran the test on the Milk-V > Titan with the new glue driver: > > 1. MAC Loopback 0 > 2. MMC Counters 0 > 3. EEE -95 > 4. Hash Filter MC 0 > 5. Perfect Filter UC -95 > 6. MC Filter -95 > 7. UC Filter -95 > 8. Flow Control 0 > 9. RSS -95 > 10. VLAN Filtering -110 > 11. VLAN Filtering (perf) -110 > 12. Double VLAN Filter -110 > 13. Double VLAN Filter (perf) -110 > 14. Flexible RX Parser -95 > 15. SA Insertion (desc) 0 > 16. SA Replacement (desc) 0 > 17. SA Insertion (reg) 0 > 18. SA Replacement (reg) 0 > 19. VLAN TX Insertion -110 > 20. SVLAN TX Insertion -110 > 21. L3 DA Filtering -95 > 22. L3 SA Filtering -95 > 23. L4 DA TCP Filtering -95 > 24. L4 SA TCP Filtering -95 > 25. L4 DA UDP Filtering -95 > 26. L4 SA UDP Filtering -95 > 27. ARP Offload -110 > 28. Jumbo Frame 0 > 29. Multichannel Jumbo -95 > 30. Split Header 0 > 31. TBS (ETF Scheduler) -95 Awesome, that's pretty-much what I expected, nothing too bad stands out :) Code itself looks good, no obvious error, so Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Maxime ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support 2026-09-01 1:27 ` [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2026-09-01 7:29 ` Maxime Chevallier @ 2026-09-01 13:48 ` Andrew Lunn 1 sibling, 0 replies; 11+ messages in thread From: Andrew Lunn @ 2026-09-01 13:48 UTC (permalink / raw) To: Jia Wang Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Chevallier, Maxime Coquelin, Alexandre Torgue, Giuseppe Cavallaro, Jose Abreu, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel > --- /dev/null > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c > @@ -0,0 +1,54 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * UltraRISC DWMAC platform driver > + * > + * Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd. > + */ > + > +#include <linux/module.h> > +#include <linux/phy.h> > +#include <linux/platform_device.h> > + > +#include "stmmac_platform.h" > + > +static int ultrarisc_dwmac_probe(struct platform_device *pdev) > +{ > + struct plat_stmmacenet_data *plat_dat; > + struct stmmac_resources stmmac_res; > + struct device *dev = &pdev->dev; > + int ret; > + > + ret = stmmac_get_platform_resources(pdev, &stmmac_res); > + if (ret) > + return dev_err_probe(dev, ret, "failed to get resources\n"); > + > + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); > + if (IS_ERR(plat_dat)) > + return dev_err_probe(dev, PTR_ERR(plat_dat), "failed to parse DT parameters\n"); > + > + plat_dat->phy_interface = > + phy_fix_phy_mode_for_mac_delays(plat_dat->phy_interface, true, true); > + if (plat_dat->phy_interface == PHY_INTERFACE_MODE_NA) > + return dev_err_probe(dev, -EINVAL, "unsupported phy interface mode\n"); > + > + return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); > +} > + > +static const struct of_device_id ultrarisc_dwmac_match[] = { > + { .compatible = "ultrarisc,dp1000-gmac" }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, ultrarisc_dwmac_match); > + > +static struct platform_driver ultrarisc_dwmac_driver = { > + .probe = ultrarisc_dwmac_probe, > + .driver = { > + .name = "ultrarisc-dwmac", > + .pm = &stmmac_pltfr_pm_ops, > + .of_match_table = ultrarisc_dwmac_match, > + }, > +}; > +module_platform_driver(ultrarisc_dwmac_driver); > + > +MODULE_DESCRIPTION("UltraRISC DWMAC platform driver"); > +MODULE_LICENSE("GPL"); This looks to be 90% identical to dwmac-sophgo.c. Do you expect any further changes to this driver? Is everything supported? Are there more clocks? A GPIO for WoL? I'm just wondering if the common code should be pulled out, or even dwmac-sophgo.c made generic so it can handle all plain boring devices which have RGMII delays and not a lot else. Andrew ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-09-02 9:36 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-09-01 1:27 [PATCH net-next 0/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2026-09-01 1:27 ` [PATCH net-next 1/3] dt-bindings: net: snps,dwmac: Add UltraRISC DP1000 compatible Jia Wang 2026-09-01 17:46 ` Conor Dooley 2026-09-02 9:35 ` Jia Wang 2026-09-01 1:27 ` [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC Jia Wang 2026-09-01 17:47 ` Conor Dooley 2026-09-01 1:27 ` [PATCH net-next 3/3] net: stmmac: Add UltraRISC DP1000 GMAC support Jia Wang 2026-09-01 7:29 ` Maxime Chevallier 2026-09-01 8:32 ` Jia Wang 2026-09-01 9:05 ` Maxime Chevallier 2026-09-01 13:48 ` Andrew Lunn
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