ARM64 PCIe legacy interrupts

ARM64 PCIe legacy interrupts

[bharat kumar gogada]

Hi, in ARM32 bit pci_fixup_irqs is being used to support legacy interrupts,
in ARM64 how legacy interrupts are being handled

ARM64 PCIe legacy interrupts

[Pratyush Anand]

On Thu, Oct 1, 2015 at 5:59 PM, bharat kumar gogada <bharatku@xilinx.com> wrote:
> Hi, in ARM32 bit pci_fixup_irqs is being used to support legacy interrupts,
> in ARM64 how legacy interrupts are being handled

See, arch/arm64/kernel/pci.c:pcibios_add_devices()

ARM64 PCIe legacy interrupts

[bharat kumar gogada]

Pratyush Anand <pratyush.anand <at> gmail.com> writes:

> 
> On Thu, Oct 1, 2015 at 5:59 PM, bharat kumar gogada <bharatku <at>
xilinx.com> wrote:
> > Hi, in ARM32 bit pci_fixup_irqs is being used to support legacy interrupts,
> > in ARM64 how legacy interrupts are being handled
> 
> See, arch/arm64/kernel/pci.c:pcibios_add_devices()
> 

Thanks.

I have a confusion in handling legacy interrupts in driver, I'm seeing that
for legacy handling there is separate node being created. Ex: for
pcie-xilinx.c the following node is being used

pcie_intc: interrupt-controller {
                        interrupt-controller;
                        #address-cells = <0>;
                        #interrupt-cells = <1>;
                };

Why do we need a separate child node for legacy handling and why is the
address cells parameter assigned zero value

ARM64 PCIe legacy interrupts

[Arnd Bergmann]

On Tuesday 06 October 2015 10:17:11 bharat kumar gogada wrote:
> I have a confusion in handling legacy interrupts in driver, I'm seeing that
> for legacy handling there is separate node being created. Ex: for
> pcie-xilinx.c the following node is being used
> 
> pcie_intc: interrupt-controller {
>                         interrupt-controller;
>                         #address-cells = <0>;
>                         #interrupt-cells = <1>;
>                 };
> 
> Why do we need a separate child node for legacy handling

This is a special case where the interrupt lines are not simply
passed through to the parent interrupt controller but require
an Ack in a separate register.

Most sane implementations only need an interrupt-map property
that documents how the legacy interrupts are wired to the GIC.

> and why is the address cells parameter assigned zero value

It means that the interrupt can be identified by the interrupt
number itself and does not need to be identified by an address
as well. This is true for almost all interrupt controllers.

	Arnd