From: Ryan Roberts <ryan.roberts@arm.com>
To: "Adrian Barnaś" <abarnas@google.com>,
linux-arm-kernel@lists.infradead.org
Cc: linux-mm@kvack.org, Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
David Hildenbrand <david@kernel.org>,
"Mike Rapoport (Microsoft)" <rppt@kernel.org>,
Ard Biesheuvel <ardb@kernel.org>,
Christoph Lameter <cl@gentwo.org>,
Yang Shi <yang@os.amperecomputing.com>,
Brendan Jackman <jackmanb@google.com>
Subject: Re: [RFC PATCH 4/6] arm64: mm: add helper to fill execmem with trapping instructions
Date: Fri, 19 Jun 2026 11:54:25 +0100 [thread overview]
Message-ID: <666a981f-44b6-4c19-a641-c1eff44fe54f@arm.com> (raw)
In-Reply-To: <20260611130144.1385343-5-abarnas@google.com>
On 11/06/2026 14:01, Adrian Barnaś wrote:
> Implement the architecture-specific execmem_fill_trapping_insns() helper
> to poison executable memory regions.
>
> When CONFIG_ARCH_HAS_EXECMEM_ROX is enabled, the execmem subsystem
> requires a way to fill unused or freed executable memory with
> architecture-specific trapping instructions. This implementation fills
> the specified region with AARCH64_BREAK_FAULT instructions and flushes
> the icache to ensure the traps are immediately visible to execution.
>
> Signed-off-by: Adrian Barnaś <abarnas@google.com>
> ---
> arch/arm64/mm/init.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index c673a9a839dd..71aa745e0bef 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -408,6 +408,20 @@ void dump_mem_limit(void)
> }
>
> #ifdef CONFIG_EXECMEM
> +
> +#ifdef CONFIG_ARCH_HAS_EXECMEM_ROX
> +void execmem_fill_trapping_insns(void *ptr, size_t size)
> +{
> + int nr_inst = size / AARCH64_INSN_SIZE;
The x86 instruction is 1 byte, so it can exactly fill any provided buffer. For
arm64, the instruction is 4 bytes so we can only exactly fill the buffer if it's
size is 4 byte aligned.
I'm guessing that in practice, size will always be page aligned so we are good?
Perhaps worth a WARN_ON_ONCE() though?
Thanks,
Ryan
> + __le32 *updptr = ptr;
> +
> + for (int i = 0; i < nr_inst; i++)
> + updptr[i] = cpu_to_le32(AARCH64_BREAK_FAULT);
> +
> + flush_icache_range((unsigned long)ptr, (unsigned long)ptr + size);
> +}
> +#endif
> +
> static u64 module_direct_base __ro_after_init = 0;
> static u64 module_plt_base __ro_after_init = 0;
>
next prev parent reply other threads:[~2026-06-19 10:54 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-11 13:01 [RFC PATCH 0/6] arm64: mm: Introducing ROX CACHE to ARM64 systems with bbml2 no abort Adrian Barnaś
2026-06-11 13:01 ` [RFC PATCH 1/6] arm64: mm: explicitly declare module and ftrace execmem regions Adrian Barnaś
2026-06-11 13:36 ` Brendan Jackman
2026-06-11 13:01 ` [RFC PATCH 2/6] arm64: mm: allow huge vmap permission adjustments with bbml2_no_abort Adrian Barnaś
2026-06-18 14:21 ` Ryan Roberts
2026-06-11 13:01 ` [RFC PATCH 3/6] arm64: mm: fix restoring linear map permissions on execmem cache clean Adrian Barnaś
2026-06-11 13:54 ` Brendan Jackman
2026-06-12 7:17 ` Mike Rapoport
2026-06-17 15:18 ` Adrian Barnaś
2026-06-17 18:40 ` Mike Rapoport
2026-06-18 15:05 ` Ryan Roberts
2026-06-19 8:33 ` Ryan Roberts
2026-06-11 13:01 ` [RFC PATCH 4/6] arm64: mm: add helper to fill execmem with trapping instructions Adrian Barnaś
2026-06-19 10:54 ` Ryan Roberts [this message]
2026-06-19 10:58 ` Mike Rapoport
2026-06-11 13:01 ` [RFC PATCH 5/6] arm64: execmem: enable EXECMEM_ROX_CACHE on supported CPUs Adrian Barnaś
2026-06-19 12:09 ` Ryan Roberts
2026-06-11 13:01 ` [RFC PATCH 6/6] arm64: mm: support PMD page coalescing in the linear map Adrian Barnaś
2026-06-19 13:40 ` Ryan Roberts
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