From: Philipp Zabel <p.zabel@pengutronix.de>
To: patrice.chotard@foss.st.com, Mark Brown <broonie@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Arnd Bergmann <arnd@arndb.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, christophe.kerello@foss.st.com
Subject: Re: [PATCH v3 1/8] dt-bindings: spi: Add STM32 OSPI controller
Date: Mon, 17 Feb 2025 10:17:11 +0100 [thread overview]
Message-ID: <67fe157ce8ca3c3c4e08451da52f7c94f73439b2.camel@pengutronix.de> (raw)
In-Reply-To: <20250210131826.220318-2-patrice.chotard@foss.st.com>
On Mo, 2025-02-10 at 14:18 +0100, patrice.chotard@foss.st.com wrote:
> From: Patrice Chotard <patrice.chotard@foss.st.com>
>
> Add device tree bindings for the STM32 OSPI controller.
>
> Main features of the Octo-SPI controller :
> - support sNOR / sNAND / HyperRAM™ and HyperFlash™ devices.
> - Three functional modes: indirect, automatic-status polling,
> memory-mapped.
> - Up to 4 Gbytes of external memory can be addressed in indirect
> mode (per physical port and per CS), and up to 256 Mbytes in
> memory-mapped mode (combined for both physical ports and per CS).
> - Single-, dual-, quad-, and octal-SPI communication.
> - Dual-quad communication.
> - Single data rate (SDR) and double transfer rate (DTR).
> - Maximum target frequency is 133 MHz for SDR and 133 MHz for DTR.
> - Data strobe support.
> - DMA channel for indirect mode.
> - Double CS mapping that allows two external flash devices to be
> addressed with a single OCTOSPI controller mapped on a single
> OCTOSPI port.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
> ---
> .../bindings/spi/st,stm32mp25-ospi.yaml | 105 ++++++++++++++++++
> 1 file changed, 105 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml
> new file mode 100644
> index 000000000000..5f276f27dc4c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/st,stm32mp25-ospi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STMicroelectronics STM32 Octal Serial Peripheral Interface (OSPI)
> +
> +maintainers:
> + - Patrice Chotard <patrice.chotard@foss.st.com>
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +properties:
> + compatible:
> + const: st,stm32mp25-ospi
> +
> + reg:
> + maxItems: 1
> +
> + memory-region:
> + description:
> + Memory region to be used for memory-map read access.
> + In memory-mapped mode, read access are performed from the memory
> + device using the direct mapping.
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + resets:
> + items:
> + - description: phandle to OSPI block reset
> + - description: phandle to delay block reset
Are you positive that these will only ever have to be reset together?
Otherwise I'd add a reset-names property just in case.
regards
Philipp
next prev parent reply other threads:[~2025-02-17 9:36 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 13:18 [PATCH v3 0/8] Add STM32MP25 SPI NOR support patrice.chotard
2025-02-10 13:18 ` [PATCH v3 1/8] dt-bindings: spi: Add STM32 OSPI controller patrice.chotard
2025-02-13 7:57 ` Krzysztof Kozlowski
2025-02-17 9:17 ` Philipp Zabel [this message]
2025-02-18 8:39 ` Patrice CHOTARD
2025-02-10 13:18 ` [PATCH v3 2/8] spi: stm32: Add OSPI driver patrice.chotard
2025-02-10 13:18 ` [PATCH v3 3/8] dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller patrice.chotard
2025-02-13 8:00 ` Krzysztof Kozlowski
2025-02-18 9:58 ` Patrice CHOTARD
2025-02-10 13:18 ` [PATCH v3 4/8] memory: Add STM32 Octo Memory Manager driver patrice.chotard
2025-02-11 17:04 ` kernel test robot
2025-02-11 17:56 ` kernel test robot
2025-02-11 18:16 ` Christophe JAILLET
2025-02-12 16:17 ` Patrice CHOTARD
2025-02-12 3:19 ` kernel test robot
2025-02-12 12:51 ` Geert Uytterhoeven
2025-02-12 16:18 ` Patrice CHOTARD
2025-02-10 13:18 ` [PATCH v3 5/8] arm64: dts: st: Add OMM node on stm32mp251 patrice.chotard
2025-02-10 13:18 ` [PATCH v3 6/8] arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi patrice.chotard
2025-02-10 13:18 ` [PATCH v3 7/8] arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board patrice.chotard
2025-02-10 13:18 ` [PATCH v3 8/8] arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver patrice.chotard
2025-02-13 7:56 ` [PATCH v3 0/8] Add STM32MP25 SPI NOR support Krzysztof Kozlowski
2025-02-18 10:39 ` Patrice CHOTARD
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