From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
To: patrice.chotard@foss.st.com
Cc: alexandre.torgue@foss.st.com, arnd@arndb.de, broonie@kernel.org,
catalin.marinas@arm.com, christophe.kerello@foss.st.com,
conor+dt@kernel.org, devicetree@vger.kernel.org,
gregkh@linuxfoundation.org, krzk+dt@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
mcoquelin.stm32@gmail.com, p.zabel@pengutronix.de,
robh@kernel.org, will@kernel.org
Subject: Re: [PATCH v3 4/8] memory: Add STM32 Octo Memory Manager driver
Date: Tue, 11 Feb 2025 19:16:49 +0100 [thread overview]
Message-ID: <a74c3202-7a64-483d-907e-9a562e9dcd03@wanadoo.fr> (raw)
In-Reply-To: <20250210131826.220318-5-patrice.chotard@foss.st.com>
Le 10/02/2025 à 14:18,
patrice.chotard-rj0Iel/JR4NBDgjK7y7TUQ@public.gmane.org a écrit :
> From: Patrice Chotard <patrice.chotard-rj0Iel/JR4NBDgjK7y7TUQ@public.gmane.org>
>
> Octo Memory Manager driver (OMM) manages:
> - the muxing between 2 OSPI busses and 2 output ports.
> There are 4 possible muxing configurations:
> - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
> output is on port 2
> - OSPI1 and OSPI2 are multiplexed over the same output port 1
> - swapped mode (no multiplexing), OSPI1 output is on port 2,
> OSPI2 output is on port 1
> - OSPI1 and OSPI2 are multiplexed over the same output port 2
> - the split of the memory area shared between the 2 OSPI instances.
> - chip select selection override.
> - the time between 2 transactions in multiplexed mode.
> - check firewall access.
...
> diff --git a/drivers/memory/stm32_omm.c b/drivers/memory/stm32_omm.c
> new file mode 100644
> index 000000000000..af69137bfba2
> --- /dev/null
> +++ b/drivers/memory/stm32_omm.c
> @@ -0,0 +1,520 @@
> +// SPDX-License-Identifier: GPL
Not sure this SPDX-License-Identifier exists.
> +/*
> + * Copyright (C) STMicroelectronics 2024 - All Rights Reserved
...
> + pm_runtime_enable(dev);
> +
> + /* check if OMM's resource access is granted */
> + ret = stm32_omm_check_access(dev, dev->of_node);
> + if (ret < 0 && ret != -EACCES)
> + goto err_clk_release;
Should we call, here and below, pm_runtime_disable() in the error
handling path, as done in the remove function?
> +
> + if (!ret && child_access_granted == OMM_CHILD_NB) {
> + /* Ensure both OSPI instance are disabled before configuring OMM */
> + ret = stm32_omm_disable_child(dev);
> + if (ret)
> + goto err_clk_release;
> +
> + ret = stm32_omm_configure(dev);
> + if (ret)
> + goto err_clk_release;
> + } else {
> + dev_dbg(dev, "Octo Memory Manager resource's access not granted\n");
> + /*
> + * AMCR can't be set, so check if current value is coherent
> + * with memory-map areas defined in DT
> + */
> + ret = stm32_omm_set_amcr(dev, false);
> + if (ret)
> + goto err_clk_release;
> + }
> +
> + /* for each child, if resource access is granted and status "okay", probe it */
> + for (i = 0; i < omm->nb_child; i++) {
> + if (!child_access[i] || !of_device_is_available(omm->child[i].node))
> + continue;
> +
> + vdev = of_platform_device_create(omm->child[i].node, NULL, NULL);
> + if (!vdev) {
> + dev_err(dev, "Failed to create Octo Memory Manager child\n");
> + for (j = i; j > 0; --j) {
> + if (omm->child[j].dev)
> + of_platform_device_destroy(omm->child[j].dev, NULL);
> + }
> +
> + ret = -EINVAL;
> + goto err_clk_release;
> + }
> + omm->child[i].dev = &vdev->dev;
> + }
> +
> +err_clk_release:
> + for (i = 0; i < omm->nb_child; i++)
> + clk_put(omm->child[i].clk);
> +
> + return ret;
> +}
> +
> +static void stm32_omm_remove(struct platform_device *pdev)
> +{
> + struct stm32_omm *omm = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = 0; i < omm->nb_child; i++)
> + if (omm->child[i].dev)
> + of_platform_device_destroy(omm->child[i].dev, NULL);
> +
> + if (omm->cr & CR_MUXEN)
> + stm32_omm_enable_child_clock(&pdev->dev, false);
> +
> + pm_runtime_disable(&pdev->dev);
Should we have:
for (i = 0; i < omm->nb_child; i++)
clk_put(omm->child[i].clk);
as done in the error handling path of the probe?
> +}
> +
> +static const struct of_device_id stm32_omm_of_match[] = {
> + { .compatible = "st,stm32mp25-omm", },
> + {},
Nitpick: Unneeded , after a terminator.
> +};
> +MODULE_DEVICE_TABLE(of, stm32_omm_of_match);
...
CJ
next prev parent reply other threads:[~2025-02-11 19:26 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 13:18 [PATCH v3 0/8] Add STM32MP25 SPI NOR support patrice.chotard
2025-02-10 13:18 ` [PATCH v3 1/8] dt-bindings: spi: Add STM32 OSPI controller patrice.chotard
2025-02-13 7:57 ` Krzysztof Kozlowski
2025-02-17 9:17 ` Philipp Zabel
2025-02-18 8:39 ` Patrice CHOTARD
2025-02-10 13:18 ` [PATCH v3 2/8] spi: stm32: Add OSPI driver patrice.chotard
2025-02-10 13:18 ` [PATCH v3 3/8] dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller patrice.chotard
2025-02-13 8:00 ` Krzysztof Kozlowski
2025-02-18 9:58 ` Patrice CHOTARD
2025-02-10 13:18 ` [PATCH v3 4/8] memory: Add STM32 Octo Memory Manager driver patrice.chotard
2025-02-11 17:04 ` kernel test robot
2025-02-11 17:56 ` kernel test robot
2025-02-11 18:16 ` Christophe JAILLET [this message]
2025-02-12 16:17 ` Patrice CHOTARD
2025-02-12 3:19 ` kernel test robot
2025-02-12 12:51 ` Geert Uytterhoeven
2025-02-12 16:18 ` Patrice CHOTARD
2025-02-10 13:18 ` [PATCH v3 5/8] arm64: dts: st: Add OMM node on stm32mp251 patrice.chotard
2025-02-10 13:18 ` [PATCH v3 6/8] arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi patrice.chotard
2025-02-10 13:18 ` [PATCH v3 7/8] arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board patrice.chotard
2025-02-10 13:18 ` [PATCH v3 8/8] arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver patrice.chotard
2025-02-13 7:56 ` [PATCH v3 0/8] Add STM32MP25 SPI NOR support Krzysztof Kozlowski
2025-02-18 10:39 ` Patrice CHOTARD
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