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From: songchai <quic_songchai@quicinc.com>
To: Mike Leach <mike.leach@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	James Clark <james.clark@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Andy Gross <agross@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	<linux-kernel@vger.kernel.org>, <coresight@lists.linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	Songwei Chai <quic_songchai@quicinc.com>
Subject: Re: [PATCH v3 7/7] coresight-tgu: add reset node to initialize
Date: Fri, 11 Apr 2025 10:51:24 +0800	[thread overview]
Message-ID: <808b2ae5-5286-487c-8f52-03936c3686ef@quicinc.com> (raw)
In-Reply-To: <CAJ9a7Vh4OTZdbEygtwc7BxRJSLgkALoaNRPEiQLJQgZvFtnTtw@mail.gmail.com>


On 3/7/2025 9:33 PM, Mike Leach wrote:
> Hi,
>
> On Thu, 27 Feb 2025 at 09:27, songchai <quic_songchai@quicinc.com> wrote:
>> From: Songwei Chai <quic_songchai@quicinc.com>
>>
>> Add reset node to initialize the value of
>> priority/condition_decode/condition_select/timer/counter nodes
>>
>> Signed-off-by: Songwei Chai <quic_songchai@quicinc.com>
>> Signed-off-by: songchai <quic_songchai@quicinc.com>
>> ---
>>   .../testing/sysfs-bus-coresight-devices-tgu   |  7 ++
>>   drivers/hwtracing/coresight/coresight-tgu.c   | 79 +++++++++++++++++++
>>   2 files changed, 86 insertions(+)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
>> index d88d05fbff43..8fb5afd7c655 100644
>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
>> @@ -42,3 +42,10 @@ KernelVersion   6.15
>>   Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
>>   Description:
>>                   (RW) Set/Get the counter value with specific step for TGU.
>> +
>> +What:           /sys/bus/coresight/devices/<tgu-name>/reset_tgu
>> +Date:           February 2025
>> +KernelVersion   6.15
>> +Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
>> +Description:
>> +                (Write) Reset the dataset for TGU.
> Document the value needed to initiate the reset.
Done.
>
>> diff --git a/drivers/hwtracing/coresight/coresight-tgu.c b/drivers/hwtracing/coresight/coresight-tgu.c
>> index 693d632fb079..b36ced761c0d 100644
>> --- a/drivers/hwtracing/coresight/coresight-tgu.c
>> +++ b/drivers/hwtracing/coresight/coresight-tgu.c
>> @@ -343,6 +343,84 @@ static ssize_t enable_tgu_store(struct device *dev,
>>   }
>>   static DEVICE_ATTR_RW(enable_tgu);
>>
>> +/* reset_tgu_store - Reset Trace and Gating Unit (TGU) configuration. */
>> +static ssize_t reset_tgu_store(struct device *dev,
>> +                              struct device_attribute *attr, const char *buf,
>> +                              size_t size)
>> +{
>> +       unsigned long value;
>> +       struct tgu_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +       int i, j, ret;
>> +
>> +       if (kstrtoul(buf, 0, &value))
>> +               return -EINVAL;
>> +
> Check "value" here and bail out with an error code if 0.
Done.
>
>> +       if (!drvdata->enable) {
>> +               ret = pm_runtime_get_sync(drvdata->dev);
>> +               if (ret < 0) {
>> +                       pm_runtime_put(drvdata->dev);
>> +                       return ret;
>> +               }
>> +       }
>> +
>> +       spin_lock(&drvdata->spinlock);
>> +       CS_UNLOCK(drvdata->base);
>> +
>> +       if (value) {
> drop this line
Done.
>
>> +               tgu_writel(drvdata, 0, TGU_CONTROL);
>> +
>> +               if (drvdata->value_table->priority)
>> +                       memset(drvdata->value_table->priority, 0,
>> +                              MAX_PRIORITY * drvdata->max_step *
>> +                                      drvdata->max_reg * sizeof(unsigned int));
>> +
>> +               if (drvdata->value_table->condition_decode)
>> +                       memset(drvdata->value_table->condition_decode, 0,
>> +                              drvdata->max_condition_decode * drvdata->max_step *
>> +                                      sizeof(unsigned int));
>> +
>> +               /* Initialize all condition registers to NOT(value=0x1000000) */
>> +               for (i = 0; i < drvdata->max_step; i++) {
>> +                       for (j = 0; j < drvdata->max_condition_decode; j++) {
>> +                               drvdata->value_table
>> +                                       ->condition_decode[calculate_array_location(
>> +                                               drvdata, i, TGU_CONDITION_DECODE, j)] =
>> +                                       0x1000000;
>> +                       }
>> +               }
>> +
>> +               if (drvdata->value_table->condition_select)
>> +                       memset(drvdata->value_table->condition_select, 0,
>> +                              drvdata->max_condition_select * drvdata->max_step *
>> +                                      sizeof(unsigned int));
>> +
>> +               if (drvdata->value_table->timer)
>> +                       memset(drvdata->value_table->timer, 0,
>> +                              (drvdata->max_step) *
>> +                                      (drvdata->max_timer_counter) *
>> +                                      sizeof(unsigned int));
>> +
>> +               if (drvdata->value_table->counter)
>> +                       memset(drvdata->value_table->counter, 0,
>> +                              (drvdata->max_step) *
>> +                                      (drvdata->max_timer_counter) *
>> +                                      sizeof(unsigned int));
>> +
>> +               dev_dbg(dev, "Coresight-TGU reset complete\n");
>> +       } else {
>> +               dev_dbg(dev, "Coresight-TGU invalid input\n");
> not needed if early exit on input errror
Done.
>
>> +       }
>> +
>> +       CS_LOCK(drvdata->base);
>> +
>> +       drvdata->enable = false;
>> +       spin_unlock(&drvdata->spinlock);
>> +       pm_runtime_put(drvdata->dev);
>> +
>> +       return size;
>> +}
>> +static DEVICE_ATTR_WO(reset_tgu);
>> +
>>   static const struct coresight_ops_helper tgu_helper_ops = {
>>          .enable = tgu_enable,
>>          .disable = tgu_disable,
>> @@ -354,6 +432,7 @@ static const struct coresight_ops tgu_ops = {
>>
>>   static struct attribute *tgu_common_attrs[] = {
>>          &dev_attr_enable_tgu.attr,
>> +       &dev_attr_reset_tgu.attr,
>>          NULL,
>>   };
>>
>>
>
> Regards
>
> Mike
>


  reply	other threads:[~2025-04-11  2:53 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-27  9:26 [PATCH v3 0/7] Provides support for Trigger Generation Unit songchai
2025-02-27  9:26 ` [PATCH v3 1/7] dt-bindings: arm: Add support for Coresight TGU trace songchai
2025-03-04  8:05   ` Krzysztof Kozlowski
2025-03-07  9:28     ` Mike Leach
2025-03-26  9:39       ` songchai
2025-02-27  9:26 ` [PATCH v3 2/7] coresight: Add coresight TGU driver songchai
2025-03-06 16:57   ` Mike Leach
2025-04-10  2:55     ` songchai
2025-02-27  9:26 ` [PATCH v3 3/7] coresight-tgu: Add signal priority support songchai
2025-03-07 12:17   ` Mike Leach
2025-04-10  5:44     ` songchai
2025-02-27  9:26 ` [PATCH v3 4/7] coresight-tgu: Add TGU decode support songchai
2025-03-07 10:58   ` Mike Leach
     [not found]     ` <57272ecc-0ebd-4146-8860-a2dd71833d23@quicinc.com>
2025-04-10 13:35       ` Mike Leach
2025-04-11  1:52         ` songchai
2025-02-27  9:26 ` [PATCH v3 5/7] coresight-tgu: add support to configure next action songchai
2025-02-27  9:26 ` [PATCH v3 6/7] coresight-tgu: add timer/counter functionality for TGU songchai
2025-02-27  9:26 ` [PATCH v3 7/7] coresight-tgu: add reset node to initialize songchai
2025-03-07 13:33   ` Mike Leach
2025-04-11  2:51     ` songchai [this message]
2025-03-06 16:57 ` [PATCH v3 0/7] Provides support for Trigger Generation Unit Mike Leach
2025-03-21  3:26   ` songchai
2025-03-21 14:00     ` Mike Leach

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