From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: Why MSI is limited to 32 MSI's per device
Date: Wed, 15 Jun 2016 14:49:59 +0200 [thread overview]
Message-ID: <8152156.hidk5yF9cg@wuerfel> (raw)
In-Reply-To: <loom.20160615T083745-646@post.gmane.org>
On Wednesday, June 15, 2016 6:39:53 AM CEST valmiki wrote:
> Thanks a lot Mark.
>
> I have one more doubt regarding MSI-X, why MSI-X table is maintained in end
> points bar memory, why cant it be maintained/allocated in host memory ?
Making the device do a DMA read to fetch the MSI-X descriptor every time it
wants to send an interrupt message would add a serious overhead to very
time-critical operation. I don't think this is something the PCI SIG would
have considered.
Arnd
prev parent reply other threads:[~2016-06-15 12:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-14 14:58 Why MSI is limited to 32 MSI's per device valmiki
2016-06-14 15:45 ` Mark Rutland
2016-06-15 6:39 ` valmiki
2016-06-15 12:49 ` Arnd Bergmann [this message]
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