[PATCH] arm64: dts: marvell: armada-37xx: mark EIP97 as dma-coherent

[PATCH] arm64: dts: marvell: armada-37xx: mark EIP97 as dma-coherent

[Aleksander Jan Bajkowski]

Armada 37xx has coherent bus, similar to Armada 7k/8k. Cache
synchronization consumes a lot of CPU cycles. Enabling coherent DMA
increases IOPS performance up to 4 times. Some numbers:
					Data length
Algo		MB	   16	  64	 128	 256	1024	1424	4096
DES-ECB		1	+21 %	+5 %	+5 %	+7 %	+7 %	+3 %	+20 %
AES-ECB-128	1	+21 %	+6 %	+6 %	+6 %	+9 %	+8 %	+22 %
AES-CBC-128	1	+21 %	+5 %	+5 %	+5 %	+6 %	+7 %	+23 %
AES-CBC-256	1	+23 %	+7 %	+8 %	+6 %	+11 %	+13 %	+20 %

					Data length
Algo		MB	    16	    64	   256	  512	  1024	 1420	 4096	 8192
AES-GCM-128	1	 +44 %	 +42 %	 +31 %	 +32 %	 +27 %	+30 %	+32 %	+30 %
AES-GCM-128	8	+319 %	+326 %	+163 %	+148 %	 +75 %	+72 %	+74 %	+41 %
AES-GCM-128	4096	+123 %	+128 %	 +90 %	 +83 %	+116 %	+59 %	+38 %	+28 %

					Data length
Algo		MB	   16	   64	  256	 1024	 2048	 4096	 8192
MD5		1	+21 %	+15 %	+29 %	+25 %	+50 %	+16 %	+20 %
SHA1		1	+24 %	+22 %	+27 %	+22 %	+18 %	+20 %	+20 %
SHA256		1	+30 %	+24 %	+25 %	+26 %	+21 %	+41 %	+19 %
SHA512		1	 +4 %	 +3 %	 +8 %	+10 %	+24 %	+10 %	+11 %

Tested on Armada 3720. Platform passes testmgr selftests.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 360fc24fdde2..8418777042b8 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -437,6 +437,7 @@ crypto: crypto@90000 {
 				interrupt-names = "ring0", "ring1", "ring2",
 						  "ring3", "eip", "mem";
 				clocks = <&nb_periph_clk 15>;
+				dma-coherent;
 			};
 
 			rwtm: mailbox@b0000 {
-- 
2.53.0

Re: [PATCH] arm64: dts: marvell: armada-37xx: mark EIP97 as dma-coherent

[Gregory CLEMENT]

Hello Aleksander,

> Armada 37xx has coherent bus, similar to Armada 7k/8k. Cache
> synchronization consumes a lot of CPU cycles. Enabling coherent DMA
> increases IOPS performance up to 4 times. Some numbers:
> 					Data length
> Algo		MB	   16	  64	 128	 256	1024	1424	4096
> DES-ECB		1	+21 %	+5 %	+5 %	+7 %	+7 %	+3 %	+20 %
> AES-ECB-128	1	+21 %	+6 %	+6 %	+6 %	+9 %	+8 %	+22 %
> AES-CBC-128	1	+21 %	+5 %	+5 %	+5 %	+6 %	+7 %	+23 %
> AES-CBC-256	1	+23 %	+7 %	+8 %	+6 %	+11 %	+13 %	+20 %
>
> 					Data length
> Algo		MB	    16	    64	   256	  512	  1024	 1420	 4096	 8192
> AES-GCM-128	1	 +44 %	 +42 %	 +31 %	 +32 %	 +27 %	+30 %	+32 %	+30 %
> AES-GCM-128	8	+319 %	+326 %	+163 %	+148 %	 +75 %	+72 %	+74 %	+41 %
> AES-GCM-128	4096	+123 %	+128 %	 +90 %	 +83 %	+116 %	+59 %	+38 %	+28 %
>
> 					Data length
> Algo		MB	   16	   64	  256	 1024	 2048	 4096	 8192
> MD5		1	+21 %	+15 %	+29 %	+25 %	+50 %	+16 %	+20 %
> SHA1		1	+24 %	+22 %	+27 %	+22 %	+18 %	+20 %	+20 %
> SHA256		1	+30 %	+24 %	+25 %	+26 %	+21 %	+41 %	+19 %
> SHA512		1	 +4 %	 +3 %	 +8 %	+10 %	+24 %	+10 %	+11 %
>
> Tested on Armada 3720. Platform passes testmgr selftests.
>
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>

I'm surprised that we didn't enable it when submitting the support for
Armada 3700, but indeed the datasheet mentions I/O coherency support. I
didn't see any specific register to configure it. Moreover, if none of
the tests failed, we can assume that the bus is indeed coherent.

Applied on mvebu/dt64

Thanks,

Gregory


> ---
>  arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index 360fc24fdde2..8418777042b8 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -437,6 +437,7 @@ crypto: crypto@90000 {
>  				interrupt-names = "ring0", "ring1", "ring2",
>  						  "ring3", "eip", "mem";
>  				clocks = <&nb_periph_clk 15>;
> +				dma-coherent;
>  			};
>  
>  			rwtm: mailbox@b0000 {
> -- 
> 2.53.0
>

-- 
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com