* [PATCH v2 3/3] ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq
From: Thomas Abraham @ 2011-11-01 1:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320109289-2730-1-git-send-email-thomas.abraham@linaro.org>
Enable conversion of device tree interrupt specifier to linux virq domain
for GIC controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
arch/arm/mach-exynos4/cpu.c | 17 ++++++++++++++++-
1 files changed, 16 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 358624d..c06dd03 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -10,6 +10,8 @@
#include <linux/sched.h>
#include <linux/sysdev.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
@@ -229,13 +231,26 @@ static void exynos4_gic_irq_fix_base(struct irq_data *d)
(gic_bank_offset * smp_processor_id());
}
+#ifdef CONFIG_OF
+static const struct of_device_id exynos4_dt_irq_match[] = {
+ { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+ {},
+};
+#endif
+
void __init exynos4_init_irq(void)
{
int irq;
gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
- gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+ if (!of_have_populated_dt())
+ gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+#ifdef CONFIG_OF
+ else
+ of_irq_init(exynos4_dt_irq_match);
+#endif
+
gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
--
1.7.4.4
^ permalink raw reply related
* [PATCH v2 2/3] ARM: Exynos4: Add ioremap interceptor for statically remapped regions
From: Thomas Abraham @ 2011-11-01 1:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320109289-2730-1-git-send-email-thomas.abraham@linaro.org>
ioremap() request for statically remapped regions are intercepted and the
statically assigned virtual address is returned. For requests for which
there are no statically remapped regions, the requests are let through.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
arch/arm/mach-exynos4/cpu.c | 16 ++++++++++++++++
arch/arm/mach-exynos4/include/mach/io.h | 5 +++++
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 5b1765b..358624d 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -137,6 +137,22 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
},
};
+/*
+ * For all ioremap requests of statically mapped regions, intercept ioremap and
+ * return virtual address from the iodesc table.
+ */
+void __iomem *exynos4_ioremap(unsigned long phy, size_t size, unsigned int type)
+{
+ struct map_desc *desc = exynos4_iodesc;
+ unsigned int idx;
+
+ for (idx = 0; idx < ARRAY_SIZE(exynos4_iodesc); idx++, desc++)
+ if (desc->pfn == __phys_to_pfn(phy) && desc->type == type)
+ return (void __iomem *)desc->virtual;
+
+ return __arm_ioremap(phy, size, type);
+}
+
static void exynos4_idle(void)
{
if (!need_resched())
diff --git a/arch/arm/mach-exynos4/include/mach/io.h b/arch/arm/mach-exynos4/include/mach/io.h
index d5478d2..c1b21d5 100644
--- a/arch/arm/mach-exynos4/include/mach/io.h
+++ b/arch/arm/mach-exynos4/include/mach/io.h
@@ -22,5 +22,10 @@
#define __mem_pci(a) (a)
#define IO_SPACE_LIMIT (0xFFFFFFFF)
+#define __arch_ioremap exynos4_ioremap
+#define __arch_iounmap __iounmap
+
+void __iomem *exynos4_ioremap(unsigned long phy, size_t size,
+ unsigned int type);
#endif /* __ASM_ARM_ARCH_IO_H */
--
1.7.4.4
^ permalink raw reply related
* [PATCH v2 1/3] ARM: Exynos4: Move timer irq numbers to end of linux irq space
From: Thomas Abraham @ 2011-11-01 1:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320109289-2730-1-git-send-email-thomas.abraham@linaro.org>
The timer irqs statically mapped from linux irq numbers 11 to 15 are moved to
the end of the statically mapped linux irq space. The GIC PPI and SPI interrupts
are relocated to start from 16 and 32 of the linux irq space. This is a required
to add device tree support for GIC and Interrupt combiner for Exynos4.
A new macro 'IRQ_TIMER_BASE' specifies a platform specific base of the linux
virq number for the timer interrupts. For exynos4, this base is set to end of
the linux virq space. For the other s5p platforms, the existing base '11' is
retained.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
arch/arm/mach-exynos4/include/mach/entry-macro.S | 1 -
arch/arm/mach-exynos4/include/mach/irqs.h | 8 +++++---
arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 ++
arch/arm/mach-s5pc100/include/mach/irqs.h | 2 ++
arch/arm/mach-s5pv210/include/mach/irqs.h | 2 ++
arch/arm/plat-samsung/include/plat/irqs.h | 3 ++-
6 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
index f5e9fd8..d7dfcd7 100644
--- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
@@ -72,7 +72,6 @@
cmpcc \irqnr, \irqnr
cmpne \irqnr, \tmp
cmpcs \irqnr, \irqnr
- addne \irqnr, \irqnr, #32
.endm
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index dfd4b7e..713dd52 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -17,13 +17,13 @@
/* PPI: Private Peripheral Interrupt */
-#define IRQ_PPI(x) S5P_IRQ(x+16)
+#define IRQ_PPI(x) (x+16)
#define IRQ_MCT_LOCALTIMER IRQ_PPI(12)
/* SPI: Shared Peripheral Interrupt */
-#define IRQ_SPI(x) S5P_IRQ(x+32)
+#define IRQ_SPI(x) (x+32)
#define IRQ_EINT0 IRQ_SPI(16)
#define IRQ_EINT1 IRQ_SPI(17)
@@ -163,7 +163,9 @@
#define IRQ_GPIO2_NR_GROUPS 9
#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
+#define IRQ_TIMER_BASE (IRQ_GPIO_END + 64)
+
/* Set the default NR_IRQS */
-#define NR_IRQS (IRQ_GPIO_END + 64)
+#define NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 53982db..5b845e8 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,6 +141,8 @@
#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x))
+#define IRQ_TIMER_BASE (11)
+
/* Set the default NR_IRQS */
#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index d2eb475..2870f12 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -97,6 +97,8 @@
#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
#define IRQ_VIC_END S5P_IRQ_VIC2(31)
+#define IRQ_TIMER_BASE (11)
+
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 5e0de3a..e777e01 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,6 +118,8 @@
#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
#define IRQ_VIC_END S5P_IRQ_VIC3(31)
+#define IRQ_TIMER_BASE (11)
+
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index 08d1a7e..df46b77 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,13 +44,14 @@
#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
-#define S5P_TIMER_IRQ(x) (11 + (x))
+#define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x))
#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
+#define IRQ_TIMER_COUNT (5)
#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
: ((x) - 16 + S5P_EINT_BASE2))
--
1.7.4.4
^ permalink raw reply related
* ARM: Exynos4: Enable device tree support for GIC controller
From: Thomas Abraham @ 2011-11-01 1:01 UTC (permalink / raw)
To: linux-arm-kernel
Changes since v1:
- Dropped device tree support for interrupt combiner controller from this patchset.
Some rework in the interrupt combiner controller code is required to address
the irq domain related comments from Grant Likely and hence those changes will
be in another patchset.
- As suggested by Grant Likely, linux virq number 0 is left unused.
This patchset adds device tree support for GIC controller in Exynos4 SoC.
Patch 1 moves the statically mapped timer irqs 11 to 15 to the end of the
statically mapped linux irq space for Exynos4 platforms.
For Exynos4 platforms, the five hardware timer irqs are connected to GIC
at some hardware irq number (in exynos it is GIC_ID 69 to 73 for five timers).
When any of these hardware interrupt occurs, its interrupt handler calls
generic_handle_irq() with linux irq number 11/12/13/14/15 for timer 0/1/2/3/4
as the parameter. The code that needs to be notified about the timer interrupts
would have already registered its handler for either of the interrupts 11 to 15.
Instead of using linux irq number 11 to 15 to which consumers of timer interrupt
attach their handler, this interrupt range is moved to the end of linux irq
space used. So there will be no interrupts statically mapped between 0 to 31.
The GIC hardware interrupts, which were previously statically mapped to
start from linux irq 32 are now moved to start from linux irq 0. In case of
exynos, GIC_ID[0] (which is SGI[0]) which was previously at linux irq 32, will
not be at linux irq 0. This was required to use Rob Herring's GIC OF bindings
patches for Exynos4.
Patch 2 adds a interceptor for all ioremap calls targeted towards any of the
statically remapped memory region. This was required because the GIC OF
binding's patchset ioremaps the GIC memory-mapped regions in the gic_of_init()
function. Without this patch, there would be two separate remap for GIC
controller, one statically remapped and the other dynamically remapped by the
gic_of_init() function. The patch will eventually be superseded by Nicolas
Pitre's vmalloc patch series.
Patch 3 adds device tree support for GIC controllers on Exynos4. For GIC
controller, this patch is based on Rob Herring's,
"[PATCH 0/3] GIC OF bindings" patchset.
This patchset is based on the following tree:
git://git.linaro.org/git/people/arnd/arm-soc.git branch: for-next
Thomas Abraham (3):
ARM: Exynos4: Move timer irq numbers to end of linux irq space
ARM: Exynos4: Add ioremap interceptor for statically remapped regions
ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq
arch/arm/mach-exynos4/cpu.c | 33 +++++++++++++++++++++-
arch/arm/mach-exynos4/include/mach/entry-macro.S | 1 -
arch/arm/mach-exynos4/include/mach/io.h | 5 +++
arch/arm/mach-exynos4/include/mach/irqs.h | 8 +++--
arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 +
arch/arm/mach-s5pc100/include/mach/irqs.h | 2 +
arch/arm/mach-s5pv210/include/mach/irqs.h | 2 +
arch/arm/plat-samsung/include/plat/irqs.h | 3 +-
8 files changed, 50 insertions(+), 6 deletions(-)
^ permalink raw reply
* [PATCH v2] gpio/samsung: Add device tree support for Exynos4
From: Thomas Abraham @ 2011-11-01 0:43 UTC (permalink / raw)
To: linux-arm-kernel
As gpio chips get registered, a device tree node which represents the
gpio chip is searched and attached to it. A translate function is also
provided to convert the gpio specifier into actual platform settings
for pin function selection, pull up/down and driver strength settings.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
Changes since v1:
- As suggested by Rob and Grant, the gpio controller node lookup is based
on the base address of the gpio controller instead of the unique
per-controller compatible property value.
This patch is based on the following tree and branch.
git://git.linaro.org/git/people/arnd/arm-soc.git branch: for-next
.../devicetree/bindings/gpio/gpio-samsung.txt | 40 ++++++++++++
drivers/gpio/gpio-samsung.c | 66 ++++++++++++++++++++
2 files changed, 106 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-samsung.txt
diff --git a/Documentation/devicetree/bindings/gpio/gpio-samsung.txt b/Documentation/devicetree/bindings/gpio/gpio-samsung.txt
new file mode 100644
index 0000000..c143058
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-samsung.txt
@@ -0,0 +1,40 @@
+Samsung Exynos4 GPIO Controller
+
+Required properties:
+- compatible: Compatible property value should be "samsung,exynos4-gpio>".
+
+- reg: Physical base address of the controller and length of memory mapped
+ region.
+
+- #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
+ should be the following with values derived from the SoC user manual.
+ <[phandle of the gpio controller node]
+ [pin number within the gpio controller]
+ [mux function]
+ [pull up/down]
+ [drive strength]>
+
+ Values for gpio specifier:
+ - Pin number: is a value between 0 to 7.
+ - Pull Up/Down: 0 - Pull Up/Down Disabled.
+ 1 - Pull Down Enabled.
+ 3 - Pull Up Enabled.
+ - Drive Strength: 0 - 1x,
+ 1 - 3x,
+ 2 - 2x,
+ 3 - 4x
+
+- gpio-controller: Specifies that the node is a gpio controller.
+- #address-cells: should be 1.
+- #size-cells: should be 1.
+
+Example:
+
+ gpa0: gpio-controller at 11400000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "samsung,exynos4-gpio";
+ reg = <0x11400000 0x20>;
+ #gpio-cells = <4>;
+ gpio-controller;
+ };
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 8662518..0140756 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -24,6 +24,9 @@
#include <linux/interrupt.h>
#include <linux/sysdev.h>
#include <linux/ioport.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/of_address.h>
#include <asm/irq.h>
@@ -2374,6 +2377,63 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
#endif
};
+#if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF)
+int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np,
+ const void *gpio_spec, u32 *flags)
+{
+ const __be32 *gpio = gpio_spec;
+ const u32 n = be32_to_cpup(gpio);
+ unsigned int pin = gc->base + be32_to_cpu(gpio[0]);
+
+ if (gc->of_gpio_n_cells < 4) {
+ WARN_ON(1);
+ return -EINVAL;
+ }
+
+ if (n > gc->ngpio)
+ return -EINVAL;
+
+ s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1])));
+ s3c_gpio_setpull(pin, be32_to_cpu(gpio[2]));
+ s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3]));
+ return n;
+}
+
+static const struct of_device_id exynos4_gpio_dt_match[] __initdata = {
+ { .compatible = "samsung,exynos4-gpio", },
+ {}
+};
+
+static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
+ u64 base, u64 offset)
+{
+ struct gpio_chip *gc = &chip->chip;
+ u64 address;
+
+ if (!of_have_populated_dt())
+ return;
+
+ address = (chip->base) ? (base + ((u32)chip->base & 0xfff)) :
+ (base + offset);
+
+ gc->of_node = of_find_matching_node_by_address(NULL,
+ exynos4_gpio_dt_match, address);
+ if (!gc->of_node) {
+ pr_info("gpio: device tree node not found for gpio controller"
+ " with base address %08llx\n", address);
+ return;
+ }
+ gc->of_gpio_n_cells = 4;
+ gc->of_xlate = exynos4_gpio_xlate;
+}
+#else
+static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
+ u64 base, u64 offset)
+{
+ return;
+}
+#endif /* defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) */
+
/* TODO: cleanup soc_is_* */
static __init int samsung_gpiolib_init(void)
{
@@ -2455,6 +2515,8 @@ static __init int samsung_gpiolib_init(void)
chip->config = &exynos4_gpio_cfg;
chip->group = group++;
}
+ exynos4_gpiolib_attach_ofnode(chip,
+ EXYNOS4_PA_GPIO1, i * 0x20);
}
samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1);
@@ -2467,6 +2529,8 @@ static __init int samsung_gpiolib_init(void)
chip->config = &exynos4_gpio_cfg;
chip->group = group++;
}
+ exynos4_gpiolib_attach_ofnode(chip,
+ EXYNOS4_PA_GPIO2, i * 0x20);
}
samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2);
@@ -2479,6 +2543,8 @@ static __init int samsung_gpiolib_init(void)
chip->config = &exynos4_gpio_cfg;
chip->group = group++;
}
+ exynos4_gpiolib_attach_ofnode(chip,
+ EXYNOS4_PA_GPIO3, i * 0x20);
}
samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3);
--
1.7.4.4
^ permalink raw reply related
* orion/kirkwood and device tree
From: Russell King - ARM Linux @ 2011-10-31 22:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201110312350.28475.michael@walle.cc>
On Mon, Oct 31, 2011 at 11:50:28PM +0100, Michael Walle wrote:
> Hi Jason and all,
>
> Sorry for being quiet such a long time, much work to do here..
>
> Am Montag 31 Oktober 2011, 17:40:42 schrieb Andrew Lunn:
> > > I wish. :-) dreamplug support just made it into u-boot. So, now I
> > > just have to babysit it until 2011.12 / 2012.01 release. I should have
> > > some more cycles to dedicate to Linux/dreamplug in the coming months.
> >
> > Is uboot support necessary? I cannot use jtag on my device, so i'm
> > reluctant to upgrade uboot. I hope it is possible to append the dt to
> > kernel image, at least for development work.
> iirc, i've seen some patches around to add support for appended device trees.
> dunno if they made it upstream, though.
It was merged during this merge window:
commit b90b9a38251e9c89c34179eccde57411ceb5f1aa
Author: Nicolas Pitre <nicolas.pitre@linaro.org>
Date: Tue Sep 13 22:37:07 2011 -0400
ARM: zImage: allow supplementing appended DTB with traditional ATAG data
^ permalink raw reply
* orion/kirkwood and device tree
From: Michael Walle @ 2011-10-31 22:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031164042.GD29402@lunn.ch>
Hi Jason and all,
Sorry for being quiet such a long time, much work to do here..
Am Montag 31 Oktober 2011, 17:40:42 schrieb Andrew Lunn:
> > I wish. :-) dreamplug support just made it into u-boot. So, now I
> > just have to babysit it until 2011.12 / 2012.01 release. I should have
> > some more cycles to dedicate to Linux/dreamplug in the coming months.
>
> Is uboot support necessary? I cannot use jtag on my device, so i'm
> reluctant to upgrade uboot. I hope it is possible to append the dt to
> kernel image, at least for development work.
iirc, i've seen some patches around to add support for appended device trees.
dunno if they made it upstream, though.
> > My biggest stumbling block is still learning devicetree. Simon Glass
> > has added support for parsing and using fdt's in u-boot. I successfully
> > adapted mvrtc driver to use it. So that helped my understanding. I've
> > since found some key places in the kernel where registers are defined
> > and interrupts set. So, conceptually, I have a much better idea of how
> > it needs to happen. Unfortunately, it needs to be kirkwood / orion
> > getting fdt support, and then adding a dreamplug fdt file. A lot more
> > work to do it right.
>
> I have a reasonable idea how kirkwood/orion works. I've done some
> cleanup of the shared code between the different orion devices.
>
> I guess what i need is the simplest DT configuration needed to get the
> device to boot however still using the bubba3 hard coded platform
> devices. I can then move each platform device one by one into
> DT. However, my initial quick experiments just resulted in instant
> kernel crash...
i've already ported some marvell devices to DT. spi-orion, orion-wdt, rtc-mv
and mv_cesa. Atm i'm struggling with how to pass kirkwood_mbus_dram_info to
the device drivers (the old method is to pass it through platform_data)
I hope i find time tomorrow, to upload my git tree and/or post some RFC
patches.
--
Michael
^ permalink raw reply
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Nicolas Pitre @ 2011-10-31 22:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111029135653.GA25057@mudshark.cambridge.arm.com>
On Sat, 29 Oct 2011, Will Deacon wrote:
> I'll give this a go for v2, thanks. Once this is sorted out I'll do a second
> pass to clean up the reboot modes since I've already got some patches for
> that.
OK great. Please ask Russell to merge your series whenever you're ready
after 3.2-rc1 and I'll rebase my arch_idle series on top of that.
Nicolas
^ permalink raw reply
* [PATCH 3/3] arm/dt: tegra: add dts file for paz00
From: Marc Dietrich @ 2011-10-31 22:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF173EDAB86E@HQMAIL01.nvidia.com>
On Monday 31 October 2011 13:14:17 Stephen Warren wrote:
> Marc Dietrich wrote at Monday, October 31, 2011 1:59 PM:
> > This adds a dts file for paz00. As a side effect, this also enables
> > the embedded controller which controls the keyboard, touchpad, power,
> > leds, and some other functions.
>
> ...
>
> > + serial at 70006000 {
> > + clock-frequency = <216000000>;
> > + };
> > +
> > + serial at 70006040 {
> > + status = "disable";
> > + };
> > +
> > + serial at 70006200 {
> > + status = "disable";
> > + };
> > +
> > + serial at 70006300 {
> > + clock-frequency = <216000000>;
> > + };
>
> Don't you also want to disable serial at 70006400, or set a clock rate for
> it?
I just didn't noticed its existance because I configured a maximum of four
serial ports only, so it didn't showed up in the boot log.
^ permalink raw reply
* [PATCH 2/3] staging: nvec: add device tree support
From: Marc Dietrich @ 2011-10-31 22:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF173EDAB877@HQMAIL01.nvidia.com>
On Monday 31 October 2011 13:18:13 Stephen Warren wrote:
> Marc Dietrich wrote at Monday, October 31, 2011 1:59 PM:
> > This adds device tree support to the nvec driver. By using this method
> > it is no longer necessary to specify platform data through a board
> > file.
>
> ...
>
> > diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
>
> ...
>
> > + if (pdata) {
> > + nvec->gpio = pdata->gpio;
> > + nvec->i2c_addr = pdata->i2c_addr;
> > + } else if (nvec->dev->of_node) {
> > + nvec->gpio = of_get_named_gpio(nvec->dev->of_node, "request-gpios",
> > 0); + if (nvec->gpio < 0) {
> > + dev_err(&pdev->dev, "no gpio specified");
> > + goto failed;
> > + }
> >
> > + prop = of_get_property(nvec->dev->of_node, "slave-addr", NULL);
> > + if (!prop) {
> > + dev_err(&pdev->dev, "no i2c address specified");
> > + goto failed;
> > + }
> > + nvec->i2c_addr = be32_to_cpup(prop);
>
> ----------==========----------==========----------==========----------======
> ==== Don't you want to use of_property_read_u32() here to simplify the code
> slightly? You can also get rid of at least one #include that way.
Ok, I somehow didn't found it during my quick search.
> > + } else {
> > + dev_err(&pdev->dev, "no platform data\n");
> > + goto failed;
> > + }
^ permalink raw reply
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Russell King - ARM Linux @ 2011-10-31 22:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031143744.GE29349@mudshark.cambridge.arm.com>
On Mon, Oct 31, 2011 at 02:37:45PM +0000, Will Deacon wrote:
> On Mon, Oct 31, 2011 at 02:13:22PM +0000, Russell King - ARM Linux wrote:
> > On Sat, Oct 29, 2011 at 02:56:53PM +0100, Will Deacon wrote:
> > > The only downside is that I have to go over all of the platforms again
> > > unless I can polish up my Coccinelle-fu. Ho-hum.
> >
> > Well, I've just given coccinelle a go, and having read all the hype about
> > it, I'm completely disappointed with it to the extent that I'm going to
> > uninstall the tool from my system (unless someone can point out what I'm
> > doing wrong.)
>
> I'm really new to it, so I'm by no means an expert...
I've spent the rest of today trying to get it to do another trivial task -
adding setup_reboot(mode) to the start of the arch_reset() functions, and
failed to get it to place the call after local variable declarations.
I really don't like the way I seem to have to create a rule for each
possible perturbation of arch_reset (as a function pointer, as a
function, with local variables, without local variables.)
So far, my experiments with it have just resulted in frustration with
virtually zero productivity (just one commit to be precise).
^ permalink raw reply
* [PATCH v2] regulator: max8649 Convert max8649 to use regmap api
From: Mark Brown @ 2011-10-31 21:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1319462786-2602-1-git-send-email-jhbird.choi@gmail.com>
On Mon, Oct 24, 2011 at 10:26:26PM +0900, jhbird.choi at gmail.com wrote:
> From: Jonghwan Choi <jhbird.choi@gmail.com>
>
> Signed-off-by: Jonghwan Choi <jhbird.choi@gmail.com>
Applied, thanks (but for 3.3 rather than 3.2).
^ permalink raw reply
* [PATCH] regulator: Use regmap_read/write(), regmap_update_bits functions directly
From: Mark Brown @ 2011-10-31 21:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1319617556-29021-1-git-send-email-jhbird.choi@samsung.com>
On Wed, Oct 26, 2011 at 05:25:56PM +0900, jhbird.choi at samsung.com wrote:
> From: Jonghwan Choi <jhbird.choi@samsung.com>
>
> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Please make sure you CC Liam on all regulator API patches - you should
CC all the maintainers for the subsystem. This needs to be refreshed
against current -next, it won't apply as-is (I suspect the patch is for
3.0 rather than current code).
^ permalink raw reply
* [PATCH 1/3] ARM: tegra: paz00: add support for wakeup gpio key
From: Marc Dietrich @ 2011-10-31 21:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF173EDAB86D@HQMAIL01.nvidia.com>
On Monday 31 October 2011 13:13:15 Stephen Warren wrote:
> Marc Dietrich wrote at Monday, October 31, 2011 1:59 PM:
> > This adds support for a wakeup gpio which is connected to the
> > embedded controller. This will be used later on for wakeup from suspend.
> >
> > Signed-off-by: Marc Dietrich <marvin24@gmx.de>
>
> Acked-by: Stephen Warren <swarren@nvidia.com>
>
> (Feel free to include that tag in any future postings unless there are
> significant changes that would merit my reviewing it again)
ok, will do for v4 ;-)
^ permalink raw reply
* [PATCH] i2c-gpio.c: correct logic of pdata->scl_is_open_drain
From: Håvard Skinnemoen @ 2011-10-31 21:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <EF2E73589CA71846A15D0B2CDF79505D087B34BE51@wm021.weinmann.com>
On Mon, Oct 31, 2011 at 9:14 AM, Voss, Nikolaus <N.Voss@weinmann.de> wrote:
> If pdata->scl_is_open_drain was set, the driver used push-pull output
> for SCL, not open-drain output.
>
> Signed-off-by: Nikolaus Voss <n.voss@weinmann.de>
{sda,scl}_is_open_drain indicates that the GPIO hardware is set up to
do open drain so the software doesn't have to, i.e.
gpio_set_value(pin, 1) will turn off the output driver rather than
drive the pin high, so the _val functions will do the right thing.
In other words, the existing code is correct.
Havard
^ permalink raw reply
* [PATCH 2/3] staging: nvec: add device tree support
From: Stephen Warren @ 2011-10-31 20:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <04ffd9770698b7efb119b92fa379eb2e2698e223.1320088857.git.marvin24@gmx.de>
Marc Dietrich wrote at Monday, October 31, 2011 1:59 PM:
> This adds device tree support to the nvec driver. By using this method
> it is no longer necessary to specify platform data through a board
> file.
...
> diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
...
> + if (pdata) {
> + nvec->gpio = pdata->gpio;
> + nvec->i2c_addr = pdata->i2c_addr;
> + } else if (nvec->dev->of_node) {
> + nvec->gpio = of_get_named_gpio(nvec->dev->of_node, "request-gpios", 0);
> + if (nvec->gpio < 0) {
> + dev_err(&pdev->dev, "no gpio specified");
> + goto failed;
> + }
> + prop = of_get_property(nvec->dev->of_node, "slave-addr", NULL);
> + if (!prop) {
> + dev_err(&pdev->dev, "no i2c address specified");
> + goto failed;
> + }
> + nvec->i2c_addr = be32_to_cpup(prop);
----------==========----------==========----------==========----------==========
Don't you want to use of_property_read_u32() here to simplify the code
slightly? You can also get rid of at least one #include that way.
> + } else {
> + dev_err(&pdev->dev, "no platform data\n");
> + goto failed;
> + }
--
nvpublic
^ permalink raw reply
* [PATCH 3/3] arm/dt: tegra: add dts file for paz00
From: Stephen Warren @ 2011-10-31 20:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <855f09f77c03a9f081818a03effdbd3bf7a30c91.1320088857.git.marvin24@gmx.de>
Marc Dietrich wrote at Monday, October 31, 2011 1:59 PM:
> This adds a dts file for paz00. As a side effect, this also enables
> the embedded controller which controls the keyboard, touchpad, power,
> leds, and some other functions.
...
> + serial at 70006000 {
> + clock-frequency = <216000000>;
> + };
> +
> + serial at 70006040 {
> + status = "disable";
> + };
> +
> + serial at 70006200 {
> + status = "disable";
> + };
> +
> + serial at 70006300 {
> + clock-frequency = <216000000>;
> + };
Don't you also want to disable serial at 70006400, or set a clock rate for
it?
--
nvpublic
^ permalink raw reply
* [PATCH 1/3] ARM: tegra: paz00: add support for wakeup gpio key
From: Stephen Warren @ 2011-10-31 20:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <36b0283d86591d2bc64fe454676ae214732cdb54.1320088857.git.marvin24@gmx.de>
Marc Dietrich wrote at Monday, October 31, 2011 1:59 PM:
> This adds support for a wakeup gpio which is connected to the
> embedded controller. This will be used later on for wakeup from suspend.
>
> Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
(Feel free to include that tag in any future postings unless there are
significant changes that would merit my reviewing it again)
--
nvpublic
^ permalink raw reply
* [PATCH 3/3] arm/dt: tegra: add dts file for paz00
From: Marc Dietrich @ 2011-10-31 19:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1320088857.git.marvin24@gmx.de>
This adds a dts file for paz00. As a side effect, this also enables
the embedded controller which controls the keyboard, touchpad, power,
leds, and some other functions.
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
---
arch/arm/boot/dts/tegra-paz00.dts | 78 +++++++++++++++++++++++++++++++++++++
arch/arm/mach-tegra/Makefile | 1 +
arch/arm/mach-tegra/Makefile.boot | 1 +
arch/arm/mach-tegra/board-dt.c | 3 +
4 files changed, 83 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/tegra-paz00.dts
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
new file mode 100644
index 0000000..7eebd16
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -0,0 +1,78 @@
+/dts-v1/;
+
+/memreserve/ 0x1c000000 0x04000000;
+/include/ "tegra20.dtsi"
+
+/ {
+ model = "Toshiba AC100 / Dynabook AZ";
+ compatible = "compal,paz00", "nvidia,tegra20";
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 root=/dev/mmcblk0p1";
+ };
+
+ memory at 0 {
+ reg = <0x00000000 0x20000000>;
+ };
+
+ i2c at 7000c000 {
+ clock-frequency = <400000>;
+ };
+
+ i2c at 7000c400 {
+ clock-frequency = <400000>;
+ };
+
+ i2c at 7000c500 {
+ status = "disable";
+ };
+
+ nvec at 7000c500 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,nvec";
+ reg = <0x7000C500 0x100>;
+ interrupts = <124>;
+ clock-frequency = <80000>;
+ request-gpios = <&gpio 170 0>;
+ slave-addr = <138>;
+ };
+
+ i2c at 7000d000 {
+ clock-frequency = <400000>;
+ };
+
+ serial at 70006000 {
+ clock-frequency = <216000000>;
+ };
+
+ serial at 70006040 {
+ status = "disable";
+ };
+
+ serial at 70006200 {
+ status = "disable";
+ };
+
+ serial at 70006300 {
+ clock-frequency = <216000000>;
+ };
+
+ sdhci at c8000000 {
+ cd-gpios = <&gpio 173 0>; /* gpio PV5 */
+ wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+ power-gpios = <&gpio 155 0>; /* gpio PT3 */
+ };
+
+ sdhci at c8000200 {
+ status = "disable";
+ };
+
+ sdhci at c8000400 {
+ status = "disable";
+ };
+
+ sdhci at c8000600 {
+ support-8bit;
+ };
+};
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 91a07e1..b04ebfe6 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -31,6 +31,7 @@ obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o
obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o
+obj-${CONFIG_MACH_TEGRA_DT} += board-paz00-pinmux.o
obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o
obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
index bd12c9f..152f9fb 100644
--- a/arch/arm/mach-tegra/Makefile.boot
+++ b/arch/arm/mach-tegra/Makefile.boot
@@ -3,5 +3,6 @@ params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
+dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb
dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index d368f8d..379660e 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -46,6 +46,7 @@
#include "devices.h"
void harmony_pinmux_init(void);
+void paz00_pinmux_init(void);
void seaboard_pinmux_init(void);
void ventana_pinmux_init(void);
@@ -85,6 +86,7 @@ static struct {
void (*init)(void);
} pinmux_configs[] = {
{ "nvidia,harmony", harmony_pinmux_init },
+ { "compal,paz00", paz00_pinmux_init },
{ "nvidia,seaboard", seaboard_pinmux_init },
{ "nvidia,ventana", ventana_pinmux_init },
};
@@ -120,6 +122,7 @@ static void __init tegra_dt_init(void)
static const char * tegra_dt_board_compat[] = {
"nvidia,harmony",
+ "compal,paz00",
"nvidia,seaboard",
"nvidia,ventana",
NULL
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/3] staging: nvec: add device tree support
From: Marc Dietrich @ 2011-10-31 19:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1320088857.git.marvin24@gmx.de>
This adds device tree support to the nvec driver. By using this method
it is no longer necessary to specify platform data through a board
file.
Cc: devel at driverdev.osuosl.org
Cc: Greg KH <gregkh@suse.de>
Cc: Julian Andres Klode <jak@jak-linux.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
---
.../devicetree/bindings/nvec/nvec_nvidia.txt | 9 +++++
drivers/staging/nvec/nvec.c | 35 ++++++++++++++++++-
2 files changed, 42 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/nvec/nvec_nvidia.txt
diff --git a/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt b/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt
new file mode 100644
index 0000000..5aeee53
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt
@@ -0,0 +1,9 @@
+NVIDIA compliant embedded controller
+
+Required properties:
+- compatible : should be "nvidia,nvec".
+- reg : the iomem of the i2c slave controller
+- interrupts : the interrupt line of the i2c slave controller
+- clock-frequency : the frequency of the i2c bus
+- gpios : the gpio used for ec request
+- slave-addr: the i2c address of the slave controller
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index e06b867..ffb73c0 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -27,6 +27,8 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
#include <linux/list.h>
#include <linux/mfd/core.h>
#include <linux/mutex.h>
@@ -36,6 +38,8 @@
#include <linux/spinlock.h>
#include <linux/workqueue.h>
+#include <asm/byteorder.h>
+
#include <mach/clk.h>
#include <mach/iomap.h>
@@ -719,6 +723,7 @@ static int __devinit tegra_nvec_probe(struct platform_device *pdev)
struct resource *res;
struct resource *iomem;
void __iomem *base;
+ const unsigned int *prop;
nvec = kzalloc(sizeof(struct nvec_chip), GFP_KERNEL);
if (nvec == NULL) {
@@ -727,8 +732,26 @@ static int __devinit tegra_nvec_probe(struct platform_device *pdev)
}
platform_set_drvdata(pdev, nvec);
nvec->dev = &pdev->dev;
- nvec->gpio = pdata->gpio;
- nvec->i2c_addr = pdata->i2c_addr;
+
+ if (pdata) {
+ nvec->gpio = pdata->gpio;
+ nvec->i2c_addr = pdata->i2c_addr;
+ } else if (nvec->dev->of_node) {
+ nvec->gpio = of_get_named_gpio(nvec->dev->of_node, "request-gpios", 0);
+ if (nvec->gpio < 0) {
+ dev_err(&pdev->dev, "no gpio specified");
+ goto failed;
+ }
+ prop = of_get_property(nvec->dev->of_node, "slave-addr", NULL);
+ if (!prop) {
+ dev_err(&pdev->dev, "no i2c address specified");
+ goto failed;
+ }
+ nvec->i2c_addr = be32_to_cpup(prop);
+ } else {
+ dev_err(&pdev->dev, "no platform data\n");
+ goto failed;
+ }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
@@ -893,6 +916,13 @@ static int tegra_nvec_resume(struct platform_device *pdev)
#define tegra_nvec_resume NULL
#endif
+/* Match table for of_platform binding */
+static const struct of_device_id nvidia_nvec_of_match[] __devinitconst = {
+ { .compatible = "nvidia,nvec", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, nvidia_nvec_of_match);
+
static struct platform_driver nvec_device_driver = {
.probe = tegra_nvec_probe,
.remove = __devexit_p(tegra_nvec_remove),
@@ -901,6 +931,7 @@ static struct platform_driver nvec_device_driver = {
.driver = {
.name = "nvec",
.owner = THIS_MODULE,
+ .of_match_table = nvidia_nvec_of_match,
}
};
--
1.7.5.4
^ permalink raw reply related
* [PATCH 1/3] ARM: tegra: paz00: add support for wakeup gpio key
From: Marc Dietrich @ 2011-10-31 19:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1320088857.git.marvin24@gmx.de>
This adds support for a wakeup gpio which is connected to the
embedded controller. This will be used later on for wakeup from suspend.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
---
arch/arm/mach-tegra/board-paz00.c | 27 +++++++++++++++++++++++++++
arch/arm/mach-tegra/board-paz00.h | 3 +++
2 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 55c55ba..799e420 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -23,8 +23,10 @@
#include <linux/serial_8250.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
+#include <linux/gpio_keys.h>
#include <linux/pda_power.h>
#include <linux/io.h>
+#include <linux/input.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/rfkill-gpio.h>
@@ -114,12 +116,37 @@ static struct platform_device leds_gpio = {
},
};
+static struct gpio_keys_button paz00_gpio_keys_buttons[] = {
+ {
+ .code = KEY_POWER,
+ .gpio = TEGRA_GPIO_POWERKEY,
+ .active_low = 1,
+ .desc = "Power",
+ .type = EV_KEY,
+ .wakeup = 1,
+ },
+};
+
+static struct gpio_keys_platform_data paz00_gpio_keys = {
+ .buttons = paz00_gpio_keys_buttons,
+ .nbuttons = ARRAY_SIZE(paz00_gpio_keys_buttons),
+};
+
+static struct platform_device gpio_keys_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .dev = {
+ .platform_data = &paz00_gpio_keys,
+ },
+};
+
static struct platform_device *paz00_devices[] __initdata = {
&debug_uart,
&tegra_sdhci_device4,
&tegra_sdhci_device1,
&wifi_rfkill_device,
&leds_gpio,
+ &gpio_keys_device,
};
static void paz00_i2c_init(void)
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index 8aff06e..ffa83f5 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -32,6 +32,9 @@
#define TEGRA_WIFI_RST TEGRA_GPIO_PD1
#define TEGRA_WIFI_LED TEGRA_GPIO_PD0
+/* WakeUp */
+#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PJ7
+
void paz00_pinmux_init(void);
#endif
--
1.7.5.4
^ permalink raw reply related
* [PATCH v3 0/3] paz00 updates for 3.3
From: Marc Dietrich @ 2011-10-31 19:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
the following three patches are intended for the 3.3 merge window and are based
on linux-next.
The first one adds wakeup support similar to seaboard, but with the difference
that the wakeup gpio is connected to the embedded controller instead of a real
gpio key.
The second patch adds device tree support for the nvec driver. This way we can
make use of it without adding more platform devices to the board files (and it
is also modern to do so).
The final one adds device tree support for paz00. The way the nvec it is
initialized will probably change in the future, but we like to include it for
now as it makes debugging easier.
The patches are against linux-next from Oct 25th.
Thanks
Marc
Changes since v2
- remove the mem= from the bootargs, this is handled by the memory property
already
- change the root device until the sdhci init order can be changed
- do not init unused serial ports
- add dt documentation for nvec
- remove CONFIG_OF #ifdefs from nvec.c
- exchange the order of patch 2 and 3
Changes since v1
- replace addition of the embedded controller to the board file by a device-tree
based implementation.
Marc Dietrich (3):
ARM: tegra: paz00: add support for wakeup gpio key
staging: nvec: add device tree support
arm/dt: tegra: add dts file for paz00
.../devicetree/bindings/nvec/nvec_nvidia.txt | 9 ++
arch/arm/boot/dts/tegra-paz00.dts | 78 ++++++++++++++++++++
arch/arm/mach-tegra/Makefile | 1 +
arch/arm/mach-tegra/Makefile.boot | 1 +
arch/arm/mach-tegra/board-dt.c | 3 +
arch/arm/mach-tegra/board-paz00.c | 27 +++++++
arch/arm/mach-tegra/board-paz00.h | 3 +
drivers/staging/nvec/nvec.c | 35 ++++++++-
8 files changed, 155 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/nvec/nvec_nvidia.txt
create mode 100644 arch/arm/boot/dts/tegra-paz00.dts
--
1.7.5.4
^ permalink raw reply
* [PATCH 3/3 v3.1] ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
From: Mark Brown @ 2011-10-31 18:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320086573-21184-1-git-send-email-broonie@opensource.wolfsonmicro.com>
The gpio_base for the PMIC on the CPU module was being incorrectly set to
be the same as that for the CODEC causing the two GPIO drivers to collide.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
arch/arm/mach-s3c64xx/mach-crag6410.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 3903d86..03eb475 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -74,6 +74,7 @@
#define PCA935X_GPIO_BASE GPIO_BOARD_START
#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
+#define BANFF_PMIC_GPIO_BASE (GLENFARCLAS_PMIC_GPIO_BASE + 16)
/* serial port setup */
@@ -509,7 +510,7 @@ static struct wm831x_touch_pdata touch_pdata __initdata = {
static struct wm831x_pdata crag_pmic_pdata __initdata = {
.wm831x_num = 1,
.irq_base = BANFF_PMIC_IRQ_BASE,
- .gpio_base = GPIO_BOARD_START + 8,
+ .gpio_base = BANFF_PMIC_GPIO_BASE,
.soft_shutdown = true,
.backup = &banff_backup_pdata,
--
1.7.7.1
^ permalink raw reply related
* [PATCH 2/3 v3.1] ARM: SAMSUNG: Fix GPIO space reservation for S3C64xx platforms
From: Mark Brown @ 2011-10-31 18:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320086573-21184-1-git-send-email-broonie@opensource.wolfsonmicro.com>
The conversion to use SAMSUNG_GPIO_EXTRA rather than S3C24XX_GPIO_EXTRA
broke a number of S3C64xx boards which had been using the symbols provided
to reserve a range of GPIOs for board specific use. Fix this by adding
equivalent symbols for the new shared driver and updating the relevant
boards to use the new symbols.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
arch/arm/mach-s3c64xx/Kconfig | 6 +++---
arch/arm/plat-samsung/Kconfig | 8 ++++++++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 5552e04..4d8c489 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -188,7 +188,7 @@ config SMDK6410_WM1190_EV1
depends on MACH_SMDK6410
select REGULATOR
select REGULATOR_WM8350
- select S3C24XX_GPIO_EXTRA64
+ select SAMSUNG_GPIO_EXTRA64
select MFD_WM8350_I2C
select MFD_WM8350_CONFIG_MODE_0
select MFD_WM8350_CONFIG_MODE_3
@@ -206,7 +206,7 @@ config SMDK6410_WM1192_EV1
depends on MACH_SMDK6410
select REGULATOR
select REGULATOR_WM831X
- select S3C24XX_GPIO_EXTRA64
+ select SAMSUNG_GPIO_EXTRA64
select MFD_WM831X
select MFD_WM831X_I2C
help
@@ -287,7 +287,7 @@ config MACH_WLF_CRAGG_6410
select S3C_DEV_WDT
select S3C_DEV_RTC
select S3C64XX_DEV_SPI
- select S3C24XX_GPIO_EXTRA128
+ select SAMSUNG_GPIO_EXTRA128
select I2C
help
Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 313eb26..bb0af66 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -88,12 +88,20 @@ config S5P_GPIO_DRVSTR
config SAMSUNG_GPIO_EXTRA
int "Number of additional GPIO pins"
+ default 128 if SAMSUNG_GPIO_EXTRA128
+ default 64 if SAMSUNG_GPIO_EXTRA64
default 0
help
Use additional GPIO space in addition to the GPIO's the SOC
provides. This allows expanding the GPIO space for use with
GPIO expanders.
+config SAMSUNG_GPIO_EXTRA64
+ bool
+
+config SAMSUNG_GPIO_EXTRA128
+ bool
+
config S3C_GPIO_SPACE
int "Space between gpio banks"
default 0
--
1.7.7.1
^ permalink raw reply related
* [PATCH 1/3 v3.1] ARM: S3C64XX: Update for conversion to SAMSUNG_GPIO_EXTRA
From: Mark Brown @ 2011-10-31 18:42 UTC (permalink / raw)
To: linux-arm-kernel
The conversion of the S3C64XX GPIOs to the generic Samsung GPIOs mean that
rather than using the previous S3C24XX_GPIO_EXTRA configuration the driver
now uses SAMSUNG_GPIO_EXTRA.
Since SAMSUNG_GPIO_EXTRA requires the arch to include the extra space in
ARCH_NR_GPIOs add it on to BOARD_NR_GPIOs (in case boards are relying on
the existing reservation).
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
arch/arm/mach-s3c64xx/include/mach/gpio.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index 6e34c2f..090c497 100644
--- a/arch/arm/mach-s3c64xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -88,6 +88,6 @@ enum s3c_gpio_number {
/* define the number of gpios we need to the one after the GPQ() range */
#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
-#define BOARD_NR_GPIOS 16
+#define BOARD_NR_GPIOS (16 + CONFIG_SAMSUNG_GPIO_EXTRA)
#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
--
1.7.7.1
^ permalink raw reply related
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