* Re: [PATCH v2 1/7] dt-bindings: media: qcom: Add Shikra CAMSS compatible
From: Krzysztof Kozlowski @ 2026-06-08 20:46 UTC (permalink / raw)
To: Nihal Kumar Gupta
Cc: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Foss, Andi Shyti, Bryan O'Donoghue,
Bjorn Andersson, Konrad Dybcio, Frank Li, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-msm,
linux-media, devicetree, linux-kernel, linux-i2c, imx,
linux-arm-kernel, Suresh Vankadara, Vikram Sharma
In-Reply-To: <20260608-shikra-camss-review-v2-1-ca1936bf1219@oss.qualcomm.com>
On Mon, Jun 08, 2026 at 07:36:38PM +0530, Nihal Kumar Gupta wrote:
> Shikra contains the same Camera Subsystem IP as QCM2290. Document the
> platform-specific compatible string, using qcom,qcm2290-camss as
> fallback.
>
> Unlike QCM2290, Shikra omits the CDM and OPE blocks, requiring only a
> single IOMMU context bank instead of four.
>
> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
> ---
> .../devicetree/bindings/media/qcom,qcm2290-camss.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml
> index 391d0f6f67ef5fdfea31dd3683477561516b1556..4f39eefb4898ebc22117407f26cfb4f41deb111b 100644
> --- a/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml
> +++ b/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml
> @@ -14,8 +14,11 @@ description:
>
> properties:
> compatible:
> - const: qcom,qcm2290-camss
> -
Do not remove blank lines.
> + oneOf:
> + - items:
> + - const: qcom,shikra-camss
> + - const: qcom,qcm2290-camss
> + - const: qcom,qcm2290-camss
> reg:
With this fixed:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v3 3/3] ARM: dts: ti: Add specific compatibles for SCM conf nodes
From: Krzysztof Kozlowski @ 2026-06-08 20:44 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jacky Huang,
Shan-Chun Hung, Geert Uytterhoeven, Magnus Damm, Heiko Stuebner,
Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros,
Tony Lindgren
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
linux-renesas-soc, linux-rockchip, linux-omap,
Krzysztof Kozlowski
In-Reply-To: <20260608-n-dt-bindings-simple-bus-syscon-v3-0-4eba9ec1212a@oss.qualcomm.com>
writing-bindings.rst rules dictate that "syscon" must come with a
specific compatible identifying the register layout. Add specific
compatibles for these devices.
This also allows to solve a different problem: "syscon" is contradictory
to "simple-bus". A system controller with registers having their own
functions is not really a trivial MMIO simple bus. These two cannot be
used together, unless listed as an exception.
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
Changes in v3:
1. s/ti,omap5-scm-conf/ti,omap5-sysc-padconf-global/ because it is more
appropriate (specific)
---
arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/am437x-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/dm814x.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/dm816x.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/dra7-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap2430.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap3.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap4-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap5-l4.dtsi | 6 +++---
9 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
index 89d16fcc773e..1e09d2b48925 100644
--- a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
@@ -308,7 +308,7 @@ am33xx_pinmux: pinmux@800 {
};
scm_conf: scm_conf@0 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,am3352-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi b/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi
index e08f356e71cb..30fcce33f4b7 100644
--- a/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi
@@ -301,7 +301,7 @@ am43xx_pinmux: pinmux@800 {
};
scm_conf: scm_conf@0 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,am4372-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/dm814x.dtsi b/arch/arm/boot/dts/ti/omap/dm814x.dtsi
index 27d1f35a31fd..9e02bfa5c3a2 100644
--- a/arch/arm/boot/dts/ti/omap/dm814x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm814x.dtsi
@@ -432,7 +432,7 @@ control: control@140000 {
ranges = <0 0x140000 0x20000>;
scm_conf: scm_conf@0 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,dm814-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
index a1e0e904e0f0..ee0090f7aa64 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
@@ -100,7 +100,7 @@ dm816x_pinmux: pinmux@800 {
/* Device Configuration Registers */
scm_conf: syscon@600 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,dm8168-scm-conf", "syscon", "simple-bus";
reg = <0x600 0x110>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
index c8d325b0f57b..9df7648c4b79 100644
--- a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
@@ -64,7 +64,7 @@ scm: scm@0 {
ranges = <0 0 0x2000>;
scm_conf: scm_conf@0 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,dra7-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x1400>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/omap2430.dtsi b/arch/arm/boot/dts/ti/omap/omap2430.dtsi
index 222613d2a4d1..01bd471f9223 100644
--- a/arch/arm/boot/dts/ti/omap/omap2430.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap2430.dtsi
@@ -50,7 +50,7 @@ omap2430_pmx: pinmux@30 {
};
scm_conf: scm_conf@270 {
- compatible = "syscon",
+ compatible = "ti,omap2-scm-conf", "syscon",
"simple-bus";
reg = <0x270 0x240>;
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/omap3.dtsi b/arch/arm/boot/dts/ti/omap/omap3.dtsi
index 959069e24730..447736d2e53c 100644
--- a/arch/arm/boot/dts/ti/omap/omap3.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap3.dtsi
@@ -116,7 +116,7 @@ omap3_pmx_core: pinmux@30 {
};
scm_conf: scm_conf@270 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,omap3-scm-conf", "syscon", "simple-bus";
reg = <0x270 0x330>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi b/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi
index 4c78a0b28fab..c1afc49f456c 100644
--- a/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi
@@ -681,7 +681,7 @@ omap4_pmx_core: pinmux@40 {
};
omap4_padconf_global: omap4_padconf_global@5a0 {
- compatible = "syscon",
+ compatible = "ti,omap4-sysc-padconf-global", "syscon",
"simple-bus";
reg = <0x5a0 0x170>;
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi b/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi
index 915870eb5c99..72849e1c95b0 100644
--- a/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi
@@ -96,8 +96,7 @@ omap5_pmx_core: pinmux@40 {
};
omap5_padconf_global: omap5_padconf_global@5a0 {
- compatible = "syscon",
- "simple-bus";
+ compatible = "ti,omap5-sysc-padconf-global", "syscon", "simple-bus";
reg = <0x5a0 0xec>;
#address-cells = <1>;
#size-cells = <1>;
@@ -2311,7 +2310,8 @@ omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
ranges = <0 0 0x60>;
scm_wkup_pad_conf: scm_conf@0 {
- compatible = "syscon", "simple-bus";
+ compatible = "ti,omap5-scm-wkup-conf",
+ "syscon", "simple-bus";
reg = <0x0 0x60>;
#address-cells = <1>;
#size-cells = <1>;
--
2.53.0
^ permalink raw reply related
* [PATCH v3 2/3] dt-bindings: mfd: syscon: Drop custom select for older dtschema
From: Krzysztof Kozlowski @ 2026-06-08 20:44 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jacky Huang,
Shan-Chun Hung, Geert Uytterhoeven, Magnus Damm, Heiko Stuebner,
Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros,
Tony Lindgren
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
linux-renesas-soc, linux-rockchip, linux-omap,
Krzysztof Kozlowski
In-Reply-To: <20260608-n-dt-bindings-simple-bus-syscon-v3-0-4eba9ec1212a@oss.qualcomm.com>
Older dtschema <2024.02 required custom select to avoid applying this
binding to anything having "syscon" compatible. That's not the case
anymore and this additional select has two headaches:
1. Duplicates all the compatibles listed in the schema.
2. Is error-prone, because it requires contributor to add the compatible
in two places, otherwise the schema will be silently ignored.
The select list already misses mentioning compatibles:
mediatek,mt8365-infracfg-nao and renesas,r9a08g046-lvds-cmn (with the
latter being reverted for different reasons).
This requires bumping minimum dtschema requirement to v2024.04, which
feels old enough to be a safe requirement.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
Changes in v3:
1. Bump dtschema requirement
Changes in v2:
1. New patch
---
Documentation/devicetree/bindings/Makefile | 2 +-
Documentation/devicetree/bindings/mfd/syscon.yaml | 116 ----------------------
2 files changed, 1 insertion(+), 117 deletions(-)
diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile
index 7b668f7fd400..40c2094f47c2 100644
--- a/Documentation/devicetree/bindings/Makefile
+++ b/Documentation/devicetree/bindings/Makefile
@@ -6,7 +6,7 @@ DT_MK_SCHEMA ?= dt-mk-schema
DT_SCHEMA_LINT = $(shell which yamllint || \
echo "warning: python package 'yamllint' not installed, skipping" >&2)
-DT_SCHEMA_MIN_VERSION = 2023.9
+DT_SCHEMA_MIN_VERSION = 2024.4
PHONY += check_dtschema_version
check_dtschema_version:
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 9c81010d5a74..b70018bf1bcf 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -19,122 +19,6 @@ description: |
maintainers:
- Lee Jones <lee@kernel.org>
-# Need a select with all compatibles listed for compatibility with older
-# dtschema (<2024.02), so this will not be selected for other schemas having
-# syscon fallback.
-select:
- properties:
- compatible:
- contains:
- enum:
- - airoha,en7581-pbus-csr
- - al,alpine-sysfabric-service
- - allwinner,sun8i-a83t-system-controller
- - allwinner,sun8i-h3-system-controller
- - allwinner,sun8i-v3s-system-controller
- - allwinner,sun50i-a64-system-controller
- - altr,l3regs
- - altr,sdr-ctl
- - amd,pensando-elba-syscon
- - amlogic,meson-mx-assist
- - amlogic,meson-mx-bootrom
- - amlogic,meson8-analog-top
- - amlogic,meson8b-analog-top
- - amlogic,meson8-pmu
- - amlogic,meson8b-pmu
- - apm,merlin-poweroff-mailbox
- - apm,mustang-poweroff-mailbox
- - apm,xgene-csw
- - apm,xgene-efuse
- - apm,xgene-mcb
- - apm,xgene-rb
- - apm,xgene-scu
- - atmel,sama5d2-sfrbu
- - atmel,sama5d3-nfc-io
- - atmel,sama5d3-sfrbu
- - atmel,sama5d4-sfrbu
- - axis,artpec6-syscon
- - brcm,cru-clkset
- - brcm,sr-cdru
- - brcm,sr-mhb
- - cirrus,ep7209-syscon1
- - cirrus,ep7209-syscon2
- - cirrus,ep7209-syscon3
- - cnxt,cx92755-uc
- - econet,en751221-chip-scu
- - freecom,fsg-cs2-system-controller
- - fsl,imx93-aonmix-ns-syscfg
- - fsl,imx93-wakeupmix-syscfg
- - fsl,ls1088a-reset
- - fsl,vf610-anatop
- - fsl,vf610-mscm-cpucfg
- - hisilicon,dsa-subctrl
- - hisilicon,hi6220-sramctrl
- - hisilicon,hip04-ppe
- - hisilicon,pcie-sas-subctrl
- - hisilicon,peri-subctrl
- - hpe,gxp-sysreg
- - loongson,ls1b-syscon
- - loongson,ls1c-syscon
- - lsi,axxia-syscon
- - marvell,armada-3700-cpu-misc
- - marvell,armada-3700-nb-pm
- - marvell,armada-3700-avs
- - marvell,armada-3700-usb2-host-device-misc
- - marvell,armada-3700-usb2-host-misc
- - marvell,dove-global-config
- - mediatek,mt2701-pctl-a-syscfg
- - mediatek,mt2712-pctl-a-syscfg
- - mediatek,mt6397-pctl-pmic-syscfg
- - mediatek,mt7981-topmisc
- - mediatek,mt7988-topmisc
- - mediatek,mt8135-pctl-a-syscfg
- - mediatek,mt8135-pctl-b-syscfg
- - mediatek,mt8173-pctl-a-syscfg
- - mediatek,mt8365-syscfg
- - microchip,lan966x-cpu-syscon
- - microchip,mpfs-control-scb
- - microchip,mpfs-sysreg-scb
- - microchip,sam9x60-sfr
- - microchip,sama7d65-ddr3phy
- - microchip,sama7d65-sfrbu
- - microchip,sama7g5-ddr3phy
- - mscc,ocelot-cpu-syscon
- - mstar,msc313-pmsleep
- - nuvoton,ma35d1-sys
- - nuvoton,wpcm450-shm
- - nxp,s32g2-gpr
- - nxp,s32g3-gpr
- - qcom,apq8064-mmss-sfpb
- - qcom,apq8064-sps-sic
- - rockchip,px30-qos
- - rockchip,rk3036-qos
- - rockchip,rk3066-qos
- - rockchip,rk3128-qos
- - rockchip,rk3228-qos
- - rockchip,rk3288-qos
- - rockchip,rk3368-qos
- - rockchip,rk3399-qos
- - rockchip,rk3528-qos
- - rockchip,rk3562-qos
- - rockchip,rk3568-qos
- - rockchip,rk3576-qos
- - rockchip,rk3588-qos
- - rockchip,rv1126-qos
- - st,spear1340-misc
- - stericsson,nomadik-pmu
- - starfive,jh7100-sysmain
- - ti,am62-opp-efuse-table
- - ti,am62-usb-phy-ctrl
- - ti,am625-dss-oldi-io-ctrl
- - ti,am62p-cpsw-mac-efuse
- - ti,am654-dss-oldi-io-ctrl
- - ti,j784s4-acspcie-proxy-ctrl
- - ti,j784s4-pcie-ctrl
- - ti,keystone-pllctrl
- required:
- - compatible
-
properties:
compatible:
oneOf:
--
2.53.0
^ permalink raw reply related
* [PATCH v3 1/3] dt-bindings: mfd: syscon: Disallow simple-bus with syscon
From: Krzysztof Kozlowski @ 2026-06-08 20:44 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jacky Huang,
Shan-Chun Hung, Geert Uytterhoeven, Magnus Damm, Heiko Stuebner,
Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros,
Tony Lindgren
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
linux-renesas-soc, linux-rockchip, linux-omap,
Krzysztof Kozlowski
In-Reply-To: <20260608-n-dt-bindings-simple-bus-syscon-v3-0-4eba9ec1212a@oss.qualcomm.com>
"syscon" is a system controller with registers having their own
functions, thus not really a trivial MMIO simple bus. "simple-bus" on
the other hand is just a bus on which multiple devices sit and the
"simple" means no functions are allowed here.
Combination of both "syscon" and "simple-bus" is abuse of DT for easier
instantiating of Linux device drivers so add a schema to disallow that.
Unfortunately there are a few old cases of that patterns, so add
exceptions:
1. "cznic,turris1x-cpld" and "img,pistachio-cr-periph" are already used
in upstream DTS.
2. TI has several DTSI with a child of SCM device (e.g. "ti,am3-scm")
using "syscon" and "simple-bus" but without a dedicated compatible
documented anywhere. Add new compatibles for such cases.
Additionally, add comments around code enforcing two or three
compatibles: it is similar safeguard detecting incorrect bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
Changes in v3:
1. s/ti,omap5-scm-conf/ti,omap5-sysc-padconf-global/ because it is more
appropriate (specific)
2. Add comments, why simple-mfd+syscon has dedicated if:then:
Changes in v2:
1. Complete patch. I accidentally sent only part of it, built on top of
internal WIP which I forgot to squash.
I received Ack from Rob, but change is significant, so please kindly
re-review.
---
.../devicetree/bindings/mfd/syscon-common.yaml | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon-common.yaml b/Documentation/devicetree/bindings/mfd/syscon-common.yaml
index 14a08e7bc8bd..2d5eef5add54 100644
--- a/Documentation/devicetree/bindings/mfd/syscon-common.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon-common.yaml
@@ -32,6 +32,7 @@ properties:
compatible:
contains:
const: syscon
+ # Always require a specific compatible for syscon
minItems: 2
maxItems: 5 # Should be enough
@@ -52,11 +53,44 @@ allOf:
contains:
const: simple-mfd
then:
+ # Always require a specific compatible for syscon with simple-mfd
properties:
compatible:
minItems: 3
maxItems: 5
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: simple-bus
+ then:
+ # simple-bus conflicts with syscon - if a device is a system controller
+ # with miscellaneous registers, then it has at least one dedicated
+ # function thus it is not a simple bus. Allow existing exceptions.
+ if:
+ properties:
+ compatible:
+ not:
+ contains:
+ # This list CANNOT grow
+ enum:
+ - cznic,turris1x-cpld
+ - img,pistachio-cr-periph
+ - ti,am3352-scm-conf
+ - ti,am4372-scm-conf
+ - ti,dm814-scm-conf
+ - ti,dm8168-scm-conf
+ - ti,dra7-scm-conf
+ - ti,omap2-scm-conf
+ - ti,omap3-scm-conf
+ - ti,omap4-sysc-padconf-global
+ - ti,omap5-scm-wkup-conf
+ - ti,omap5-sysc-padconf-global
+ then:
+ required:
+ - incorrect-usage-of-simple-bus-and-syscon
+
additionalProperties: true
examples:
--
2.53.0
^ permalink raw reply related
* [PATCH v3 0/3] dt-bindings: mfd: syscon: Tighten checks
From: Krzysztof Kozlowski @ 2026-06-08 20:44 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jacky Huang,
Shan-Chun Hung, Geert Uytterhoeven, Magnus Damm, Heiko Stuebner,
Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros,
Tony Lindgren
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
linux-renesas-soc, linux-rockchip, linux-omap,
Krzysztof Kozlowski
Changes in v3:
- Drop patch #2:
dt-bindings: mfd: syscon: Drop unneeded case for syscon + simple-mfd
- Bump dtschema requirement
- Link to v2: https://patch.msgid.link/20260608-n-dt-bindings-simple-bus-syscon-v2-0-0203e6c249dc@oss.qualcomm.com
Changes in v2:
1. New patches #2 and #3
1. Add missing part of patch #1, thus not adding Rob's Ack.
https://lore.kernel.org/all/20260531110404.12768-3-krzysztof.kozlowski@oss.qualcomm.com/
I tested dt_binding_check and dtbs_check for arm, arm64 and riscv and I
think I did not introduce new dtbs_check warnings. Old code anyway has
multiple abuses of syscon, thus tricky to judge for arm at least.
Best regards,
Krzysztof
---
Krzysztof Kozlowski (3):
dt-bindings: mfd: syscon: Disallow simple-bus with syscon
dt-bindings: mfd: syscon: Drop custom select for older dtschema
ARM: dts: ti: Add specific compatibles for SCM conf nodes
Documentation/devicetree/bindings/Makefile | 2 +-
.../devicetree/bindings/mfd/syscon-common.yaml | 34 ++++++
Documentation/devicetree/bindings/mfd/syscon.yaml | 116 ---------------------
arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/am437x-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/dm814x.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/dm816x.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/dra7-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap2430.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap3.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap4-l4.dtsi | 2 +-
arch/arm/boot/dts/ti/omap/omap5-l4.dtsi | 6 +-
12 files changed, 46 insertions(+), 128 deletions(-)
---
base-commit: 78f5e68a8d0a1123dd1b007688ccf0e6876a5c15
change-id: 20260608-n-dt-bindings-simple-bus-syscon-e39df408a02d
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
^ permalink raw reply
* Re: [PATCHv2 0/3] watchdog: sama5d4: fix IRQ and timeout bugs, use platform_get_irq_optional
From: Rosen Penev @ 2026-06-08 20:42 UTC (permalink / raw)
To: Nicolas Ferre
Cc: linux-watchdog, Alexandre Belloni, Claudiu Beznea,
Wim Van Sebroeck, Guenter Roeck,
moderated list:ARM/Microchip (AT91) SoC support, open list
In-Reply-To: <10b595d3-d44b-4fbb-a834-a94b154a0381@microchip.com>
On Mon, Jun 8, 2026 at 1:38 PM Nicolas Ferre
<nicolas.ferre@microchip.com> wrote:
>
> On 08/06/2026 at 13:09, Rosen Penev wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > This series fixes three issues in the sama5d4 watchdog driver:
> >
> > Patch 1: Return IRQ_NONE when the status register indicates no watchdog
> > interrupt is pending, and pass the configured timeout (not the hardcoded
> > default) to sama5d4_wdt_init().
> >
> > Patch 2: Replace irq_of_parse_and_map() with platform_get_irq_optional()
> > for simpler error handling and EPROBE_DEFER support.
> >
> > Patch 3: Move platform_set_drvdata() before devm_request_irq() to prevent
> > a NULL pointer dereference in the interrupt handler if the shared System
> > IRQ fires immediately after registration.
> >
> > v2: address sashiko review
>
> Rosen,
>
> I'd like to hear how these issues where found and how the patches were
> tested.
They were not. Maintainer has explicitly asked me to fix issues
discovered by https://sashiko.dev
I originally only had patch 2, which is true of multiple places.
>
> Best regards,
> Nicolas
>
> > Rosen Penev (3):
> > watchdog: sama5d4: fix shared IRQ and hardcoded timeout issues
> > watchdog: sama5d4: use platform_get_irq_optional()
> > watchdog: sama5d4: fix NULL deref in irq handler
> >
> > drivers/watchdog/sama5d4_wdt.c | 32 +++++++++++++++++---------------
> > 1 file changed, 17 insertions(+), 15 deletions(-)
> >
> > --
> > 2.54.0
> >
>
^ permalink raw reply
* Re: [PATCHv2 0/3] watchdog: sama5d4: fix IRQ and timeout bugs, use platform_get_irq_optional
From: Nicolas Ferre @ 2026-06-08 20:38 UTC (permalink / raw)
To: Rosen Penev, linux-watchdog
Cc: Alexandre Belloni, Claudiu Beznea, Wim Van Sebroeck,
Guenter Roeck, moderated list:ARM/Microchip (AT91) SoC support,
open list
In-Reply-To: <20260608200933.18669-1-rosenp@gmail.com>
On 08/06/2026 at 13:09, Rosen Penev wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> This series fixes three issues in the sama5d4 watchdog driver:
>
> Patch 1: Return IRQ_NONE when the status register indicates no watchdog
> interrupt is pending, and pass the configured timeout (not the hardcoded
> default) to sama5d4_wdt_init().
>
> Patch 2: Replace irq_of_parse_and_map() with platform_get_irq_optional()
> for simpler error handling and EPROBE_DEFER support.
>
> Patch 3: Move platform_set_drvdata() before devm_request_irq() to prevent
> a NULL pointer dereference in the interrupt handler if the shared System
> IRQ fires immediately after registration.
>
> v2: address sashiko review
Rosen,
I'd like to hear how these issues where found and how the patches were
tested.
Best regards,
Nicolas
> Rosen Penev (3):
> watchdog: sama5d4: fix shared IRQ and hardcoded timeout issues
> watchdog: sama5d4: use platform_get_irq_optional()
> watchdog: sama5d4: fix NULL deref in irq handler
>
> drivers/watchdog/sama5d4_wdt.c | 32 +++++++++++++++++---------------
> 1 file changed, 17 insertions(+), 15 deletions(-)
>
> --
> 2.54.0
>
^ permalink raw reply
* Re: [GIT PULL] coresight: Updates for Linux v7.2
From: Greg KH @ 2026-06-08 19:37 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-arm-kernel, coresight, james.clark, leo.yan, mike.leach
In-Reply-To: <20260608125424.283998-1-suzuki.poulose@arm.com>
On Mon, Jun 08, 2026 at 01:54:24PM +0100, Suzuki K Poulose wrote:
> Hi Greg
>
> Please find the updates for CoreSight self hosted tracing subsystem targeting
> Linux v7.2
>
> Kindly pull,
>
> Suzuki
>
> ---
>
>
> The following changes since commit 7fd2df204f342fc17d1a0bfcd474b24232fb0f32:
>
> Linux 7.1-rc2 (2026-05-03 14:21:25 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-next-v7.2
Pulled and pushed out, thanks.
greg k-h
^ permalink raw reply
* Re: -next boot failures during KVM setup
From: Marc Zyngier @ 2026-06-08 20:18 UTC (permalink / raw)
To: Mark Brown, Will Deacon, Catalin Marinas, Ard Biesheuvel
Cc: Oliver Upton, Aishwarya.TCV, linux-arm-kernel
In-Reply-To: <aicVyebkEMs6w6UV@sirena.co.uk>
[+ Will, Catalin, Ard]
On Mon, 08 Jun 2026 20:19:37 +0100,
Mark Brown <broonie@kernel.org> wrote:
>
> I'm seeing boot failures on a range of physical arm64 platforms in
> today's -next. Turning on earlycon it looks like we're getting bad
> pointer dereferences during KVM initialisation:
>
> [ 0.728923] kvm [1]: nv: 570 coarse grained trap handlers
> [ 0.735138] kvm [1]: nv: 710 fine grained trap handlers
> [ 0.741326] kvm [1]: IPA Size Limit: 40 bits
> [ 0.748840] Unable to handle kernel paging request at virtual address ffff00000478e000
That really doesn't look like a duff pointer.
> [ 0.757027] Mem abort info:
> [ 0.759917] ESR = 0x0000000096000147
Translation fault, level 3. My take is that something is getting
unmapped.
> [ 0.763772] EC = 0x25: DABT (current EL), IL = 32 bits
> [ 0.851526] pc : dcache_clean_inval_poc+0x24/0x48
> [ 0.856367] lr : kvm_arm_init+0xbb0/0x13f0
> ...
>
> [ 0.937120] Call trace:
> [ 0.939628] dcache_clean_inval_poc+0x24/0x48 (P)
> [ 0.944457] do_one_initcall+0x60/0x1d4
> [ 0.948393] kernel_init_freeable+0x250/0x2d8
>
> https://lava.sirena.org.uk/scheduler/job/2849583#L848
>
> (with other platforms I've got earlycon logs showing basically the same
> thing). I have some bisects but they seem to have been confused by
> earlier driver core issues, I've tweaked to try to avoid that and am
> retrying. FVP and qemu seem unaffected:
>
> https://lava.sirena.org.uk/scheduler/job/2848374#L888
> https://lava.sirena.org.uk/scheduler/job/2848966#L447
>
> The affected platforms thus far are all SMP Cortex A53/5 systems, but
> that's the vast majority of my lab. They have both GICv3 and GICv2.
I've reproduced with -next on an A72 platform. But it doesn't happen
with kvmarm/next on its own. So it is likely something coming from
another tree that messes up with CMOs, or .
The stack trace here is slightly better:
[ 0.099138] Unable to handle kernel paging request at virtual address ffff0023d9ead000
[ 0.099141] Mem abort info:
[ 0.099142] ESR = 0x0000000096000147
[ 0.099144] EC = 0x25: DABT (current EL), IL = 32 bits
[ 0.099146] SET = 0, FnV = 0
[ 0.099148] EA = 0, S1PTW = 0
[ 0.099150] FSC = 0x07: level 3 translation fault
[ 0.099151] Data abort info:
[ 0.099153] ISV = 0, ISS = 0x00000147, ISS2 = 0x00000000
[ 0.099155] CM = 1, WnR = 1, TnD = 0, TagAccess = 0
[ 0.099157] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
[ 0.099159] swapper pgtable: 4k pages, 48-bit VAs, pgdp=000000245983b000
[ 0.099162] [ffff0023d9ead000] pgd=18000027fffff403, p4d=18000027fffff403, pud=18000027ffffe403, pmd=18000027fffed403, pte=00e8002459eadf06
[ 0.099173] Internal error: Oops: 0000000096000147 [#1] SMP
[ 0.582137] Freeing initrd memory: 29068K
[ 2.025400] Modules linked in:
[ 2.028447] CPU: 2 UID: 0 PID: 1 Comm: swapper/0 Not tainted 7.1.0-rc7-next-20260608 #6265 PREEMPT
[ 2.037482] Hardware name: SolidRun Ltd. SolidRun CEX7 Platform, BIOS EDK II May 30 2024
[ 2.045559] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 2.052510] pc : dcache_clean_inval_poc+0x24/0x48
[ 2.057210] lr : kvm_hyp_init_symbols+0x370/0x388
[ 2.061904] sp : ffff80008009bd00
[ 2.065206] x29: ffff80008009bd00 x28: 0000000000000000 x27: 0000002022116000
[ 2.072332] x26: ffff0020232967f0 x25: 00000020a2116000 x24: 00000000000038b0
[ 2.079458] x23: 0000000000000030 x22: ffffc7dc575880c8 x21: ffffc7dc57948fb0
[ 2.086584] x20: 0000000000000001 x19: 0000000001002222 x18: 00000000ffffffff
[ 2.093709] x17: 000000007a3345b6 x16: 0000000073a611dd x15: 0000000000000000
[ 2.100835] x14: 0000000000000000 x13: 0000000000000000 x12: fffffffffffff800
[ 2.107960] x11: 00000000000007ff x10: 0000000000000000 x9 : fffffffffffff800
[ 2.115086] x8 : 00000000000007ff x7 : 0000000000000000 x6 : ffffc7dc5740af58
[ 2.122211] x5 : 0000000080000000 x4 : ffffc7b87de00000 x3 : 000000000000003f
[ 2.129336] x2 : 0000000000000040 x1 : ffff0023d9eaf000 x0 : ffff0023d9ead000
[ 2.136462] Call trace:
[ 2.138896] dcache_clean_inval_poc+0x24/0x48 (P)
[ 2.143592] init_hyp_mode+0x644/0x960
[ 2.147333] kvm_arm_init+0x128/0x280
[ 2.150987] do_one_initcall+0x4c/0x458
[ 2.154813] kernel_init_freeable+0x1f4/0x2a0
[ 2.159161] kernel_init+0x2c/0x150
[ 2.162642] ret_from_fork+0x10/0x20
[ 2.166210] Code: 9ac32042 d1000443 8a230000 d503201f (d50b7e20)
[ 2.172292] ---[ end trace 0000000000000000 ]---
[ 2.176958] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 2.184608] SMP: stopping secondary CPUs
[ 2.188523] Kernel Offset: 0x47dbd5dc0000 from 0xffff800080000000
[ 2.194604] PHYS_OFFSET: 0x80000000
[ 2.198080] CPU features: 0x04000000,804b0008,00040001,0400421b
[ 2.203988] Memory Limit: none
[ 2.207031] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---
This points to the following code in kvm_hyp_init_symbols():
<quote>
/*
* Flush entire BSS since part of its data containing init symbols is read
* while the MMU is off.
*/
kvm_flush_dcache_to_poc(kvm_ksym_ref(__hyp_bss_start),
kvm_ksym_ref(__hyp_bss_end) - kvm_ksym_ref(__hyp_bss_start))
</quote>
which I suspect is related to some of the new BSS related code in
arm64/for-next/mm.
Ard, does this ring a bell?
Thanks,
M.
--
Jazz isn't dead. It just smells funny.
^ permalink raw reply
* [PATCHv2 2/3] watchdog: sama5d4: use platform_get_irq_optional()
From: Rosen Penev @ 2026-06-08 20:09 UTC (permalink / raw)
To: linux-watchdog
Cc: Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Wim Van Sebroeck, Guenter Roeck,
moderated list:ARM/Microchip (AT91) SoC support, open list
In-Reply-To: <20260608200933.18669-1-rosenp@gmail.com>
irq_of_parse_and_map() requires irq_dispose_mapping() on failure. Don't
bother with it as platform_get_irq_optional() doesn't need it.
Also handle EPROBE_DEFER.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
drivers/watchdog/sama5d4_wdt.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c
index f74f1e8956b5..2536e2f2ab32 100644
--- a/drivers/watchdog/sama5d4_wdt.c
+++ b/drivers/watchdog/sama5d4_wdt.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
#include <linux/watchdog.h>
@@ -245,7 +244,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
struct watchdog_device *wdd;
struct sama5d4_wdt *wdt;
void __iomem *regs;
- u32 irq = 0;
+ int irq = 0;
u32 reg;
int ret;
@@ -281,8 +280,11 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
return ret;
if (wdt->need_irq) {
- irq = irq_of_parse_and_map(dev->of_node, 0);
- if (!irq) {
+ irq = platform_get_irq_optional(pdev, 0);
+ if (irq == -EPROBE_DEFER)
+ return irq;
+
+ if (irq < 0) {
dev_warn(dev, "failed to get IRQ from DT\n");
wdt->need_irq = false;
}
--
2.54.0
^ permalink raw reply related
* [PATCHv2 0/3] watchdog: sama5d4: fix IRQ and timeout bugs, use platform_get_irq_optional
From: Rosen Penev @ 2026-06-08 20:09 UTC (permalink / raw)
To: linux-watchdog
Cc: Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Wim Van Sebroeck, Guenter Roeck,
moderated list:ARM/Microchip (AT91) SoC support, open list
This series fixes three issues in the sama5d4 watchdog driver:
Patch 1: Return IRQ_NONE when the status register indicates no watchdog
interrupt is pending, and pass the configured timeout (not the hardcoded
default) to sama5d4_wdt_init().
Patch 2: Replace irq_of_parse_and_map() with platform_get_irq_optional()
for simpler error handling and EPROBE_DEFER support.
Patch 3: Move platform_set_drvdata() before devm_request_irq() to prevent
a NULL pointer dereference in the interrupt handler if the shared System
IRQ fires immediately after registration.
v2: address sashiko review
Rosen Penev (3):
watchdog: sama5d4: fix shared IRQ and hardcoded timeout issues
watchdog: sama5d4: use platform_get_irq_optional()
watchdog: sama5d4: fix NULL deref in irq handler
drivers/watchdog/sama5d4_wdt.c | 32 +++++++++++++++++---------------
1 file changed, 17 insertions(+), 15 deletions(-)
--
2.54.0
^ permalink raw reply
* [PATCHv2 3/3] watchdog: sama5d4: fix NULL deref in irq handler
From: Rosen Penev @ 2026-06-08 20:09 UTC (permalink / raw)
To: linux-watchdog
Cc: Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Wim Van Sebroeck, Guenter Roeck,
moderated list:ARM/Microchip (AT91) SoC support, open list
In-Reply-To: <20260608200933.18669-1-rosenp@gmail.com>
Move platform_set_drvdata() before devm_request_irq() so that the
interrupt handler can safely dereference the driver data via
platform_get_drvdata(). An interrupt on the shared System IRQ line
(SAM9X60/SAM9X7) could fire between request_irq and the late
platform_set_drvdata() call, causing the handler to dereference NULL.
Assisted-by: opencode:big-pickle
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
drivers/watchdog/sama5d4_wdt.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c
index 2536e2f2ab32..7cd6f35c8e21 100644
--- a/drivers/watchdog/sama5d4_wdt.c
+++ b/drivers/watchdog/sama5d4_wdt.c
@@ -268,6 +268,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
: AT91_WDT_WDDIS;
watchdog_set_drvdata(wdd, wdt);
+ platform_set_drvdata(pdev, wdt);
regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(regs))
@@ -319,8 +320,6 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
if (ret)
return ret;
- platform_set_drvdata(pdev, wdt);
-
dev_info(dev, "initialized (timeout = %d sec, nowayout = %d)\n",
wdd->timeout, nowayout);
--
2.54.0
^ permalink raw reply related
* [PATCHv2 1/3] watchdog: sama5d4: fix shared IRQ and hardcoded timeout issues
From: Rosen Penev @ 2026-06-08 20:09 UTC (permalink / raw)
To: linux-watchdog
Cc: Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Wim Van Sebroeck, Guenter Roeck,
moderated list:ARM/Microchip (AT91) SoC support, open list
In-Reply-To: <20260608200933.18669-1-rosenp@gmail.com>
Fix three pre-existing issues in the sama5d4 watchdog driver:
1. Unsafe IRQF_SHARED | IRQF_NO_SUSPEND combination: The watchdog
interrupt is a dedicated peripheral line, not shared with other
devices.
2. Unconditional IRQ_HANDLED on shared line: The handler returned
IRQ_HANDLED even when the status register indicated no watchdog
interrupt was pending. Return IRQ_NONE in that case so the kernel
can properly detect spurious interrupts on the line.
3. Hardcoded 16-second timeout: sama5d4_wdt_init() unconditionally
used WDT_DEFAULT_TIMEOUT (16s) for the hardware timeout, ignoring
any timeout configured via device tree (watchdog_init_timeout) or
userspace. Pass wdd->timeout to sama5d4_wdt_init() so the
configured timeout is honored during probe and resume.
Assisted-by: opencode:big-pickle
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
drivers/watchdog/sama5d4_wdt.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c
index 704b786cc2ec..f74f1e8956b5 100644
--- a/drivers/watchdog/sama5d4_wdt.c
+++ b/drivers/watchdog/sama5d4_wdt.c
@@ -169,11 +169,12 @@ static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
else
reg = wdt_read(wdt, AT91_WDT_SR);
- if (reg) {
- pr_crit("Atmel Watchdog Software Reset\n");
- emergency_restart();
- pr_crit("Reboot didn't succeed\n");
- }
+ if (!reg)
+ return IRQ_NONE;
+
+ pr_crit("Atmel Watchdog Software Reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't succeed\n");
return IRQ_HANDLED;
}
@@ -197,11 +198,11 @@ static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
return 0;
}
-static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
+static int sama5d4_wdt_init(struct sama5d4_wdt *wdt, unsigned int timeout)
{
u32 reg, val;
- val = WDT_SEC2TICKS(WDT_DEFAULT_TIMEOUT);
+ val = WDT_SEC2TICKS(timeout);
/*
* When booting and resuming, the bootloader may have changed the
* watchdog configuration.
@@ -305,7 +306,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
set_bit(WDOG_HW_RUNNING, &wdd->status);
}
- ret = sama5d4_wdt_init(wdt);
+ ret = sama5d4_wdt_init(wdt, wdd->timeout);
if (ret)
return ret;
@@ -358,7 +359,7 @@ static int sama5d4_wdt_resume_early(struct device *dev)
* This should only be done when the registers are lost on suspend but
* there is no way to get this information right now.
*/
- sama5d4_wdt_init(wdt);
+ sama5d4_wdt_init(wdt, wdt->wdd.timeout);
if (watchdog_active(&wdt->wdd))
sama5d4_wdt_start(&wdt->wdd);
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v2] nvme-apple: Prevent shared tags across queues on Apple A11
From: Keith Busch @ 2026-06-08 19:45 UTC (permalink / raw)
To: Nick Chan
Cc: Sven Peter, Janne Grunau, Neal Gompa, Jens Axboe,
Christoph Hellwig, Sagi Grimberg, asahi, linux-arm-kernel,
linux-nvme, linux-kernel, stable
In-Reply-To: <20260607-prevent-tag-collision-t8015-v2-1-dc4ef4fb42bc@gmail.com>
On Sun, Jun 07, 2026 at 02:10:58PM +0800, Nick Chan wrote:
> On Apple A11, tags of pending commands must be unique across the admin
> and IO queues, else the firmware crashes with
> "duplicate tag error for tag N", with N being the tag.
>
> Apply the existing workaround for M1 of reserving two tags for the admin
> queue to A11.
Thanks, applied to nvme-7.2.
^ permalink raw reply
* Re: [PATCH v8 6/6] pinctrl: mediatek: Add MT6735 pinctrl driver
From: Linus Walleij @ 2026-06-08 19:41 UTC (permalink / raw)
To: Yassine Oudjana
Cc: Sean Wang, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Andy Teng,
Yassine Oudjana, linux-mediatek, linux-gpio, devicetree,
linux-kernel, linux-arm-kernel
In-Reply-To: <20260530145800.1029920-7-y.oudjana@protonmail.com>
Hi Yassine,
thanks for your patch!
On Sat, May 30, 2026 at 4:58 PM Yassine Oudjana
<yassine.oudjana@gmail.com> wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
>
> Add a driver for the MediaTek MT6735 SoC pin controller. This driver
> also supports the pin controller on MT6735M, which lacks 6 physical
> pins (198-203) used for MSDC2 on MT6735.
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Sashiko has good comments on this driver, look into them!
> +config PINCTRL_MT6735
> + bool "MediaTek MT6735(M) pin control"
> + depends on OF
> + default ARM64 && ARCH_MEDIATEK
> + select PINCTRL_MTK_PARIS
There are in-flight patches to make MTK drivers tristate for
the Android GKI. Do you want to use tristate for this driver too?
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 0/2] pinctrl: mediatek: Enable MT8189 as loadable module
From: Linus Walleij @ 2026-06-08 19:29 UTC (permalink / raw)
To: Justin Yeh
Cc: Sean Wang, Matthias Brugger, AngeloGioacchino Del Regno,
Project_Global_Chrome_Upstream_Group, linux-mediatek, linux-gpio,
linux-kernel, linux-arm-kernel
In-Reply-To: <20260529100308.51271-1-justin.yeh@mediatek.com>
On Fri, May 29, 2026 at 12:04 PM Justin Yeh <justin.yeh@mediatek.com> wrote:
> This series enables PINCTRL_MT8189 to be built as a loadable kernel
> module, which is required for GKI (Generic Kernel Image) + vendor_dlkm
> deployments where vendor-specific drivers must be kept separate from
> the GKI vmlinux.
Maybe tell us that this is for Android?
> Patch 1 restores the tristate option that was recently changed to bool,
No the driver was merged with tristate.
See
commit a3fe1324c3c5c292ec79bd756497c1c44ff247d2 (tag: pinctrl-v6.17-1)
"pinctrl: mediatek: Add pinctrl driver for mt8189"
> preventing module builds. Patch 2 adds the missing MODULE_LICENSE macro
> that's required when building as a module.
So that should be squashed into one patch or it will not bisect.
> Together these changes allow MT8189 pinctrl to be properly packaged as
> a vendor kernel module while maintaining the existing built-in option.
So why do we change this only for MT8189 and not for all
Mediatek pinctrl drivers?
I would just add this tristate option and license to all of them while
you're at it or I will get like 20 identical patches and it's a waste
of time for me.
Yours,
Linus Walleij
^ permalink raw reply
* -next boot failures during KVM setup
From: Mark Brown @ 2026-06-08 19:19 UTC (permalink / raw)
To: Marc Zyngier, Oliver Upton; +Cc: Aishwarya.TCV, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 1413 bytes --]
I'm seeing boot failures on a range of physical arm64 platforms in
today's -next. Turning on earlycon it looks like we're getting bad
pointer dereferences during KVM initialisation:
[ 0.728923] kvm [1]: nv: 570 coarse grained trap handlers
[ 0.735138] kvm [1]: nv: 710 fine grained trap handlers
[ 0.741326] kvm [1]: IPA Size Limit: 40 bits
[ 0.748840] Unable to handle kernel paging request at virtual address ffff00000478e000
[ 0.757027] Mem abort info:
[ 0.759917] ESR = 0x0000000096000147
[ 0.763772] EC = 0x25: DABT (current EL), IL = 32 bits
[ 0.851526] pc : dcache_clean_inval_poc+0x24/0x48
[ 0.856367] lr : kvm_arm_init+0xbb0/0x13f0
...
[ 0.937120] Call trace:
[ 0.939628] dcache_clean_inval_poc+0x24/0x48 (P)
[ 0.944457] do_one_initcall+0x60/0x1d4
[ 0.948393] kernel_init_freeable+0x250/0x2d8
https://lava.sirena.org.uk/scheduler/job/2849583#L848
(with other platforms I've got earlycon logs showing basically the same
thing). I have some bisects but they seem to have been confused by
earlier driver core issues, I've tweaked to try to avoid that and am
retrying. FVP and qemu seem unaffected:
https://lava.sirena.org.uk/scheduler/job/2848374#L888
https://lava.sirena.org.uk/scheduler/job/2848966#L447
The affected platforms thus far are all SMP Cortex A53/5 systems, but
that's the vast majority of my lab. They have both GICv3 and GICv2.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply
* Re: [PATCH] i2c: stm32f7: fix timing computation ignoring i2c-analog-filter
From: Andi Shyti @ 2026-06-08 18:27 UTC (permalink / raw)
To: Guillermo Rodríguez
Cc: Pierre-Yves MORDRET, Alain Volmat, Maxime Coquelin,
Alexandre Torgue, Wolfram Sang, linux-i2c, linux-stm32,
linux-arm-kernel, linux-kernel
In-Reply-To: <20260526091210.20383-1-guille.rodriguez@gmail.com>
Hi Guillermo,
On Tue, May 26, 2026 at 11:12:09AM +0200, Guillermo Rodríguez wrote:
> stm32f7_i2c_compute_timing() uses i2c_dev->analog_filter to pick
> the analog filter delay, but i2c_dev->analog_filter is parsed from
> the "i2c-analog-filter" DT property only after the compute_timing
> loop in stm32f7_i2c_setup_timing(), so in practice the timing
> calculations always ignore the analog filter. On an STM32MP1 board
> with clock-frequency = <400000> and i2c-analog-filter set, measured
> SCL frequency was ~382 kHz.
>
> This also affects (widens) the computed SDADEL range. At high bus
> clock speeds, this can select an SDADEL value that violates tVD;DAT
> (data valid time).
>
> Fix by parsing "i2c-analog-filter" before the compute_timing loop.
>
> Fixes: 83c3408f7b9c ("i2c: stm32f7: support DT binding i2c-analog-filter")
> Cc: stable@vger.kernel.org
> Signed-off-by: Guillermo Rodríguez <guille.rodriguez@gmail.com>
merged to i2c/i2c-host-fixes.
Thanks,
Andi
^ permalink raw reply
* [PATCH v1] clocksource/drivers/timer-atmel-pit: Fix init failure cleanup
From: Yuho Choi @ 2026-06-08 18:20 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Nicolas Ferre, Alexandre Belloni,
Claudiu Beznea
Cc: Boris Brezillon, linux-arm-kernel, linux-kernel, Yuho Choi
After clk_prepare_enable(data->mck) succeeds, at91sam926x_pit_dt_init()
can still fail while parsing the IRQ, registering the clocksource, or
requesting the IRQ. These paths only free the driver data, leaving the
master clock enabled.
Unwind each initialized state on failure. Stop the PIT after it has been
started, dispose the IRQ mapping after it has been created, disable and
put the master clock, and unmap the registers before freeing the driver
data.
Fixes: 699e36e5b8e9 ("clocksource/drivers/timer-atmel-pit: Enable mck clock")
Signed-off-by: Yuho Choi <dbgh9129@gmail.com>
---
drivers/clocksource/timer-atmel-pit.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c
index 888b06731e54..edd427ab93e6 100644
--- a/drivers/clocksource/timer-atmel-pit.c
+++ b/drivers/clocksource/timer-atmel-pit.c
@@ -12,7 +12,9 @@
#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -185,13 +187,13 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
if (IS_ERR(data->mck)) {
pr_err("Unable to get mck clk\n");
ret = PTR_ERR(data->mck);
- goto exit;
+ goto exit_iounmap;
}
ret = clk_prepare_enable(data->mck);
if (ret) {
pr_err("Unable to enable mck\n");
- goto exit;
+ goto exit_clk_put;
}
/* Get the interrupts property */
@@ -199,7 +201,7 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
if (!data->irq) {
pr_err("Unable to get IRQ from DT\n");
ret = -EINVAL;
- goto exit;
+ goto exit_clk_disable;
}
/*
@@ -227,7 +229,7 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
ret = clocksource_register_hz(&data->clksrc, pit_rate);
if (ret) {
pr_err("Failed to register clocksource\n");
- goto exit;
+ goto exit_pit_disable;
}
/* Set up irq handler */
@@ -237,7 +239,7 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
if (ret) {
pr_err("Unable to setup IRQ\n");
clocksource_unregister(&data->clksrc);
- goto exit;
+ goto exit_pit_disable;
}
/* Set up and register clockevents */
@@ -256,6 +258,15 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
return 0;
+exit_pit_disable:
+ pit_write(data->base, AT91_PIT_MR, 0);
+ irq_dispose_mapping(data->irq);
+exit_clk_disable:
+ clk_disable_unprepare(data->mck);
+exit_clk_put:
+ clk_put(data->mck);
+exit_iounmap:
+ iounmap(data->base);
exit:
kfree(data);
return ret;
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v4 2/4] perf: Use a union to clear branch entry bitfields
From: James Clark @ 2026-06-08 18:06 UTC (permalink / raw)
To: Puranjay Mohan, bpf
Cc: Puranjay Mohan, Alexei Starovoitov, Daniel Borkmann,
John Fastabend, Andrii Nakryiko, Martin KaFai Lau,
Eduard Zingerman, Song Liu, Yonghong Song, Will Deacon,
Mark Rutland, Catalin Marinas, Leo Yan, Rob Herring,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Ian Rogers, Adrian Hunter, Shuah Khan, Breno Leitao,
Ravi Bangoria, Stephane Eranian, Kumar Kartikeya Dwivedi,
Usama Arif, linux-arm-kernel, linux-perf-users, linux-kselftest,
linux-kernel, kernel-team
In-Reply-To: <20260527121207.2312181-3-puranjay@kernel.org>
On 27/05/2026 1:11 pm, Puranjay Mohan wrote:
> perf_clear_branch_entry_bitfields() zeroes individual bitfields of struct
> perf_branch_entry but has repeatedly fallen out of sync when new fields
> were added (new_type and priv were missed).
>
> Wrap the bitfields in an anonymous struct inside a union with a u64
> bitfields member, and clear them all with a single assignment. This
> avoids having to update the clearing function every time a new bitfield
> is added.
>
> Fixes: bfe4daf850f4 ("perf/core: Add perf_clear_branch_entry_bitfields() helper")
> Signed-off-by: Puranjay Mohan <puranjay@kernel.org>
> ---
> include/linux/perf_event.h | 9 +--------
> include/uapi/linux/perf_event.h | 25 +++++++++++++++----------
> tools/include/uapi/linux/perf_event.h | 25 +++++++++++++++----------
> 3 files changed, 31 insertions(+), 28 deletions(-)
>
> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> index 48d851fbd8ea..f7360c43f902 100644
> --- a/include/linux/perf_event.h
> +++ b/include/linux/perf_event.h
> @@ -1474,14 +1474,7 @@ static inline u32 perf_sample_data_size(struct perf_sample_data *data,
> */
> static inline void perf_clear_branch_entry_bitfields(struct perf_branch_entry *br)
> {
> - br->mispred = 0;
> - br->predicted = 0;
> - br->in_tx = 0;
> - br->abort = 0;
> - br->cycles = 0;
> - br->type = 0;
> - br->spec = PERF_BR_SPEC_NA;
> - br->reserved = 0;
> + br->bitfields = 0;
The comment above here says:
* The to and from fields are not cleared because they are
* systematically modified by caller.
But this is an inline function and the to/from fields are always
assigned right after calling it. Surely the compiler can work that out
and this was a premature optimization.
If we rename it to perf_clear_branch_entry() and do:
*br = (struct perf_branch_entry) {0};
Then we can delete a big comment, remove a potential source of bugs if
even more members are added, not have to update the uapi headers and
simplify it instead of working around the original issue.
> }
>
> extern void perf_output_sample(struct perf_output_handle *handle,
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index fd10aa8d697f..c2e7b1b1c4fa 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -1491,16 +1491,21 @@ union perf_mem_data_src {
> struct perf_branch_entry {
> __u64 from;
> __u64 to;
> - __u64 mispred : 1, /* target mispredicted */
> - predicted : 1, /* target predicted */
> - in_tx : 1, /* in transaction */
> - abort : 1, /* transaction abort */
> - cycles : 16, /* cycle count to last branch */
> - type : 4, /* branch type */
> - spec : 2, /* branch speculation info */
> - new_type : 4, /* additional branch type */
> - priv : 3, /* privilege level */
> - reserved : 31;
> + union {
> + struct {
> + __u64 mispred : 1, /* target mispredicted */
> + predicted : 1, /* target predicted */
> + in_tx : 1, /* in transaction */
> + abort : 1, /* transaction abort */
> + cycles : 16, /* cycle count to last branch */
> + type : 4, /* branch type */
> + spec : 2, /* branch speculation info */
> + new_type : 4, /* additional branch type */
> + priv : 3, /* privilege level */
> + reserved : 31;
> + };
> + __u64 bitfields;
> + };
> };
>
> /* Size of used info bits in struct perf_branch_entry */
> diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h
> index fd10aa8d697f..c2e7b1b1c4fa 100644
> --- a/tools/include/uapi/linux/perf_event.h
> +++ b/tools/include/uapi/linux/perf_event.h
> @@ -1491,16 +1491,21 @@ union perf_mem_data_src {
> struct perf_branch_entry {
> __u64 from;
> __u64 to;
> - __u64 mispred : 1, /* target mispredicted */
> - predicted : 1, /* target predicted */
> - in_tx : 1, /* in transaction */
> - abort : 1, /* transaction abort */
> - cycles : 16, /* cycle count to last branch */
> - type : 4, /* branch type */
> - spec : 2, /* branch speculation info */
> - new_type : 4, /* additional branch type */
> - priv : 3, /* privilege level */
> - reserved : 31;
> + union {
> + struct {
> + __u64 mispred : 1, /* target mispredicted */
> + predicted : 1, /* target predicted */
> + in_tx : 1, /* in transaction */
> + abort : 1, /* transaction abort */
> + cycles : 16, /* cycle count to last branch */
> + type : 4, /* branch type */
> + spec : 2, /* branch speculation info */
> + new_type : 4, /* additional branch type */
> + priv : 3, /* privilege level */
> + reserved : 31;
> + };
> + __u64 bitfields;
> + };
> };
>
> /* Size of used info bits in struct perf_branch_entry */
^ permalink raw reply
* Re: [PATCH v2 0/2] soc: aspeed: Add BMC and host driver for PCIe BMC device
From: Andrew Lunn @ 2026-06-08 18:05 UTC (permalink / raw)
To: Grégoire Layet
Cc: joel, andrew, jacky_chou, yh_chung, ninad, linux-aspeed,
linux-arm-kernel, linux-kernel
In-Reply-To: <cover.1780929570.git.gregoire.layet@9elements.com>
On Mon, Jun 08, 2026 at 02:51:21PM +0000, Grégoire Layet wrote:
> This is a v2 for upstreaming the VUART over PCIe BMC device driver from the ASPEED kernel SDK (branch master-v6.18) [1].
> There are two drivers: a BMC-side driver and a host-side driver.
> Together they enable host<->BMC VUART communication via PCIe.
I would like to see somewhere a comment about security. From the
replies i got the host can access anything on the LPC bus of the
aspeed. What are the implications of that? What are typically on such
a bus? TPMs are often there, but does a BMC have a TPM?
Andrew
^ permalink raw reply
* [PATCH net-next v3] net: airoha: defer GDM3/GDM4 WAN mode and GDM2 loopback to QoS offload
From: Lorenzo Bianconi @ 2026-06-08 18:03 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Lorenzo Bianconi
Cc: linux-arm-kernel, linux-mediatek, netdev, Madhur Agrawal
GDM3 and GDM4 ports require GDM2 loopback to be enabled for hardware
QoS offload to function. Without it, HTB and ETS offload on these ports
do not work.
Previously, GDM3/GDM4 ports were automatically configured as WAN with
GDM2 loopback enabled during ndo_init(). Move this setup to be performed
on demand when QoS offload is created or destroyed. GDM3 and GDM4 now
default to LAN mode at init time, while GDM2 is always WAN.
Hook airoha_enable_qos_for_gdm34() into TC_HTB_CREATE so that requesting
HTB offload on a GDM3/GDM4 LAN port switches it to WAN mode and enables
GDM2 loopback, with proper rollback on failure. Hook the counterpart
airoha_disable_qos_for_gdm34() into TC_HTB_DESTROY to restore LAN mode
when the offloaded qdisc is torn down.
Add airoha_disable_gdm2_loopback() as the teardown counterpart of the
existing airoha_enable_gdm2_loopback().
Move QDMA TX/RX DMA enable from airoha_dev_open() to airoha_probe() and
the corresponding disable from airoha_dev_stop() to airoha_qdma_cleanup(),
removing the per-QDMA atomic refcount that was needed for the open/close
path. DMA is now always active from probe to remove.
Tested-by: Madhur Agrawal <madhur.agrawal@airoha.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
Changes in v3:
- Do not introduce ethtool private flags support to configure LAN/WAN
for GDM3/4 and rely on tc qdisc offload for it instead.
- Set GDM3/4 ports as LAN by default.
- Move QDMA TX/RX DMA enable from airoha_dev_open() to airoha_probe()
and the corresponding disable from airoha_dev_stop() to airoha_qdma_cleanup().
- Link to v2: https://lore.kernel.org/r/20260607-airoha-ethtool-priv_flags-v2-1-742c7aa1e182@kernel.org
Changes in v2:
- Rework airoha_dev_set_wan_flag routine
- Enable GDM_STRIP_CRC_MASK in airoha_disable_gdm2_loopback()
- Do not always reset REG_SRC_PORT_FC_MAP6 in
airoha_disable_gdm2_loopback() but use the same condition used in
airoha_enable_gdm2_loopback().
- Link to v1: https://lore.kernel.org/r/20260606-airoha-ethtool-priv_flags-v1-1-401b2c9fe9f1@kernel.org
---
drivers/net/ethernet/airoha/airoha_eth.c | 177 ++++++++++++++++++++++--------
drivers/net/ethernet/airoha/airoha_eth.h | 2 -
drivers/net/ethernet/airoha/airoha_regs.h | 1 +
3 files changed, 131 insertions(+), 49 deletions(-)
diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index 5a8e84fa9918..9bfb1e5b2b54 100644
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -1516,6 +1516,10 @@ static void airoha_qdma_cleanup(struct airoha_qdma *qdma)
{
int i;
+ airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,
+ GLOBAL_CFG_TX_DMA_EN_MASK |
+ GLOBAL_CFG_RX_DMA_EN_MASK);
+
for (i = 0; i < ARRAY_SIZE(qdma->q_rx); i++) {
if (!qdma->q_rx[i].ndesc)
continue;
@@ -1806,11 +1810,6 @@ static int airoha_dev_open(struct net_device *netdev)
}
port->users++;
- airoha_qdma_set(qdma, REG_QDMA_GLOBAL_CFG,
- GLOBAL_CFG_TX_DMA_EN_MASK |
- GLOBAL_CFG_RX_DMA_EN_MASK);
- atomic_inc(&qdma->users);
-
if (!airoha_is_lan_gdm_dev(dev) &&
airoha_ppe_is_enabled(qdma->eth, 1))
pse_port = FE_PSE_PORT_PPE2;
@@ -1863,19 +1862,6 @@ static int airoha_dev_stop(struct net_device *netdev)
REG_GDM_FWD_CFG(port->id),
FE_PSE_PORT_DROP);
- if (atomic_dec_and_test(&qdma->users)) {
- airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,
- GLOBAL_CFG_TX_DMA_EN_MASK |
- GLOBAL_CFG_RX_DMA_EN_MASK);
-
- for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++) {
- if (!qdma->q_tx[i].ndesc)
- continue;
-
- airoha_qdma_cleanup_tx_queue(&qdma->q_tx[i]);
- }
- }
-
return 0;
}
@@ -1960,6 +1946,49 @@ static int airoha_enable_gdm2_loopback(struct airoha_gdm_dev *dev)
return 0;
}
+static int airoha_disable_gdm2_loopback(struct airoha_gdm_dev *dev)
+{
+ struct airoha_gdm_port *port = dev->port;
+ struct airoha_eth *eth = dev->eth;
+ int i, src_port;
+ u32 pse_port;
+
+ src_port = eth->soc->ops.get_sport(dev->port, dev->nbq);
+ if (src_port < 0)
+ return src_port;
+
+ airoha_fe_clear(eth,
+ REG_SP_DFT_CPORT(src_port >> fls(SP_CPORT_DFT_MASK)),
+ SP_CPORT_MASK(src_port & SP_CPORT_DFT_MASK));
+
+ airoha_fe_set(eth, REG_GDM_FWD_CFG(AIROHA_GDM2_IDX),
+ GDM_STRIP_CRC_MASK);
+ airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(AIROHA_GDM2_IDX),
+ FE_PSE_PORT_DROP);
+ airoha_fe_clear(eth, REG_GDM_LPBK_CFG(AIROHA_GDM2_IDX),
+ LPBK_CHAN_MASK | LPBK_MODE_MASK | LPBK_EN_MASK);
+ pse_port = airoha_ppe_is_enabled(eth, 1) ? FE_PSE_PORT_PPE2
+ : FE_PSE_PORT_PPE1;
+ airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(AIROHA_GDM2_IDX),
+ pse_port);
+
+ airoha_fe_rmw(eth, REG_FE_WAN_PORT, WAN0_MASK,
+ FIELD_PREP(WAN0_MASK, AIROHA_GDM2_IDX));
+
+ for (i = 0; i < eth->soc->num_ppe; i++)
+ airoha_fe_clear(eth, REG_PPE_DFT_CPORT(i, AIROHA_GDM2_IDX),
+ DFT_CPORT_MASK(AIROHA_GDM2_IDX));
+
+ /* Enable VIP and IFC for GDM2 */
+ airoha_fe_set(eth, REG_FE_VIP_PORT_EN, BIT(AIROHA_GDM2_IDX));
+ airoha_fe_set(eth, REG_FE_IFC_PORT_EN, BIT(AIROHA_GDM2_IDX));
+
+ if (port->id == AIROHA_GDM4_IDX && airoha_is_7581(eth))
+ airoha_fe_wr(eth, REG_SRC_PORT_FC_MAP6, FC_MAP6_DEF_VALUE);
+
+ return 0;
+}
+
static struct airoha_gdm_dev *
airoha_get_wan_gdm_dev(struct airoha_eth *eth)
{
@@ -2002,40 +2031,14 @@ static int airoha_dev_init(struct net_device *netdev)
struct airoha_gdm_dev *dev = netdev_priv(netdev);
struct airoha_gdm_port *port = dev->port;
- switch (port->id) {
- case AIROHA_GDM3_IDX:
- case AIROHA_GDM4_IDX: {
- struct airoha_eth *eth = dev->eth;
-
- /* GDM2 supports a single net_device */
- if (eth->ports[1] && eth->ports[1]->devs[0])
- break;
-
- if (airoha_get_wan_gdm_dev(eth))
- break;
-
- fallthrough;
- }
- case AIROHA_GDM2_IDX:
- /* GDM2 is always used as wan */
+ if (port->id == AIROHA_GDM2_IDX) {
+ /* GDM2 is always used as WAN */
dev->flags |= AIROHA_PRIV_F_WAN;
- break;
- default:
- break;
}
airoha_dev_set_qdma(dev);
airoha_set_macaddr(dev, netdev->dev_addr);
- if (!airoha_is_lan_gdm_dev(dev) &&
- (port->id == AIROHA_GDM3_IDX || port->id == AIROHA_GDM4_IDX)) {
- int err;
-
- err = airoha_enable_gdm2_loopback(dev);
- if (err)
- return err;
- }
-
return 0;
}
@@ -3008,6 +3011,79 @@ static int airoha_tc_htb_delete_leaf_queue(struct net_device *netdev,
return 0;
}
+static int airoha_enable_qos_for_gdm34(struct net_device *netdev)
+{
+ struct airoha_gdm_dev *dev = netdev_priv(netdev);
+ struct airoha_gdm_port *port = dev->port;
+ u32 pse_port;
+ int err;
+
+ if (port->id != AIROHA_GDM3_IDX &&
+ port->id != AIROHA_GDM4_IDX) {
+ /* HW QoS is always supported by GDM1 and GDM2 */
+ return 0;
+ }
+
+ if (!airoha_is_lan_gdm_dev(dev)) /* Already enabled */
+ return 0;
+
+ /* Verify the WAN device is not already configured */
+ if (airoha_get_wan_gdm_dev(dev->eth))
+ return -EBUSY;
+
+ dev->flags |= AIROHA_PRIV_F_WAN;
+ airoha_dev_set_qdma(dev);
+ err = airoha_enable_gdm2_loopback(dev);
+ if (err)
+ goto error_disable_wan;
+
+ err = airoha_set_macaddr(dev, netdev->dev_addr);
+ if (err)
+ goto error_disable_loopback;
+
+ pse_port = airoha_ppe_is_enabled(dev->eth, 1) ? FE_PSE_PORT_PPE2
+ : FE_PSE_PORT_PPE1;
+ airoha_set_gdm_port_fwd_cfg(dev->eth, REG_GDM_FWD_CFG(port->id),
+ pse_port);
+
+ return 0;
+
+error_disable_loopback:
+ /* Restore previous LAN configuration */
+ airoha_disable_gdm2_loopback(dev);
+error_disable_wan:
+ dev->flags &= ~AIROHA_PRIV_F_WAN;
+ airoha_dev_set_qdma(dev);
+
+ return err;
+}
+
+static void airoha_disable_qos_for_gdm34(struct net_device *netdev)
+{
+ struct airoha_gdm_dev *dev = netdev_priv(netdev);
+ struct airoha_gdm_port *port = dev->port;
+ int err;
+
+ if (port->id != AIROHA_GDM3_IDX &&
+ port->id != AIROHA_GDM4_IDX) {
+ return;
+ }
+
+ if (airoha_is_lan_gdm_dev(dev)) /* Already disabled */
+ return;
+
+ err = airoha_disable_gdm2_loopback(dev);
+ if (err)
+ netdev_warn(netdev,
+ "failed disabling GDM2 loopback: %d\n", err);
+
+ dev->flags &= ~AIROHA_PRIV_F_WAN;
+ airoha_dev_set_qdma(dev);
+ airoha_set_macaddr(dev, netdev->dev_addr);
+ airoha_set_gdm_port_fwd_cfg(dev->eth, REG_GDM_FWD_CFG(port->id),
+ FE_PSE_PORT_PPE1);
+}
+
static int airoha_tc_htb_destroy(struct net_device *netdev)
{
struct airoha_gdm_dev *dev = netdev_priv(netdev);
@@ -3016,6 +3092,8 @@ static int airoha_tc_htb_destroy(struct net_device *netdev)
for_each_set_bit(q, dev->qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)
airoha_tc_remove_htb_queue(netdev, q);
+ airoha_disable_qos_for_gdm34(netdev);
+
return 0;
}
@@ -3040,7 +3118,7 @@ static int airoha_tc_setup_qdisc_htb(struct net_device *dev,
{
switch (opt->command) {
case TC_HTB_CREATE:
- break;
+ return airoha_enable_qos_for_gdm34(dev);
case TC_HTB_DESTROY:
return airoha_tc_htb_destroy(dev);
case TC_HTB_NODE_MODIFY:
@@ -3414,6 +3492,11 @@ static int airoha_probe(struct platform_device *pdev)
if (err)
goto error_napi_stop;
+ for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ airoha_qdma_set(ð->qdma[i], REG_QDMA_GLOBAL_CFG,
+ GLOBAL_CFG_TX_DMA_EN_MASK |
+ GLOBAL_CFG_RX_DMA_EN_MASK);
+
return 0;
error_napi_stop:
diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h
index 8f42973f9cf5..cd0706a0c07f 100644
--- a/drivers/net/ethernet/airoha/airoha_eth.h
+++ b/drivers/net/ethernet/airoha/airoha_eth.h
@@ -526,8 +526,6 @@ struct airoha_qdma {
struct airoha_eth *eth;
void __iomem *regs;
- atomic_t users;
-
struct airoha_irq_bank irq_banks[AIROHA_MAX_NUM_IRQ_BANKS];
struct airoha_tx_irq_queue q_tx_irq[AIROHA_NUM_TX_IRQ];
diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h
index 436f3c8779c1..4e17dfbcf2b8 100644
--- a/drivers/net/ethernet/airoha/airoha_regs.h
+++ b/drivers/net/ethernet/airoha/airoha_regs.h
@@ -376,6 +376,7 @@
#define REG_SRC_PORT_FC_MAP6 0x2298
#define FC_ID_OF_SRC_PORT_MASK(_n) GENMASK(4 + ((_n) << 3), ((_n) << 3))
+#define FC_MAP6_DEF_VALUE 0x1b1a1918
#define REG_CDM5_RX_OQ1_DROP_CNT 0x29d4
---
base-commit: 903db046d5579bef0ea699eae4b279dd6455fc9f
change-id: 20260606-airoha-ethtool-priv_flags-b6aa70caa780
Best regards,
--
Lorenzo Bianconi <lorenzo@kernel.org>
^ permalink raw reply related
* Re: [PATCH] i2c: imx: fix clock and pinctrl state inconsistency in runtime PM
From: Andi Shyti @ 2026-06-08 17:46 UTC (permalink / raw)
To: Carlos Song (OSS)
Cc: o.rempel, kernel, Frank.Li, s.hauer, festevam, carlos.song,
linux-i2c, imx, linux-arm-kernel, linux-kernel, stable
In-Reply-To: <20260520104939.2897110-1-carlos.song@oss.nxp.com>
Hi Carlos,
On Wed, May 20, 2026 at 06:49:39PM +0800, Carlos Song (OSS) wrote:
> From: Carlos Song <carlos.song@nxp.com>
>
> In i2c_imx_runtime_suspend(), the clock is disabled before switching
> the pinctrl state to sleep. If pinctrl_pm_select_sleep_state() fails,
> the runtime suspend is aborted but the clock remains disabled, causing
> a system crash when the hardware is subsequently accessed.
>
> Fix this by switching the pinctrl state before disabling the clock so
> that a pinctrl failure leaves the clock enabled and the hardware
> accessible.
>
> In i2c_imx_runtime_resume(), restore the pinctrl state back to sleep
> if clk_enable() fails to keep the two consistent.
>
> Fixes: 576eba03c994 ("i2c: imx: switch different pinctrl state in different system power status")
> Cc: stable@vger.kernel.org
> Signed-off-by: Carlos Song <carlos.song@nxp.com>
merged to i2c/i2c-host-fixes.
Thanks,
Andi
^ permalink raw reply
* Re: [PATCH 3/3] dt-bindings: perf: marvell: Extend CN10K TAD PMU binding for CN20K
From: Conor Dooley @ 2026-06-08 17:34 UTC (permalink / raw)
To: Geetha sowjanya
Cc: linux-perf-users, linux-kernel, linux-arm-kernel, devicetree,
mark.rutland, will, krzk+dt
In-Reply-To: <20260607125101.17778-4-gakula@marvell.com>
[-- Attachment #1: Type: text/plain, Size: 2479 bytes --]
On Sun, Jun 07, 2026 at 06:21:01PM +0530, Geetha sowjanya wrote:
> Allow marvell,cn20k-tad-pmu alongside marvell,cn10k-tad-pmu, document
> CN20K in the title and description, add a maintainer, and include a
> CN20K example node with the same required properties as CN10K.
This is great and all, but is evident from the diff (other than the fact
it talks about an example that does not exist).
What is missing is an explanation of why a fallback comaptible is not
usable.
pw-bot: changes-requested
Thanks,
Conor.
>
> Signed-off-by: Geetha sowjanya <gakula@marvell.com>
> ---
> .../bindings/perf/marvell-cn10k-tad.yaml | 20 +++++++++++--------
> 1 file changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-tad.yaml b/Documentation/devicetree/bindings/perf/marvell-cn10k-tad.yaml
> index 362142252667..1612052b59ae 100644
> --- a/Documentation/devicetree/bindings/perf/marvell-cn10k-tad.yaml
> +++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-tad.yaml
> @@ -4,23 +4,27 @@
> $id: http://devicetree.org/schemas/perf/marvell-cn10k-tad.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: Marvell CN10K LLC-TAD performance monitor
> +title: Marvell CN10K / CN20K LLC-TAD performance monitor
>
> maintainers:
> - Bhaskara Budiredla <bbudiredla@marvell.com>
> + - Geetha sowjanya <gakula@marvell.com>
>
> description: |
> - The Tag-and-Data units (TADs) maintain coherence and contain CN10K
> - shared on-chip last level cache (LLC). The tad pmu measures the
> - performance of last-level cache. Each tad pmu supports up to eight
> - counters.
> + The Tag-and-Data units (TADs) maintain coherence and contain the
> + shared on-chip last level cache (LLC) on Marvell CN10K and CN20K SoCs.
> + The TAD PMU measures last-level cache performance. Each TAD PMU
> + supports up to eight counters.
>
> - The DT setup comprises of number of tad blocks, the sizes of pmu
> - regions, tad blocks and overall base address of the HW.
> + The DT setup describes the number of TAD blocks, the sizes of PMU
> + regions and TAD pages, and the overall MMIO base of the hardware.
>
> properties:
> compatible:
> - const: marvell,cn10k-tad-pmu
> + items:
> + - enum:
> + - marvell,cn10k-tad-pmu
> + - marvell,cn20k-tad-pmu
>
> reg:
> maxItems: 1
> --
> 2.25.1
>
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v2 6/6] irqchip/gic-v5: Enable GICv5 IWB ACPI probe ordering detection
From: Rafael J. Wysocki @ 2026-06-08 17:18 UTC (permalink / raw)
To: Lorenzo Pieralisi
Cc: Rafael J. Wysocki, Len Brown, Sunil V L, Marc Zyngier,
Thomas Gleixner, Huacai Chen, Anup Patel, Hanjun Guo,
Sudeep Holla, Catalin Marinas, Will Deacon, linux-riscv,
linux-kernel, linux-acpi, linux-arm-kernel, loongarch
In-Reply-To: <20260603-gic-v5-acpi-iwb-probe-deferral-v2-6-23ffa16b6ebb@kernel.org>
On Wed, Jun 3, 2026 at 10:21 AM Lorenzo Pieralisi <lpieralisi@kernel.org> wrote:
>
> Register an ACPI hook in the ACPI interrupt management code for GICv5 to
> retrieve the ACPI interrupt controller handle (if any) of the controller
> handling a specific GSI, by updating the acpi_set_irq_model() call with
> the gic_v5_get_gsi_handle() function pointer parameter.
>
> gicv5_get_gsi_handle() allows ACPI core to detect the ACPI handle
> of the controller that manages a specific GSI interrupt.
>
> Update the IWB driver to clear device dependencies in ACPI core once the
> IWB driver has probed.
>
> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Marc Zyngier <maz@kernel.org>
> ---
> drivers/irqchip/irq-gic-v5-iwb.c | 5 +++++
> drivers/irqchip/irq-gic-v5.c | 13 +++++++++++--
> 2 files changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v5-iwb.c b/drivers/irqchip/irq-gic-v5-iwb.c
> index 9103feb70ce8..a02cb9537b15 100644
> --- a/drivers/irqchip/irq-gic-v5-iwb.c
> +++ b/drivers/irqchip/irq-gic-v5-iwb.c
> @@ -269,6 +269,11 @@ static int gicv5_iwb_device_probe(struct platform_device *pdev)
> if (IS_ERR(iwb_node))
> return PTR_ERR(iwb_node);
>
> +#ifdef CONFIG_ACPI
> + if (has_acpi_companion(&pdev->dev))
> + acpi_dev_clear_dependencies(ACPI_COMPANION(&pdev->dev));
> +#endif
I would rather add a wrapper for this, along with an empty stub for
the !CONFIG_ACPI case.
> +
> return 0;
> }
>
> diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c
> index 03cc2830b260..26cfaea1af41 100644
> --- a/drivers/irqchip/irq-gic-v5.c
> +++ b/drivers/irqchip/irq-gic-v5.c
> @@ -1217,11 +1217,19 @@ static struct fwnode_handle *gsi_domain_handle;
> static struct fwnode_handle *gic_v5_get_gsi_domain_id(u32 gsi)
> {
> if (FIELD_GET(GICV5_GSI_IC_TYPE, gsi) == GICV5_GSI_IWB_TYPE)
> - return iort_iwb_handle(FIELD_GET(GICV5_GSI_IWB_FRAME_ID, gsi));
> + return iort_iwb_handle_fwnode(FIELD_GET(GICV5_GSI_IWB_FRAME_ID, gsi));
Why is this change needed?
>
> return gsi_domain_handle;
> }
>
> +static acpi_handle gic_v5_get_gsi_handle(u32 gsi)
> +{
> + if (FIELD_GET(GICV5_GSI_IC_TYPE, gsi) == GICV5_GSI_IWB_TYPE)
> + return iort_iwb_handle(FIELD_GET(GICV5_GSI_IWB_FRAME_ID, gsi));
> +
> + return NULL;
> +}
> +
> static int __init gic_acpi_init(union acpi_subtable_headers *header, const unsigned long end)
> {
> struct acpi_madt_gicv5_irs *irs = (struct acpi_madt_gicv5_irs *)header;
> @@ -1242,7 +1250,8 @@ static int __init gic_acpi_init(union acpi_subtable_headers *header, const unsig
> if (ret)
> goto out_irs;
>
> - acpi_set_irq_model(ACPI_IRQ_MODEL_GIC_V5, gic_v5_get_gsi_domain_id, NULL);
> + acpi_set_irq_model(ACPI_IRQ_MODEL_GIC_V5, gic_v5_get_gsi_domain_id,
> + gic_v5_get_gsi_handle);
>
> return 0;
>
>
> --
^ permalink raw reply
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