* Re: [PATCH] dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
From: Lee Jones @ 2023-01-25 15:08 UTC (permalink / raw)
To: Rob Herring
Cc: Krzysztof Kozlowski, David Airlie, Daniel Vetter,
Bartosz Golaszewski, Jean Delvare, Guenter Roeck, Thomas Gleixner,
Marc Zyngier, Jassi Brar, Mauro Carvalho Chehab, Ulf Hansson,
Richard Weinberger, Vignesh Raghavendra, Sebastian Reichel,
Mark Brown, Rafael J. Wysocki, Daniel Lezcano, Greg Kroah-Hartman,
linux-arm-kernel, dri-devel, linux-gpio, linux-hwmon, linux-media,
openbmc, linux-mmc, linux-mtd, linux-pm, alsa-devel, linux-spi,
linux-usb
In-Reply-To: <20230124230228.372305-1-robh@kernel.org>
On Tue, 24 Jan 2023, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedProperties or additionalProperties as appropriate, and
> then add any missing properties flagged by the addition.
>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> To: David Airlie <airlied@gmail.com>
> To: Daniel Vetter <daniel@ffwll.ch>
> To: Bartosz Golaszewski <brgl@bgdev.pl>
> To: Jean Delvare <jdelvare@suse.com>
> To: Guenter Roeck <linux@roeck-us.net>
> To: Thomas Gleixner <tglx@linutronix.de>
> To: Marc Zyngier <maz@kernel.org>
> To: Jassi Brar <jassisinghbrar@gmail.com>
> To: Mauro Carvalho Chehab <mchehab@kernel.org>
> To: Lee Jones <lee@kernel.org>
> To: Ulf Hansson <ulf.hansson@linaro.org>
> To: Richard Weinberger <richard@nod.at>
> To: Vignesh Raghavendra <vigneshr@ti.com>
> To: Sebastian Reichel <sre@kernel.org>
> To: Mark Brown <broonie@kernel.org>
> To: "Rafael J. Wysocki" <rafael@kernel.org>
> To: Daniel Lezcano <daniel.lezcano@linaro.org>
> To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-gpio@vger.kernel.org
> Cc: linux-hwmon@vger.kernel.org
> Cc: linux-media@vger.kernel.org
> Cc: openbmc@lists.ozlabs.org
> Cc: linux-mmc@vger.kernel.org
> Cc: linux-mtd@lists.infradead.org
> Cc: linux-pm@vger.kernel.org
> Cc: alsa-devel@alsa-project.org
> Cc: linux-spi@vger.kernel.org
> Cc: linux-usb@vger.kernel.org
> ---
> .../devicetree/bindings/arm/arm,vexpress-juno.yaml | 1 +
> .../bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml | 5 +++--
> .../bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 4 ++++
> .../bindings/bus/allwinner,sun50i-a64-de2.yaml | 1 +
> .../bindings/bus/allwinner,sun8i-a23-rsb.yaml | 1 +
> .../bus/intel,ixp4xx-expansion-bus-controller.yaml | 6 ++++++
> Documentation/devicetree/bindings/bus/palmbus.yaml | 1 +
> .../devicetree/bindings/display/msm/qcom,mdss.yaml | 5 +++++
> Documentation/devicetree/bindings/example-schema.yaml | 2 ++
> .../devicetree/bindings/gpio/x-powers,axp209-gpio.yaml | 1 +
> .../devicetree/bindings/hwmon/adi,ltc2992.yaml | 1 +
> .../bindings/interrupt-controller/arm,gic-v3.yaml | 2 ++
> .../bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml | 1 +
> .../devicetree/bindings/media/i2c/maxim,max9286.yaml | 7 +++++++
> .../bindings/memory-controllers/arm,pl35x-smc.yaml | 1 +
> .../bindings/memory-controllers/exynos-srom.yaml | 1 +
> .../memory-controllers/nvidia,tegra124-emc.yaml | 1 +
> .../bindings/memory-controllers/st,stm32-fmc2-ebi.yaml | 1 +
> .../devicetree/bindings/mfd/mediatek,mt6370.yaml | 2 ++
> .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 1 +
> Documentation/devicetree/bindings/mtd/mtd.yaml | 1 +
> .../devicetree/bindings/power/supply/ti,lp8727.yaml | 1 +
> .../devicetree/bindings/soc/imx/fsl,imx93-src.yaml | 3 ++-
> .../bindings/soc/microchip/atmel,at91rm9200-tcb.yaml | 1 +
> Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml | 1 +
> .../devicetree/bindings/sound/marvell,mmp-sspa.yaml | 1 +
> .../devicetree/bindings/sound/qcom,wcd934x.yaml | 1 +
> .../devicetree/bindings/sound/samsung,odroid.yaml | 2 ++
> .../devicetree/bindings/soundwire/qcom,soundwire.yaml | 1 +
> .../bindings/spi/allwinner,sun4i-a10-spi.yaml | 1 +
> .../bindings/spi/allwinner,sun6i-a31-spi.yaml | 1 +
> .../devicetree/bindings/spi/spi-controller.yaml | 1 +
> .../sram/allwinner,sun4i-a10-system-control.yaml | 10 +++++-----
> Documentation/devicetree/bindings/sram/qcom,ocmem.yaml | 1 +
> .../devicetree/bindings/thermal/thermal-zones.yaml | 1 +
> Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 +
> 36 files changed, 65 insertions(+), 8 deletions(-)
Acked-by: Lee Jones <lee@kernel.org>
--
Lee Jones [李琼斯]
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^ permalink raw reply
* Re: [PATCH v11 4/6] thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver
From: Balsam CHIHI @ 2023-01-25 15:06 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg, robh+dt,
krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel, linux-pm,
linux-kernel, linux-arm-kernel, linux-mediatek, devicetree,
khilman, james.lo, rex-bc.chen
In-Reply-To: <5dd5c795-5e67-146d-7132-30fc90171d4c@collabora.com>
On Tue, Jan 24, 2023 at 4:31 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 24/01/23 14:17, bchihi@baylibre.com ha scritto:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > The Low Voltage Thermal Sensor (LVTS) is a multiple sensors, multi
> > controllers contained in a thermal domain.
> >
> > A thermal domains can be the MCU or the AP.
> >
> > Each thermal domains contain up to seven controllers, each thermal
> > controller handle up to four thermal sensors.
> >
> > The LVTS has two Finite State Machines (FSM), one to handle the
> > functionin temperatures range like hot or cold temperature and another
> > one to handle monitoring trip point. The FSM notifies via interrupts
> > when a trip point is crossed.
> >
> > The interrupt is managed at the thermal controller level, so when an
> > interrupt occurs, the driver has to find out which sensor triggered
> > such an interrupt.
> >
> > The sampling of the thermal can be filtered or immediate. For the
> > former, the LVTS measures several points and applies a low pass
> > filter.
> >
> > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>
> On MT8195 Tomato Chromebook:
> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Hi Angelo,
Thank you for reviewing and testing it.
Best regards,
Balsam
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^ permalink raw reply
* Re: [PATCH v30 00/11] Add MediaTek SoC(vdosys1) support for mt8195
From: Matthias Brugger @ 2023-01-25 15:05 UTC (permalink / raw)
To: Nancy.Lin, Rob Herring, Krzysztof Kozlowski, Philipp Zabel, CK Hu
Cc: Nathan Chancellor, Nick Desaulniers, Tom Rix,
AngeloGioacchino Del Regno, Jason-JH . Lin, Nathan Lu,
Rex-BC Chen, Xinlei Lee, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, llvm, singo.chang,
Project_Global_Chrome_Upstream_Group
In-Reply-To: <20230113104434.28023-1-nancy.lin@mediatek.com>
Whole series applied, thanks!
On 13/01/2023 11:44, Nancy.Lin wrote:
> The hardware path of vdosys1 with DPTx output need to go through by several modules, such as, OVL_ADAPTOR and MERGE.
>
> Add mmsys and mutex modules support by the patches below:
>
> Changes in v30:
> - rebase to next-20230113
> - fix reviewer comment in v29
> - fix mmysy binding doc for vdosys1
>
> Changes in v29:
> - rebase to next-20221226
> - fix reviewer comment in v28
> - fix mmsys binding doc for vdosys1
>
> Changes in v28:
> - rebase to next-20221107
> - fix reviewer comment in v27
> - remove change id
> - fix mmsys config api typo
>
> Changes in v27:
> - rebase to next-20221102
> - change mmsys compatible for mt8195 vdosys1
> - base on jason's series[ref 1]
> - fix reviewer comment
> - only register mmsys reset controller if num_resets > 0
>
> Changes in v26:
> - fix reviewer comment
> - set mmsys num_resets to 32 for 8192
> - rebase to next-20220819
>
> Changes in v25:
> - fix reviewer comment
> - refine mtk_mmsys_reset_update func
> - rebase to next-20220708
>
> Changes in v24:
> - fix reviewer comment
> - refine mtk_mmsys_reset_update func
> - rebase to next-20220622
>
> Changes in v23:
> - separate[7] mmsys/mutex and drm patches into two series
>
> Changes in v22:
> - rebase to next-20220525
> - rebase to vdosys0 series v22
> - separate dts to a new patch
>
> Changes in v21:
> - fix reviewer comment
> - fix rdma and ethdr binding doc and dts
>
> Changes in v20:
> - fix reviewer comment
> - update mmsys update bit api name
> - add mtk_mmsys_update_bits error message if lose gce property
> - list all mt8195 vdosys1 reset bits
>
> Changes in v19:
> - fix reviewer comment
> - separate mt8195 mmsys component to a new patch
> - separate mt8195 vdo0 and vdo1 routing table
> - separate mmsys_write_reg api to a new patch and simplify write reg code
> - separate mmsys 64 bit reset to a new patch
> - separate mtk-mutex dp_intf1 component to a new patch
>
> Changes in v18:
> - fix reviewer comment
> - fix rdma binding doc
> - fix ethdr binding doc
> - refine mmsys config cmdq support
> - refine merge reset control flow, get reset control in probe function
> - add ethdr reset control error handling and remove dbg log
> - rebase to vdosys0 series v20 (ref [5])
>
> Changes in v17:
> - fix reviewer comment in v16
> - separate ovl adaptor comp in mtk-mmsys and mtk-mutex
> - separate mmsys config API
> - move mdp_rdma binding yaml
> - fix ovl adaptor pm runtime get sync timing issue
> - rebase to vdosys0 series v19 (ref [5])
> - rebase to [7] for modify vblank register change
>
> Changes in v16:
> - fix reviewer comment in v 15
> - fix mtk_drm_ddp_comp.c alignment
> - fix vdosys0 mmsys num before adding vdosys1 patch
>
> Changes in v15:
> - fix ethdr uppercase hex number in dts
>
> Changes in v14:
> - remove MTK_MMSYS 64 bit dependency
> - add ethdr.yaml back and fix dt_schema check fail
>
> Resend v13
> - add related maintainer in maillist
>
> Changes in v13:
> - fix reviewer comment in v12
> - fix rdma dt-binding format
> - fix dts node naming
> - fix 32 bit build error
> - modify 64bit dependency for mtk-mmsys
> - rebase to vdosys0 series v16. (ref [5])
>
> Changes in v12:
> - fix reviewer comment in v11
> - modify mbox index
> - refine dma dev for ovl_adaptor sub driver
>
> Changes in v11:
> - remove ethdr vblank spin lock
> - refine ovl_adaptor print message
>
> Changes in v10:
> - refine ethdr reset control using devm_reset_control_array_get_optional_exclusive
> - fix ovl_adaptor mtk_ovl_adaptor_clk_enable error handle issue
>
> Changes in v9:
> - rebase on kernel-5.16-rc1
> - rebase on vdosys0 series v13. (ref [5])
> - fix ovl_adaptor sub driver is brought up unintentionally
> - fix clang build test fail- duplicate ethdr/mdp_rdma init_module/cleanup_module symbol issue
>
> Changes in v8:
> - separate merge async reset to new patch.
> - separate drm ovl_adaptor sub driver to new patch.
> - fix reviewer comment in v7.
>
> Changes in v7:
> - rebase on vdosys0 series v12 (ref[5])
> - add dma description in ethdr binding document.
> - refine vdosys1 bit definition of mmsys routing table.
> - separate merge modification into 3 pathces.
> - separate mutex modification into 2 patches.
> - add plane color coding for mdp_rdma csc.
> - move mdp_rdma pm control to ovl_adaptor.
> - fix reviewer comment in v6.
>
> Changes in v6:
> - rebase on kernel-5.15-rc1.
> - change mbox label to gce0 for dts node of vdosys1.
> - modify mmsys reset num for mt8195.
> - rebase on vdosys0 series v10. (ref [5])
> - use drm to bring up ovl_adaptor driver.
> - move drm iommu/mutex check from kms init to drm bind.
> - modify rdma binding doc location. (Documentation/devicetree/bindings/arm/)
> - modify for reviewer's comment in v5.
>
> Changes in v5:
> - add mmsys reset controller reference.
>
> Changes in v4:
> - use merge common driver for merge1~4.
> - refine ovl_adaptor rdma driver.
> - use ovl_adaptor ddp_comp function instead of ethdr.
> - modify for reviewer's comment in v3.
>
> Changes in v3:
> - modify for reviewer's comment in v2.
> - add vdosys1 2 pixels align limit.
> - add mixer odd offset support.
>
> Changes in v2:
> - Merge PSEUDO_OVL and ETHDR into one DRM component.
> - Add mmsys config API for vdosys1 hardware setting.
> - Add mmsys reset control using linux reset framework.
>
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
>
> This series are based on the following patch:
> [1] Change mmsys compatible for mt8195 mediatek-drm
> 20221126101220.18179-1-jason-jh.lin@mediatek.com
>
> Nancy.Lin (11):
> dt-bindings: arm: mediatek: mmsys: add vdosys1 compatible for MT8195
> dt-bindings: reset: mt8195: add vdosys1 reset control bit
> soc: mediatek: add mtk-mmsys ethdr and mdp_rdma components
> soc: mediatek: add mtk-mmsys support for mt8195 vdosys1
> soc: mediatek: refine code to use mtk_mmsys_update_bits API
> soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1
> soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195
> vdosys1
> soc: mediatek: mmsys: add mmsys for support 64 reset bits
> soc: mediatek: mmsys: add reset control for MT8195 vdosys1
> soc: mediatek: add mtk-mutex component - dp_intf1
> soc: mediatek: add mtk-mutex support for mt8195 vdosys1
>
> .../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
> drivers/soc/mediatek/mt8195-mmsys.h | 146 +++++++++++++++++
> drivers/soc/mediatek/mtk-mmsys.c | 149 +++++++++++++-----
> drivers/soc/mediatek/mtk-mmsys.h | 1 +
> drivers/soc/mediatek/mtk-mutex.c | 37 +++++
> include/dt-bindings/reset/mt8195-resets.h | 45 ++++++
> include/linux/soc/mediatek/mtk-mmsys.h | 25 +++
> 7 files changed, 366 insertions(+), 38 deletions(-)
>
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^ permalink raw reply
* Re: [PATCH v11 3/6] arm64/dts/mt8195: Add efuse node to mt8195
From: Balsam CHIHI @ 2023-01-25 15:04 UTC (permalink / raw)
To: Matthias Brugger
Cc: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, robh+dt, krzysztof.kozlowski+dt, rdunlap, ye.xingchen,
p.zabel, linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
In-Reply-To: <104bb37e-55c3-8dd0-f501-0e8a142511e6@gmail.com>
On Wed, Jan 25, 2023 at 3:25 PM Matthias Brugger <matthias.bgg@gmail.com> wrote:
>
>
>
> On 24/01/2023 14:17, bchihi@baylibre.com wrote:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Add efuse node.
> > This will be required by the thermal driver to get the calibration data.
> >
> > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>
> I fixed the subject prefix to:
> arm64: dts: mt8195: ...
> to be in line with other commits.
> Please take that into account for future patches you send.
>
> Applied thanks!
>
Hi Matthias,
Thank you for the fix and for applying the patch!
Best regards,
Balsam
> > ---
> > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > index 5d31536f4c48..09df105f4606 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > @@ -1380,6 +1380,12 @@ pciephy_glb_intr: pciephy-glb-intr@193 {
> > dp_calibration: dp-data@1ac {
> > reg = <0x1ac 0x10>;
> > };
> > + lvts_efuse_data1: lvts1-calib@1bc {
> > + reg = <0x1bc 0x14>;
> > + };
> > + lvts_efuse_data2: lvts2-calib@1d0 {
> > + reg = <0x1d0 0x38>;
> > + };
> > };
> >
> > u3phy2: t-phy@11c40000 {
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* Re: [PATCH 0/5] arm: dts: mt7623: relocate gmacs, mt7530 switch, and mux phy
From: Matthias Brugger @ 2023-01-25 15:03 UTC (permalink / raw)
To: Arınç ÜNAL, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, linux-arm-kernel, linux-mediatek, linux-kernel,
Frank Wunderlich, erkin.bozoglu, Sean Wang, DENG Qingfang
In-Reply-To: <20230120205318.519493-1-arinc.unal@arinc9.com>
On 20/01/2023 21:53, Arınç ÜNAL wrote:
> Yeia sou!
>
γεια σας!
Whole series applied, thanks!
> I initially just wanted to submit the phy muxing patch for BPI-R2 but after
> looking around the bindings, I decided to do a bit of a cleanup.
>
> The main takeaway of the cleanup is that the MT7530 switch is actually a
> part of the multi-chip module on the MT7623AI SoC. I'm moving the bindings
> for this switch to mt7623a.dtsi so they don't need to be defined on every
> device with this SoC. This should ease it up for supporting more devices
> with MT7623AI SoC on mainline.
>
> I don't know if there's a pin wired for interrupt. The switch is going to
> work with polling for the time being. Folks from MediaTek, feel free to
> fill me in on this.
>
> I've tested phy muxing on my BPI-R2. DTs compile fine.
>
> Arınç ÜNAL (5):
> arm: dts: mt7623: add gmacs to mt7623.dtsi
> arm: dts: mt7623: add mt7530 switch to mt7623a.dtsi
> arm: dts: mt7623: change mt7530 switch address
> arm: dts: mt7623: mux phy0 on Bananapi BPI-R2
> arm: dts: mt7623: enable flow control on port@6
>
> arch/arm/boot/dts/mt7623.dtsi | 14 ++++
> arch/arm/boot/dts/mt7623a-rfb-emmc.dts | 86 ++++++----------------
> arch/arm/boot/dts/mt7623a-rfb-nand.dts | 86 ++++++----------------
> arch/arm/boot/dts/mt7623a.dtsi | 74 +++++++++++++++++++
> arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 22 +++---
> arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 13 ++--
> 6 files changed, 147 insertions(+), 148 deletions(-)
>
>
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* Re: [PATCH v11 1/6] thermal/drivers/mediatek: Relocate driver to mediatek folder
From: Balsam CHIHI @ 2023-01-25 15:02 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg, robh+dt,
krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel, linux-pm,
linux-kernel, linux-arm-kernel, linux-mediatek, devicetree,
khilman, james.lo, rex-bc.chen
In-Reply-To: <976628a6-58c8-3298-3777-97aaddf53bc1@collabora.com>
On Tue, Jan 24, 2023 at 4:37 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 24/01/23 14:17, bchihi@baylibre.com ha scritto:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Add MediaTek proprietary folder to upstream more thermal zone and cooler
> > drivers, relocate the original thermal controller driver to it, and rename it
> > as "auxadc_thermal.c" to show its purpose more clearly.
> >
> > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
>
Hi Angelo,
Thank you.
Best regards,
Balsam
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>
>
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^ permalink raw reply
* [PATCH v9 8/9] dt-bindings: serial: mediatek,uart: add MT8365
From: Bernhard Rosenkränzer @ 2023-01-25 14:35 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
Add binding description for mediatek,mt8365-uart
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Documentation/devicetree/bindings/serial/mediatek,uart.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml
index fe098d98af6ee..303d02ca4e1ba 100644
--- a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml
+++ b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml
@@ -45,6 +45,7 @@ properties:
- mediatek,mt8188-uart
- mediatek,mt8192-uart
- mediatek,mt8195-uart
+ - mediatek,mt8365-uart
- mediatek,mt8516-uart
- const: mediatek,mt6577-uart
--
2.39.1
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^ permalink raw reply related
* [PATCH v9 7/9] dt-bindings: timer: mediatek,mtk-timer: add MT8365
From: Bernhard Rosenkränzer @ 2023-01-25 14:35 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
Add binding description for mediatek,mt8365-systimer
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
index 8bbb6e94508b2..b3e797e8aa313 100644
--- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
+++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
@@ -33,6 +33,7 @@ Required properties:
For those SoCs that use CPUX
* "mediatek,mt6795-systimer" for MT6795 compatible timers (CPUX)
+ * "mediatek,mt8365-systimer" for MT8365 compatible timers (CPUX)
- reg: Should contain location and length for timer register.
- clocks: Should contain system clock.
--
2.39.1
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^ permalink raw reply related
* Re: [PATCH v4 6/6] arch_topology: Build cacheinfo from primary CPU
From: Sudeep Holla @ 2023-01-25 14:54 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Conor Dooley, Pierre Gondois, linux-kernel, Palmer Dabbelt,
Catalin Marinas, Will Deacon, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Rafael J. Wysocki, Len Brown, Greg Kroah-Hartman,
Gavin Shan, linux-arm-kernel, linux-riscv, linux-acpi
In-Reply-To: <20230124145541.2xwtr7ro2bjnsjd7@bogus>
Hi Geert,
On Tue, Jan 24, 2023 at 02:55:41PM +0000, Sudeep Holla wrote:
>
> Geert, can you please try with the patch Conor pointed out and see if
> that helps to fix the allocation failures[1]
>
Sorry for the nag, but did you get the chance to test -next with [1]
and see if it fixes the cacheinfo memory failure you were observing ?
--
Regards,
Sudeep
[1] https://lore.kernel.org/all/20230103035316.3841303-1-leyfoon.tan@starfivetech.com/
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^ permalink raw reply
* Re: [PATCH v2 8/9] usb: host: ehci-exynos: Convert to devm_of_phy_optional_get()
From: Greg Kroah-Hartman @ 2023-01-25 14:38 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Vinod Koul, Jonathan Corbet, Madalin Bucur, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Horatiu Vultur,
UNGLinuxDriver, Thierry Reding, Lorenzo Pieralisi, Rob Herring,
Krzysztof Wilczyński, Bjorn Helgaas, Jonathan Hunter,
Kishon Vijay Abraham I, Alan Stern, Krzysztof Kozlowski,
Alim Akhtar, Siddharth Vadapalli, Russell King, linux-phy,
linux-doc, netdev, linux-tegra, linux-pci, linux-usb,
linux-arm-kernel, linux-samsung-soc
In-Reply-To: <a28baf4e07e464c43aff9e52263b5a902f5da9a0.1674584626.git.geert+renesas@glider.be>
On Tue, Jan 24, 2023 at 07:37:27PM +0100, Geert Uytterhoeven wrote:
> Use the new devm_of_phy_optional_get() helper instead of open-coding the
> same operation.
>
> As devm_of_phy_optional_get() returns NULL if either the PHY cannot be
> found, or if support for the PHY framework is not enabled, it is no
> longer needed to check for -ENODEV or -ENOSYS.
>
> This lets us drop several checks for IS_ERR(), as phy_power_{on,off}()
> handle NULL parameters fine.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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^ permalink raw reply
* Re: [PATCH v2 9/9] usb: host: ohci-exynos: Convert to devm_of_phy_optional_get()
From: Greg Kroah-Hartman @ 2023-01-25 14:38 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Vinod Koul, Jonathan Corbet, Madalin Bucur, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Horatiu Vultur,
UNGLinuxDriver, Thierry Reding, Lorenzo Pieralisi, Rob Herring,
Krzysztof Wilczyński, Bjorn Helgaas, Jonathan Hunter,
Kishon Vijay Abraham I, Alan Stern, Krzysztof Kozlowski,
Alim Akhtar, Siddharth Vadapalli, Russell King, linux-phy,
linux-doc, netdev, linux-tegra, linux-pci, linux-usb,
linux-arm-kernel, linux-samsung-soc
In-Reply-To: <3adc5dd1149a17ea7daf4463549feab886c6b145.1674584626.git.geert+renesas@glider.be>
On Tue, Jan 24, 2023 at 07:37:28PM +0100, Geert Uytterhoeven wrote:
> Use the new devm_of_phy_optional_get() helper instead of open-coding the
> same operation.
>
> As devm_of_phy_optional_get() returns NULL if either the PHY cannot be
> found, or if support for the PHY framework is not enabled, it is no
> longer needed to check for -ENODEV or -ENOSYS.
>
> This lets us drop several checks for IS_ERR(), as phy_power_{on,off}()
> handle NULL parameters fine.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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^ permalink raw reply
* Re: [PATCH] dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
From: Greg Kroah-Hartman @ 2023-01-25 14:35 UTC (permalink / raw)
To: Rob Herring
Cc: Krzysztof Kozlowski, David Airlie, Daniel Vetter,
Bartosz Golaszewski, Jean Delvare, Guenter Roeck, Thomas Gleixner,
Marc Zyngier, Jassi Brar, Mauro Carvalho Chehab, Lee Jones,
Ulf Hansson, Richard Weinberger, Vignesh Raghavendra,
Sebastian Reichel, Mark Brown, Rafael J. Wysocki, Daniel Lezcano,
linux-arm-kernel, dri-devel, linux-gpio, linux-hwmon, linux-media,
openbmc, linux-mmc, linux-mtd, linux-pm, alsa-devel, linux-spi,
linux-usb
In-Reply-To: <20230124230228.372305-1-robh@kernel.org>
On Tue, Jan 24, 2023 at 05:02:28PM -0600, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedProperties or additionalProperties as appropriate, and
> then add any missing properties flagged by the addition.
>
> Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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^ permalink raw reply
* [PATCH v9 9/9] arm64: dts: mediatek: Initial mt8365-evk support
From: Bernhard Rosenkränzer @ 2023-01-25 14:35 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
From: Fabien Parent <fparent@baylibre.com>
This adds minimal support for the Mediatek 8365 SOC and the EVK reference
board, allowing the board to boot to initramfs with serial port I/O.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
[bero@baylibre.com: Removed parts depending on drivers that aren't upstream yet, cleanups, add CPU cache layout, add systimer, fix GIC]
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 168 +++++++++
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 377 ++++++++++++++++++++
3 files changed, 546 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 813e735c5b96d..d78523c5a7dd6 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -47,4 +47,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r2.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r3.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
new file mode 100644
index 0000000000000..4683704ea2355
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021-2022 BayLibre, SAS.
+ * Authors:
+ * Fabien Parent <fparent@baylibre.com>
+ * Bernhard Rosenkränzer <bero@baylibre.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/mt8365-pinfunc.h>
+#include "mt8365.dtsi"
+
+/ {
+ model = "MediaTek MT8365 Open Platform EVK";
+ compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_keys>;
+
+ key-volume-up {
+ gpios = <&pio 24 GPIO_ACTIVE_LOW>;
+ label = "volume_up";
+ linux,code = <KEY_VOLUMEUP>;
+ wakeup-source;
+ debounce-interval = <15>;
+ };
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0xc0000000>;
+ };
+
+ usb_otg_vbus: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 128 KiB reserved for ARM Trusted Firmware (BL31) */
+ bl31_secmon_reserved: secmon@43000000 {
+ no-map;
+ reg = <0 0x43000000 0 0x20000>;
+ };
+
+ /* 12 MiB reserved for OP-TEE (BL32)
+ * +-----------------------+ 0x43e0_0000
+ * | SHMEM 2MiB |
+ * +-----------------------+ 0x43c0_0000
+ * | | TA_RAM 8MiB |
+ * + TZDRAM +--------------+ 0x4340_0000
+ * | | TEE_RAM 2MiB |
+ * +-----------------------+ 0x4320_0000
+ */
+ optee_reserved: optee@43200000 {
+ no-map;
+ reg = <0 0x43200000 0 0x00c00000>;
+ };
+ };
+};
+
+&pio {
+ gpio_keys: gpio-keys-pins {
+ pins {
+ pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>;
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ uart0_pins: uart0-pins {
+ pins {
+ pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>,
+ <MT8365_PIN_36_UTXD0__FUNC_UTXD0>;
+ };
+ };
+
+ uart1_pins: uart1-pins {
+ pins {
+ pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>,
+ <MT8365_PIN_38_UTXD1__FUNC_UTXD1>;
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ pins {
+ pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>,
+ <MT8365_PIN_40_UTXD2__FUNC_UTXD2>;
+ };
+ };
+
+ usb_pins: usb-pins {
+ id-pins {
+ pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ usb0-vbus-pins {
+ pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>;
+ output-high;
+ };
+
+ usb1-vbus-pins {
+ pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>;
+ output-high;
+ };
+ };
+
+ pwm_pins: pwm-pins {
+ pins {
+ pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>,
+ <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>;
+ };
+ };
+};
+
+&pwm {
+ pinctrl-0 = <&pwm_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
new file mode 100644
index 0000000000000..15ac4c1f09661
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * (C) 2018 MediaTek Inc.
+ * Copyright (C) 2022 BayLibre SAS
+ * Fabien Parent <fparent@baylibre.com>
+ * Bernhard Rosenkränzer <bero@baylibre.com>
+ */
+#include <dt-bindings/clock/mediatek,mt8365-clk.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/phy/phy.h>
+
+/ {
+ compatible = "mediatek,mt8365";
+ interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x1>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x2>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x3>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-size = <0x80000>;
+ cache-line-size = <64>;
+ cache-sets = <512>;
+ cache-unified;
+ };
+ };
+
+ clk26m: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "clk26m";
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ gic: interrupt-controller@c000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ reg = <0 0x0c000000 0 0x10000>, /* GICD */
+ <0 0x0c080000 0 0x80000>, /* GICR */
+ <0 0x0c400000 0 0x2000>, /* GICC */
+ <0 0x0c410000 0 0x1000>, /* GICH */
+ <0 0x0c420000 0 0x2000>; /* GICV */
+
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ topckgen: syscon@10000000 {
+ compatible = "mediatek,mt8365-topckgen", "syscon";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt8365-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ pericfg: syscon@10003000 {
+ compatible = "mediatek,mt8365-pericfg", "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ syscfg_pctl: syscfg-pctl@10005000 {
+ compatible = "mediatek,mt8365-syscfg", "syscon";
+ reg = <0 0x10005000 0 0x1000>;
+ };
+
+ pio: pinctrl@1000b000 {
+ compatible = "mediatek,mt8365-pinctrl";
+ reg = <0 0x1000b000 0 0x1000>;
+ mediatek,pctl-regmap = <&syscfg_pctl>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ apmixedsys: syscon@1000c000 {
+ compatible = "mediatek,mt8365-apmixedsys", "syscon";
+ reg = <0 0x1000c000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ keypad: keypad@10010000 {
+ compatible = "mediatek,mt6779-keypad";
+ reg = <0 0x10010000 0 0x1000>;
+ wakeup-source;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_EDGE_FALLING>;
+ clocks = <&clk26m>;
+ clock-names = "kpd";
+ status = "disabled";
+ };
+
+ mcucfg: syscon@10200000 {
+ compatible = "mediatek,mt8365-mcucfg", "syscon";
+ reg = <0 0x10200000 0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ sysirq: interrupt-controller@10200a80 {
+ compatible = "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ reg = <0 0x10200a80 0 0x20>;
+ };
+
+ infracfg_nao: infracfg@1020e000 {
+ compatible = "mediatek,mt8365-infracfg", "syscon";
+ reg = <0 0x1020e000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ rng: rng@1020f000 {
+ compatible = "mediatek,mt8365-rng", "mediatek,mt7623-rng";
+ reg = <0 0x1020f000 0 0x100>;
+ clocks = <&infracfg CLK_IFR_TRNG>;
+ clock-names = "rng";
+ };
+
+ apdma: dma-controller@11000280 {
+ compatible = "mediatek,mt8365-uart-dma", "mediatek,mt6577-uart-dma";
+ reg = <0 0x11000280 0 0x80>,
+ <0 0x11000300 0 0x80>,
+ <0 0x11000380 0 0x80>,
+ <0 0x11000400 0 0x80>,
+ <0 0x11000580 0 0x80>,
+ <0 0x11000600 0 0x80>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+ dma-requests = <6>;
+ clocks = <&infracfg CLK_IFR_AP_DMA>;
+ clock-names = "apdma";
+ #dma-cells = <1>;
+ };
+
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg CLK_IFR_UART0>;
+ clock-names = "baud", "bus";
+ dmas = <&apdma 0>, <&apdma 1>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x1000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg CLK_IFR_UART1>;
+ clock-names = "baud", "bus";
+ dmas = <&apdma 2>, <&apdma 3>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ uart2: serial@11004000 {
+ compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x1000>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg CLK_IFR_UART2>;
+ clock-names = "baud", "bus";
+ dmas = <&apdma 4>, <&apdma 5>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ pwm: pwm@11006000 {
+ compatible = "mediatek,mt8365-pwm";
+ reg = <0 0x11006000 0 0x1000>;
+ #pwm-cells = <2>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_IFR_PWM_HCLK>,
+ <&infracfg CLK_IFR_PWM>,
+ <&infracfg CLK_IFR_PWM1>,
+ <&infracfg CLK_IFR_PWM2>,
+ <&infracfg CLK_IFR_PWM3>;
+ clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
+ };
+
+ spi: spi@1100a000 {
+ compatible = "mediatek,mt8365-spi", "mediatek,mt7622-spi";
+ reg = <0 0x1100a000 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
+ <&topckgen CLK_TOP_SPI_SEL>,
+ <&infracfg CLK_IFR_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ ssusb: usb@11201000 {
+ compatible = "mediatek,mt8365-mtu3", "mediatek,mtu3";
+ reg = <0 0x11201000 0 0x2e00>, <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&u2port0 PHY_TYPE_USB2>,
+ <&u2port1 PHY_TYPE_USB2>;
+ clocks = <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>,
+ <&infracfg CLK_IFR_SSUSB_REF>,
+ <&infracfg CLK_IFR_SSUSB_SYS>,
+ <&infracfg CLK_IFR_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host: usb@11200000 {
+ compatible = "mediatek,mt8365-xhci", "mediatek,mtk-xhci";
+ reg = <0 0x11200000 0 0x1000>;
+ reg-names = "mac";
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>,
+ <&infracfg CLK_IFR_SSUSB_REF>,
+ <&infracfg CLK_IFR_SSUSB_SYS>,
+ <&infracfg CLK_IFR_ICUSB>,
+ <&infracfg CLK_IFR_SSUSB_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
+ "dma_ck", "xhci_ck";
+ status = "disabled";
+ };
+ };
+
+ u3phy: t-phy@11cc0000 {
+ compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x11cc0000 0x9000>;
+
+ u2port0: usb-phy@0 {
+ reg = <0x0 0x400>;
+ clocks = <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>,
+ <&topckgen CLK_TOP_USB20_48M_EN>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+
+ u2port1: usb-phy@1000 {
+ reg = <0x1000 0x400>;
+ clocks = <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>,
+ <&topckgen CLK_TOP_USB20_48M_EN>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ system_clk: dummy13m {
+ compatible = "fixed-clock";
+ clock-frequency = <13000000>;
+ #clock-cells = <0>;
+ };
+
+ systimer: timer@10017000 {
+ compatible = "mediatek,mt8365-systimer", "mediatek,mt6795-systimer";
+ reg = <0 0x10017000 0 0x10>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&system_clk>;
+ clock-names = "clk13m";
+ };
+};
--
2.39.1
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^ permalink raw reply related
* [PATCH v9 6/9] dt-bindings: usb: mediatek,mtk-xhci: add MT8365 SoC bindings
From: Bernhard Rosenkränzer @ 2023-01-25 14:35 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
From: Fabien Parent <fparent@baylibre.com>
Add binding documentation for the MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
[bero@baylibre.com: Cleanups suggested by reviewers]
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
---
Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
index a3c37944c6305..c119caa9ad168 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
@@ -35,6 +35,7 @@ properties:
- mediatek,mt8188-xhci
- mediatek,mt8192-xhci
- mediatek,mt8195-xhci
+ - mediatek,mt8365-xhci
- const: mediatek,mtk-xhci
reg:
--
2.39.1
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^ permalink raw reply related
* [PATCH v9 4/9] dt-bindings: pinctrl: add bindings for Mediatek MT8365 SoC
From: Bernhard Rosenkränzer @ 2023-01-25 14:34 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
Add devicetree bindings for Mediatek MT8365 pinctrl driver.
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../pinctrl/mediatek,mt8365-pinctrl.yaml | 197 ++++++++++++++++++
1 file changed, 197 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
new file mode 100644
index 0000000000000..4b96884a1afc7
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
@@ -0,0 +1,197 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek MT8365 Pin Controller
+
+maintainers:
+ - Zhiyong Tao <zhiyong.tao@mediatek.com>
+ - Bernhard Rosenkränzer <bero@baylibre.com>
+
+description: |
+ The MediaTek's MT8365 Pin controller is used to control SoC pins.
+
+properties:
+ compatible:
+ const: mediatek,mt8365-pinctrl
+
+ reg:
+ maxItems: 1
+
+ mediatek,pctl-regmap:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ maxItems: 1
+ minItems: 1
+ maxItems: 2
+ description: |
+ Should be phandles of the syscfg node.
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+ description: |
+ Number of cells in GPIO specifier. Since the generic GPIO
+ binding is used, the amount of cells must be specified as 2. See the below
+ mentioned gpio binding representation for description of particular cells.
+
+ interrupt-controller: true
+
+ interrupts:
+ maxItems: 1
+
+ "#interrupt-cells":
+ const: 2
+
+patternProperties:
+ "-pins$":
+ type: object
+ additionalProperties: false
+ patternProperties:
+ "pins$":
+ type: object
+ additionalProperties: false
+ description: |
+ A pinctrl node should contain at least one subnode representing the
+ pinctrl groups available on the machine. Each subnode will list the
+ pins it needs, and how they should be configured, with regard to muxer
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
+ $ref: /schemas/pinctrl/pincfg-node.yaml
+
+ properties:
+ pinmux:
+ description:
+ integer array, represents gpio pin number and mux setting.
+ Supported pin number and mux varies for different SoCs, and are
+ defined as macros in <soc>-pinfunc.h directly.
+
+ bias-disable: true
+
+ bias-pull-up:
+ description: |
+ Besides generic pinconfig options, it can be used as the pull up
+ settings for 2 pull resistors, R0 and R1. User can configure those
+ special pins.
+
+ bias-pull-down: true
+
+ input-enable: true
+
+ input-disable: true
+
+ output-low: true
+
+ output-high: true
+
+ input-schmitt-enable: true
+
+ input-schmitt-disable: true
+
+ mediatek,drive-strength-adv:
+ description: |
+ Describe the specific driving setup property.
+ For I2C pins, the existing generic driving setup can only support
+ 2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they
+ can support 0.125/0.25/0.5/1mA adjustment. If we enable specific
+ driving setup, the existing generic setup will be disabled.
+ The specific driving setup is controlled by E1E0EN.
+ When E1=0/E0=0, the strength is 0.125mA.
+ When E1=0/E0=1, the strength is 0.25mA.
+ When E1=1/E0=0, the strength is 0.5mA.
+ When E1=1/E0=1, the strength is 1mA.
+ EN is used to enable or disable the specific driving setup.
+ Valid arguments are described as below:
+ 0: (E1, E0, EN) = (0, 0, 0)
+ 1: (E1, E0, EN) = (0, 0, 1)
+ 2: (E1, E0, EN) = (0, 1, 0)
+ 3: (E1, E0, EN) = (0, 1, 1)
+ 4: (E1, E0, EN) = (1, 0, 0)
+ 5: (E1, E0, EN) = (1, 0, 1)
+ 6: (E1, E0, EN) = (1, 1, 0)
+ 7: (E1, E0, EN) = (1, 1, 1)
+ So the valid arguments are from 0 to 7.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3, 4, 5, 6, 7]
+
+ mediatek,pull-up-adv:
+ description: |
+ Pull up setings for 2 pull resistors, R0 and R1. User can
+ configure those special pins. Valid arguments are described as below:
+ 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
+ 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
+ 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
+ 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3]
+
+ mediatek,pull-down-adv:
+ description: |
+ Pull down settings for 2 pull resistors, R0 and R1. User can
+ configure those special pins. Valid arguments are described as below:
+ 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
+ 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
+ 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
+ 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3]
+
+ mediatek,tdsel:
+ description: |
+ An integer describing the steps for output level shifter duty
+ cycle when asserted (high pulse width adjustment). Valid arguments
+ are from 0 to 15.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ mediatek,rdsel:
+ description: |
+ An integer describing the steps for input level shifter duty cycle
+ when asserted (high pulse width adjustment). Valid arguments are
+ from 0 to 63.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ required:
+ - pinmux
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - "#gpio-cells"
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pio: pinctrl@1000b000 {
+ compatible = "mediatek,mt8365-pinctrl";
+ reg = <0 0x1000b000 0 0x1000>;
+ mediatek,pctl-regmap = <&syscfg_pctl>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+
+ pio-pins {
+ pins {
+ pinmux = <MT8365_PIN_59_SDA1__FUNC_SDA1_0>, <MT8365_PIN_60_SCL1__FUNC_SCL1_0>;
+ mediatek,pull-up-adv = <3>;
+ mediatek,drive-strength-adv = <00>;
+ bias-pull-up;
+ };
+ };
+ };
+ };
--
2.39.1
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^ permalink raw reply related
* [PATCH v9 5/9] dt-bindings: usb: mediatek,mtu3: add MT8365 SoC bindings
From: Bernhard Rosenkränzer @ 2023-01-25 14:34 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
From: Fabien Parent <fparent@baylibre.com>
Add binding documentation for the MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
index 7168110e2f9de..d2655173e108c 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
@@ -28,6 +28,7 @@ properties:
- mediatek,mt8188-mtu3
- mediatek,mt8192-mtu3
- mediatek,mt8195-mtu3
+ - mediatek,mt8365-mtu3
- const: mediatek,mtu3
reg:
--
2.39.1
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^ permalink raw reply related
* [PATCH v9 3/9] dt-bindings: mfd: syscon: Add mt8365-syscfg
From: Bernhard Rosenkränzer @ 2023-01-25 14:34 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
Document Mediatek mt8365-syscfg
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 1b01bd0104316..7beeb0abc4db0 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -50,6 +50,7 @@ properties:
- marvell,armada-3700-usb2-host-misc
- mediatek,mt8135-pctl-a-syscfg
- mediatek,mt8135-pctl-b-syscfg
+ - mediatek,mt8365-syscfg
- microchip,lan966x-cpu-syscon
- microchip,sparx5-cpu-syscon
- mstar,msc313-pmsleep
--
2.39.1
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^ permalink raw reply related
* [PATCH v9 2/9] dt-bindings: irq: mtk, sysirq: add support for mt8365
From: Bernhard Rosenkränzer @ 2023-01-25 14:34 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
Add binding documentation of mediatek,sysirq for mt8365 SoC.
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
---
.../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
index 84ced3f4179b9..3ffc60184e445 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
@@ -25,6 +25,7 @@ Required properties:
"mediatek,mt6577-sysirq": for MT6577
"mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712
"mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701
+ "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq": for MT8365
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
- reg: Physical base address of the intpol registers and length of memory
--
2.39.1
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* [PATCH v9 1/9] dt-bindings: arm64: dts: mediatek: Add mt8365-evk board
From: Bernhard Rosenkränzer @ 2023-01-25 14:34 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
In-Reply-To: <20230125143503.1015424-1-bero@baylibre.com>
Add bindings for the Mediatek mt8365-evk board.
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
index 2275e5d93721b..ae12b1cab9fbd 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -244,6 +244,10 @@ properties:
- enum:
- mediatek,mt8183-pumpkin
- const: mediatek,mt8183
+ - items:
+ - enum:
+ - mediatek,mt8365-evk
+ - const: mediatek,mt8365
- items:
- enum:
- mediatek,mt8516-pumpkin
--
2.39.1
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* [PATCH v9 0/9] Add minimal MT8365 and MT8365-EVK support
From: Bernhard Rosenkränzer @ 2023-01-25 14:34 UTC (permalink / raw)
To: linux-mediatek, devicetree, linux-kernel, linux-gpio,
linux-arm-kernel, linux-serial, linux-usb, robh+dt,
krzysztof.kozlowski+dt, tglx, maz, lee, linus.walleij,
matthias.bgg, gregkh, daniel.lezcano, chunfeng.yun,
angelogioacchino.delregno, nfraprado, allen-kh.cheng, sean.wang,
zhiyong.tao
v9:
- Fix a regression in v8 that broke the USB port
- Remove superfluous include in mt8365.dtsi
- Fix some naming issues pointed out by dtbs_check
v8:
- Add binding descriptions for mediatek,mt8365-systimer and
mediatek,mt8365-uart
- Specify ranges with parameters for u3phy
Tested-by: Kevin Hilman <khilman@baylibre.com>
v7:
- Update GIC information in mt8365.dtsi (thanks to Marc Zyngier for
pointing out the problem)
- Adjust the timer to match the updated GIC information
v6:
- Add systimer in mt8365.dtsi
- Add I/D caches and L2 cache details in mt8365.dtsi
- Move bl31_secmon_reserved from mt8365.dtsi to mt8365-evk.dts
- Fix inconsistent indentation in mt8365-pinctrl example
- Further mt8365.dtsi cleanups
- Submit to additional maintainers spotted by get_maintainer.pl
v5:
- Reorder top-level entries in mediatek,mt8365-pinctrl.yaml to match
example-schema
- Use consistent quotes
v4:
- Remove pins-are-numbered references that have been holding things up
now that the patches removing it from dt-bindings have landed in linux-next
v3:
- Remove a number of components that are not yet supported (they will
come back alongside the corresponding drivers)
- Address issues found by dt_binding_check (mostly fixing pinctrl
bindings)
- Address issues pointed out in comments
- Reorder patches
v2:
- Add missing dt-bindings documentation
- Small cleanups addressing issues in v1 pointed out by Krzysztof Kozlowski
Bernhard Rosenkränzer (6):
dt-bindings: arm64: dts: mediatek: Add mt8365-evk board
dt-bindings: irq: mtk, sysirq: add support for mt8365
dt-bindings: mfd: syscon: Add mt8365-syscfg
dt-bindings: pinctrl: add bindings for Mediatek MT8365 SoC
dt-bindings: timer: mediatek,mtk-timer: add MT8365
dt-bindings: serial: mediatek,uart: add MT8365
Fabien Parent (3):
dt-bindings: usb: mediatek,mtu3: add MT8365 SoC bindings
dt-bindings: usb: mediatek,mtk-xhci: add MT8365 SoC bindings
arm64: dts: mediatek: Initial mt8365-evk support
.../devicetree/bindings/arm/mediatek.yaml | 4 +
.../interrupt-controller/mediatek,sysirq.txt | 1 +
.../devicetree/bindings/mfd/syscon.yaml | 1 +
.../pinctrl/mediatek,mt8365-pinctrl.yaml | 197 +++++++++
.../bindings/serial/mediatek,uart.yaml | 1 +
.../bindings/timer/mediatek,mtk-timer.txt | 1 +
.../bindings/usb/mediatek,mtk-xhci.yaml | 1 +
.../bindings/usb/mediatek,mtu3.yaml | 1 +
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 168 ++++++++
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 377 ++++++++++++++++++
11 files changed, 753 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi
--
2.39.1
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* Re: [PATCH] dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
From: Greg Kroah-Hartman @ 2023-01-25 14:35 UTC (permalink / raw)
To: Rob Herring
Cc: Krzysztof Kozlowski, David Airlie, Daniel Vetter,
Bartosz Golaszewski, Jean Delvare, Guenter Roeck, Thomas Gleixner,
Marc Zyngier, Jassi Brar, Mauro Carvalho Chehab, Lee Jones,
Ulf Hansson, Richard Weinberger, Vignesh Raghavendra,
Sebastian Reichel, Mark Brown, Rafael J. Wysocki, Daniel Lezcano,
linux-arm-kernel, dri-devel, linux-gpio, linux-hwmon, linux-media,
openbmc, linux-mmc, linux-mtd, linux-pm, alsa-devel, linux-spi,
linux-usb
In-Reply-To: <20230124230048.371144-1-robh@kernel.org>
On Tue, Jan 24, 2023 at 05:00:48PM -0600, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedProperties or additionalProperties as appropriate, and
> then add any missing properties flagged by the addition.
>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> To: David Airlie <airlied@gmail.com>
> To: Daniel Vetter <daniel@ffwll.ch>
> To: Bartosz Golaszewski <brgl@bgdev.pl>
> To: Jean Delvare <jdelvare@suse.com>
> To: Guenter Roeck <linux@roeck-us.net>
> To: Thomas Gleixner <tglx@linutronix.de>
> To: Marc Zyngier <maz@kernel.org>
> To: Jassi Brar <jassisinghbrar@gmail.com>
> To: Mauro Carvalho Chehab <mchehab@kernel.org>
> To: Lee Jones <lee@kernel.org>
> To: Ulf Hansson <ulf.hansson@linaro.org>
> To: Richard Weinberger <richard@nod.at>
> To: Vignesh Raghavendra <vigneshr@ti.com>
> To: Sebastian Reichel <sre@kernel.org>
> To: Mark Brown <broonie@kernel.org>
> To: "Rafael J. Wysocki" <rafael@kernel.org>
> To: Daniel Lezcano <daniel.lezcano@linaro.org>
> To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-gpio@vger.kernel.org
> Cc: linux-hwmon@vger.kernel.org
> Cc: linux-media@vger.kernel.org
> Cc: openbmc@lists.ozlabs.org
> Cc: linux-mmc@vger.kernel.org
> Cc: linux-mtd@lists.infradead.org
> Cc: linux-pm@vger.kernel.org
> Cc: alsa-devel@alsa-project.org
> Cc: linux-spi@vger.kernel.org
> Cc: linux-usb@vger.kernel.org
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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* [PATCH RESEND linux-next v4.1 3/4] arm64: dts: meson: move usb-hub node under dwc3 node on Odroid C4
From: Anand Moon @ 2023-01-25 14:34 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
Cc: linux-amlogic, devicetree, linux-arm-kernel, linux-kernel
In-Reply-To: <20230125143404.1424-1-linux.amoon@gmail.com>
Move the usb-hub node under dwc3 node and drop superfluous
dr_mode as it is the default in meson-g12-common.dtsi.
Fixes: 71593b2020b3 ("arm64: dts: amlogic: Used onboard usb hub reset on odroid c4")
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
.../boot/dts/amlogic/meson-sm1-odroid-c4.dts | 41 +++++++++----------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
index d04768a66bfe..a988015dd2d5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -26,30 +26,29 @@ led-blue {
sound {
model = "ODROID-C4";
};
+};
+&dwc3 {
/* USB hub supports both USB 2.0 and USB 3.0 root hub */
- usb-hub {
- dr_mode = "host";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* 2.0 hub on port 1 */
- hub_2_0: hub@1 {
- compatible = "usb2109,2817";
- reg = <1>;
- peer-hub = <&hub_3_0>;
- reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
- vdd-supply = <&vcc_5v>;
- };
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* 2.0 hub on port 1 */
+ hub_2_0: hub@1 {
+ compatible = "usb2109,2817";
+ reg = <1>;
+ peer-hub = <&hub_3_0>;
+ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&vcc_5v>;
+ };
- /* 3.1 hub on port 4 */
- hub_3_0: hub@2 {
- compatible = "usb2109,817";
- reg = <2>;
- peer-hub = <&hub_2_0>;
- reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
- vdd-supply = <&vcc_5v>;
- };
+ /* 3.1 hub on port 4 */
+ hub_3_0: hub@2 {
+ compatible = "usb2109,817";
+ reg = <2>;
+ peer-hub = <&hub_2_0>;
+ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&vcc_5v>;
};
};
--
2.38.1
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* [PATCH RESEND linux-next v4.1 2/4] arm64: dts: amlogic: Drop superfluous dr_mode in usb node on odroid c2
From: Anand Moon @ 2023-01-25 14:34 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
Cc: linux-amlogic, devicetree, linux-arm-kernel, linux-kernel
In-Reply-To: <20230125143404.1424-1-linux.amoon@gmail.com>
Drop superfluous dr_mode="host" as it is the default in meson-gxbb.dtsi
Fixes: f24859bbec8a ("arm64: dts: amlogic: Used onboard usb hub reset on odroid c2")
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index 01356437a077..70b10934a811 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -399,7 +399,6 @@ &usb0 {
};
&usb1 {
- dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
--
2.38.1
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* [PATCH RESEND linux-next v4.1 1/4] ARM: dts: amlogic: Drop superfluous dr_mode in usb node on odroid C1
From: Anand Moon @ 2023-01-25 14:34 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
Cc: linux-amlogic, devicetree, linux-arm-kernel, linux-kernel
In-Reply-To: <20230125143404.1424-1-linux.amoon@gmail.com>
Drop superfluous dr_mode="host" as it is the default in meson.dtsi
Fixes: 3325f3e4534c ("ARM: dts: amlogic: Used onboard usb hub reset to enable usb hub")
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
arch/arm/boot/dts/meson8b-odroidc1.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 941682844faf..1097b35b7a49 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -368,7 +368,6 @@ &usb1_phy {
};
&usb1 {
- dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
--
2.38.1
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* Re: [PATCH 1/2] arm64: dts: mediatek: mt7622: drop serial clock-names
From: Matthias Brugger @ 2023-01-25 14:32 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski, devicetree,
linux-arm-kernel, linux-mediatek, linux-kernel
In-Reply-To: <20230123151634.370011-1-krzysztof.kozlowski@linaro.org>
On 23/01/2023 16:16, Krzysztof Kozlowski wrote:
> The serial node does not use clock-names:
>
> mt7622-bananapi-bpi-r64.dtb: serial@1100c000: Unevaluated properties are not allowed ('clock-names' was unexpected)
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Both applied, thanks!
> ---
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index 146e18b5b1f4..62487a3c4db1 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -526,7 +526,6 @@ btif: serial@1100c000 {
> reg = <0 0x1100c000 0 0x1000>;
> interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_LOW>;
> clocks = <&pericfg CLK_PERI_BTIF_PD>;
> - clock-names = "main";
> reg-shift = <2>;
> reg-io-width = <4>;
> status = "disabled";
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