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From: Lorenzo Bianconi <lorenzo@kernel.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Ryder Lee" <ryder.lee@mediatek.com>,
	"Jianjun Wang" <jianjun.wang@mediatek.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: arm: airoha: Add the pbus-csr node for EN7581 SoC
Date: Sat, 1 Feb 2025 13:16:52 +0100	[thread overview]
Message-ID: <Z54QtFIpX6a1eBm0@lore-desk> (raw)
In-Reply-To: <20250118-sturgeon-of-incredible-endeavor-73a815@krzk-bin>

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> On Wed, Jan 15, 2025 at 06:32:30PM +0100, Lorenzo Bianconi wrote:
> > This patch adds the pbus-csr document bindings for EN7581 SoC.
> 
> Please do not use "This commit/patch/change", but imperative mood. See
> longer explanation here:
> https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

ack, I will fix it in v2

> 
> > The airoha pbus-csr block provides a configuration interface for the
> > PBUS controller used to detect if a given address is on PCIE0, PCIE1 or
> > PCIE2.
> > 
> > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> > ---
> >  .../bindings/arm/airoha,en7581-pbus-csr.yaml       | 41 ++++++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/airoha,en7581-pbus-csr.yaml b/Documentation/devicetree/bindings/arm/airoha,en7581-pbus-csr.yaml
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..80b237e195cd3607645efe3fda1eb6152134481c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/airoha,en7581-pbus-csr.yaml
> > @@ -0,0 +1,41 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/airoha,en7581-pbus-csr.yaml#
> 
> arm is only top level bindings and ARM stuff. This is soc.

in this case we should create an airoha folder in
'Documentation/devicetree/bindings/soc', correct?

> 
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Airoha Pbus CSR Controller for EN7581 SoC
> > +
> > +maintainers:
> > +  - Lorenzo Bianconi <lorenzo@kernel.org>
> > +
> > +description:
> > +  The airoha pbus-csr block provides a configuration interface for the PBUS
> > +  controller used to detect if a given address is on PCIE0, PCIE1 or PCIE2.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - airoha,en7581-pbus-csr
> 
> Does not fit standard syscon bindings?

I think standard syscon is fine. In this case we could drop this patch. Agree?

Regards,
Lorenzo

> 
> Best regards,
> Krzysztof
> 

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  reply	other threads:[~2025-02-01 12:18 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-15 17:32 [PATCH 0/2] PCI: mediatek-gen3: Set PBUS_CSR regs for Airoha EN7581 SoC Lorenzo Bianconi
2025-01-15 17:32 ` [PATCH 1/2] dt-bindings: arm: airoha: Add the pbus-csr node for " Lorenzo Bianconi
2025-01-18 15:57   ` Krzysztof Kozlowski
2025-02-01 12:16     ` Lorenzo Bianconi [this message]
2025-02-02 14:38       ` Krzysztof Kozlowski
2025-01-15 17:32 ` [PATCH 2/2] PCI: mediatek-gen3: Configure PBUS_CSR registers " Lorenzo Bianconi
2025-01-18 15:59   ` Krzysztof Kozlowski
2025-02-01 12:10     ` Lorenzo Bianconi

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