* [PATCh v3 0/3] Add i.MX943 basic dts support
@ 2025-03-13 7:16 Jacky Bai
2025-03-13 7:16 ` [PATCh v3 1/3] dt-bindings: arm: fsl: add i.MX943 EVK board Jacky Bai
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jacky Bai @ 2025-03-13 7:16 UTC (permalink / raw)
To: krzk, robh, conor+dt, shawnguo, s.hauer
Cc: kernel, festevam, devicetree, imx, linux-arm-kernel, aisheng.dong,
peng.fan, frank.li
i.MX943 is the first SoC of the i.MX94 family, all the SoCs
of this family are pin to pin compatible with only several
peripherals differance.
For i.MX943 device tree support, we split the dtsi into two
part, one for the common dtsi that shared for the i.MX94 family,
and an i.MX943 specific part.
This patchset has dependency on Frank Li's below dt binding changes for i.MX94.
those patch has been reviewed & acked.
https://lore.kernel.org/imx/20250307190816.2971810-1-Frank.Li@nxp.com/T/
https://lore.kernel.org/imx/64d7d06b-337e-498a-87dd-03ae41e6a2de@roeck-us.net/T/
https://lore.kernel.org/lkml/20250306171052.244548-1-Frank.Li@nxp.com/T/
https://lore.kernel.org/imx/20250306171013.243332-1-Frank.Li@nxp.com/T/
https://lore.kernel.org/lkml/20250306170902.241057-1-Frank.Li@nxp.com/T/
https://lore.kernel.org/imx/20250308143214.6dcc41ac@jic23-huawei/T/
https://lore.kernel.org/lkml/20250306170810.239489-1-Frank.Li@nxp.com/T/
https://lore.kernel.org/imx/20250306-immature-ether-d92fb5b8f18a@spud/T/
https://lore.kernel.org/imx/20250307-scion-comprised-03e8ea95abed@spud/T/
Jacky Bai (3):
dt-bindings: arm: fsl: add i.MX943 EVK board
arm64: dts: freescale: Add basic dtsi for imx943
arm64: dts: freescale: Add minimal dts support for imx943 evk
.../devicetree/bindings/arm/fsl.yaml | 6 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/imx94-clock.h | 195 ++
arch/arm64/boot/dts/freescale/imx94-pinfunc.h | 1570 +++++++++++++++++
arch/arm64/boot/dts/freescale/imx94-power.h | 41 +
arch/arm64/boot/dts/freescale/imx94.dtsi | 1140 ++++++++++++
arch/arm64/boot/dts/freescale/imx943-evk.dts | 196 ++
arch/arm64/boot/dts/freescale/imx943.dtsi | 148 ++
8 files changed, 3297 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx94-clock.h
create mode 100644 arch/arm64/boot/dts/freescale/imx94-pinfunc.h
create mode 100644 arch/arm64/boot/dts/freescale/imx94-power.h
create mode 100644 arch/arm64/boot/dts/freescale/imx94.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx943-evk.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx943.dtsi
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCh v3 1/3] dt-bindings: arm: fsl: add i.MX943 EVK board 2025-03-13 7:16 [PATCh v3 0/3] Add i.MX943 basic dts support Jacky Bai @ 2025-03-13 7:16 ` Jacky Bai 2025-03-13 7:16 ` [PATCh v3 3/3] arm64: dts: freescale: Add minimal dts support for imx943 evk Jacky Bai [not found] ` <20250313071628.729168-3-ping.bai@nxp.com> 2 siblings, 0 replies; 5+ messages in thread From: Jacky Bai @ 2025-03-13 7:16 UTC (permalink / raw) To: krzk, robh, conor+dt, shawnguo, s.hauer Cc: kernel, festevam, devicetree, imx, linux-arm-kernel, aisheng.dong, peng.fan, frank.li Add DT compatible string for NXP i.MX943 EVK board. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- - v3 changes: - no - v2 changes: - newly added --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index db781d315698..5b58c23d3c97 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1353,6 +1353,12 @@ properties: - fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board - const: fsl,imx93 + - description: i.MX94 based Boards + items: + - enum: + - fsl,imx943-evk # i.MX943 EVK Board + - const: fsl,imx94 + - description: i.MX95 based Boards items: - enum: -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCh v3 3/3] arm64: dts: freescale: Add minimal dts support for imx943 evk 2025-03-13 7:16 [PATCh v3 0/3] Add i.MX943 basic dts support Jacky Bai 2025-03-13 7:16 ` [PATCh v3 1/3] dt-bindings: arm: fsl: add i.MX943 EVK board Jacky Bai @ 2025-03-13 7:16 ` Jacky Bai [not found] ` <20250313071628.729168-3-ping.bai@nxp.com> 2 siblings, 0 replies; 5+ messages in thread From: Jacky Bai @ 2025-03-13 7:16 UTC (permalink / raw) To: krzk, robh, conor+dt, shawnguo, s.hauer Cc: kernel, festevam, devicetree, imx, linux-arm-kernel, aisheng.dong, peng.fan, frank.li Add the minimal board dts support for i.MX943 EVK. Only the console uart, SD & eMMC are enabled for linux basic boot. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> --- - v3 changes: - no - v2 changes: - newly added for board dts --- arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/imx943-evk.dts | 196 +++++++++++++++++++ 2 files changed, 197 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx943-evk.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index be6ef4c56fbf..b68067c97994 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -299,6 +299,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts new file mode 100644 index 000000000000..d4a204eaf5e5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2024-2025 NXP + */ + +/dts-v1/; + +#include "imx943.dtsi" + +/ { + compatible = "fsl,imx943-evk", "fsl,imx94"; + model = "NXP i.MX943 EVK board"; + + aliases { + mmc0 = &usdhc1; + mmc1 = &usdhc2; + serial0 = &lpuart1; + }; + + chosen { + stdout-path = &lpuart1; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + off-on-delay-us = <12000>; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + pinctrl-names = "default"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "VDD_SD2_3V3"; + gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x80000000 0 0x7f000000>; + reusable; + size = <0 0x10000000>; + linux,cma-default; + }; + }; + + memory@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + device_type = "memory"; + }; +}; + +&lpuart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&scmi_iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + IMX94_PAD_UART1_TXD__LPUART1_TX 0x31e + IMX94_PAD_UART1_RXD__LPUART1_RX 0x31e + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x15fe + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x13fe + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x15fe + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x13fe + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + IMX94_PAD_SD2_CD_B__GPIO4_IO20 0x31e + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp { + fsl,pins = < + IMX94_PAD_SD2_RESET_B__GPIO4_IO27 0x31e + >; + }; +}; + +&usdhc1 { + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + pinctrl-3 = <&pinctrl_usdhc1>; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + bus-width = <8>; + non-removable; + no-sdio; + no-sd; + status = "okay"; +}; + +&usdhc2 { + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + bus-width = <4>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_usdhc2_vmmc>; + fsl,cd-gpio-wakeup-disable; + status = "okay"; +}; + +&wdog3 { + fsl,ext-reset-output; + status = "okay"; +}; -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
[parent not found: <20250313071628.729168-3-ping.bai@nxp.com>]
* Re: [PATCh v3 2/3] arm64: dts: freescale: Add basic dtsi for imx943 [not found] ` <20250313071628.729168-3-ping.bai@nxp.com> @ 2025-03-14 16:42 ` Frank Li 2025-03-17 10:31 ` Jacky Bai 0 siblings, 1 reply; 5+ messages in thread From: Frank Li @ 2025-03-14 16:42 UTC (permalink / raw) To: Jacky Bai Cc: krzk, robh, conor+dt, shawnguo, s.hauer, kernel, festevam, devicetree, imx, linux-arm-kernel, aisheng.dong, peng.fan On Thu, Mar 13, 2025 at 03:16:27PM +0800, Jacky Bai wrote: > Add the minimal dtsi support for i.MX943. i.MX943 is the > first SoC of i.MX94 Family, create a common dtsi for the > whole i.MX94 family, and the specific dtsi part for i.MX943. > > The clock, power domain and perf index need to be used by > the device nodes for resource reference, add them along > with the dtsi support. > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > --- > - v3 changes: > - remove the blank line > - add PAD config macro define as suggested by Frank Li > - update the device nodes compatible strings for imx94 as suggested by Krzysztof > > - v2 changes: > - remove the unnecessary macro define in clock header as suggested by Krzysztof > - split the dtsi into imx94.dtsi and imx943.dtsi > - use low case in the pinfunc header as Frank suggested > - reorder the device nodes and properties > --- ... > + aips2: bus@42000000 { > + compatible = "fsl,aips-bus", "simple-bus"; > + reg = <0x0 0x42000000 0x0 0x800000>; > + ranges = <0x42000000 0x0 0x42000000 0x8000000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + edma2: dma-controller@42000000 { > + compatible = "fsl,imx94-edma5", "fsl,imx95-edma5"; > + reg = <0x42000000 0x210000>; > + clocks = <&scmi_clk IMX94_CLK_BUSWAKEUP>; > + clock-names = "dma"; > + #dma-cells = <3>; > + dma-channels = <64>; > + interrupts-extended = <&a55_irqsteer 0>, <&a55_irqsteer 1>, <&a55_irqsteer 2>, > + <&a55_irqsteer 3>, <&a55_irqsteer 4>, <&a55_irqsteer 5>, Does below method work? interrupt-parent = <&a55_irqsteer> interrupts = <3>, <4>, <5>, .... > + <&a55_irqsteer 6>, <&a55_irqsteer 7>, <&a55_irqsteer 8>, > + <&a55_irqsteer 9>, <&a55_irqsteer 10>, <&a55_irqsteer 11>, > + <&a55_irqsteer 12>, <&a55_irqsteer 13>, <&a55_irqsteer 14>, > + <&a55_irqsteer 15>, <&a55_irqsteer 16>, <&a55_irqsteer 17>, > + <&a55_irqsteer 18>, <&a55_irqsteer 19>, <&a55_irqsteer 20>, > + <&a55_irqsteer 21>, <&a55_irqsteer 22>, <&a55_irqsteer 23>, > + <&a55_irqsteer 24>, <&a55_irqsteer 25>, <&a55_irqsteer 26>, > + <&a55_irqsteer 27>, <&a55_irqsteer 28>, <&a55_irqsteer 29>, > + <&a55_irqsteer 30>, <&a55_irqsteer 31>, <&a55_irqsteer 64>, > + <&a55_irqsteer 65>, <&a55_irqsteer 66>, <&a55_irqsteer 67>, > + <&a55_irqsteer 68>, <&a55_irqsteer 69>, <&a55_irqsteer 70>, > + <&a55_irqsteer 71>, <&a55_irqsteer 72>, <&a55_irqsteer 73>, > + <&a55_irqsteer 74>, <&a55_irqsteer 75>, <&a55_irqsteer 76>, > + <&a55_irqsteer 77>, <&a55_irqsteer 78>, <&a55_irqsteer 79>, > + <&a55_irqsteer 80>, <&a55_irqsteer 81>, <&a55_irqsteer 82>, > + <&a55_irqsteer 83>, <&a55_irqsteer 84>, <&a55_irqsteer 85>, > + <&a55_irqsteer 86>, <&a55_irqsteer 87>, <&a55_irqsteer 88>, > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a55"; > + reg = <0x0>; I remember compatible is first property, then reg. Frank > + enable-method = "psci"; > + #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > + power-domains = <&scmi_perf IMX94_PERF_A55>; > + power-domain-names = "perf"; > + i-cache-size = <32768>; > + i-cache-line-size = <64>; > + i-cache-sets = <128>; > + d-cache-size = <32768>; > + d-cache-line-size = <64>; > + d-cache-sets = <128>; > + next-level-cache = <&l2_cache_l0>; > + }; > + > + cpu1: cpu@100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a55"; > + reg = <0x100>; > + enable-method = "psci"; > + #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > + power-domains = <&scmi_perf IMX94_PERF_A55>; > + power-domain-names = "perf"; > + i-cache-size = <32768>; > + i-cache-line-size = <64>; > + i-cache-sets = <128>; > + d-cache-size = <32768>; > + d-cache-line-size = <64>; > + d-cache-sets = <128>; > + next-level-cache = <&l2_cache_l1>; > + }; > + > + cpu2: cpu@200 { > + device_type = "cpu"; > + compatible = "arm,cortex-a55"; > + reg = <0x200>; > + enable-method = "psci"; > + #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > + power-domains = <&scmi_perf IMX94_PERF_A55>; > + power-domain-names = "perf"; > + i-cache-size = <32768>; > + i-cache-line-size = <64>; > + i-cache-sets = <128>; > + d-cache-size = <32768>; > + d-cache-line-size = <64>; > + d-cache-sets = <128>; > + next-level-cache = <&l2_cache_l2>; > + }; > + > + cpu3: cpu@300 { > + device_type = "cpu"; > + compatible = "arm,cortex-a55"; > + reg = <0x300>; > + enable-method = "psci"; > + #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > + power-domains = <&scmi_perf IMX94_PERF_A55>; > + power-domain-names = "perf"; > + i-cache-size = <32768>; > + i-cache-line-size = <64>; > + i-cache-sets = <128>; > + d-cache-size = <32768>; > + d-cache-line-size = <64>; > + d-cache-sets = <128>; > + next-level-cache = <&l2_cache_l3>; > + }; > + > + l2_cache_l0: l2-cache-l0 { > + compatible = "cache"; > + cache-size = <65536>; > + cache-line-size = <64>; > + cache-sets = <256>; > + cache-level = <2>; > + cache-unified; > + next-level-cache = <&l3_cache>; > + }; > + > + l2_cache_l1: l2-cache-l1 { > + compatible = "cache"; > + cache-size = <65536>; > + cache-line-size = <64>; > + cache-sets = <256>; > + cache-level = <2>; > + cache-unified; > + next-level-cache = <&l3_cache>; > + }; > + > + l2_cache_l2: l2-cache-l2 { > + compatible = "cache"; > + cache-size = <65536>; > + cache-line-size = <64>; > + cache-sets = <256>; > + cache-level = <2>; > + cache-unified; > + next-level-cache = <&l3_cache>; > + }; > + > + l2_cache_l3: l2-cache-l3 { > + compatible = "cache"; > + cache-size = <65536>; > + cache-line-size = <64>; > + cache-sets = <256>; > + cache-level = <2>; > + cache-unified; > + next-level-cache = <&l3_cache>; > + }; > + > + l3_cache: l3-cache { > + compatible = "cache"; > + cache-size = <1048576>; > + cache-line-size = <64>; > + cache-sets = <1024>; > + cache-level = <3>; > + cache-unified; > + }; > + }; > +}; > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCh v3 2/3] arm64: dts: freescale: Add basic dtsi for imx943 2025-03-14 16:42 ` [PATCh v3 2/3] arm64: dts: freescale: Add basic dtsi for imx943 Frank Li @ 2025-03-17 10:31 ` Jacky Bai 0 siblings, 0 replies; 5+ messages in thread From: Jacky Bai @ 2025-03-17 10:31 UTC (permalink / raw) To: Frank Li Cc: krzk@kernel.org, robh@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Aisheng Dong, Peng Fan > Subject: Re: [PATCh v3 2/3] arm64: dts: freescale: Add basic dtsi for imx943 > > On Thu, Mar 13, 2025 at 03:16:27PM +0800, Jacky Bai wrote: > > Add the minimal dtsi support for i.MX943. i.MX943 is the first SoC of > > i.MX94 Family, create a common dtsi for the whole i.MX94 family, and > > the specific dtsi part for i.MX943. > > > > The clock, power domain and perf index need to be used by the device > > nodes for resource reference, add them along with the dtsi support. > > > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > > --- > > - v3 changes: > > - remove the blank line > > - add PAD config macro define as suggested by Frank Li > > - update the device nodes compatible strings for imx94 as suggested > > by Krzysztof > > > > - v2 changes: > > - remove the unnecessary macro define in clock header as suggested by > Krzysztof > > - split the dtsi into imx94.dtsi and imx943.dtsi > > - use low case in the pinfunc header as Frank suggested > > - reorder the device nodes and properties > > --- > ... > > + aips2: bus@42000000 { > > + compatible = "fsl,aips-bus", "simple-bus"; > > + reg = <0x0 0x42000000 0x0 0x800000>; > > + ranges = <0x42000000 0x0 0x42000000 0x8000000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + edma2: dma-controller@42000000 { > > + compatible = "fsl,imx94-edma5", "fsl,imx95-edma5"; > > + reg = <0x42000000 0x210000>; > > + clocks = <&scmi_clk IMX94_CLK_BUSWAKEUP>; > > + clock-names = "dma"; > > + #dma-cells = <3>; > > + dma-channels = <64>; > > + interrupts-extended = <&a55_irqsteer 0>, <&a55_irqsteer > 1>, <&a55_irqsteer 2>, > > + <&a55_irqsteer 3>, <&a55_irqsteer 4>, > <&a55_irqsteer 5>, > > Does below method work? > > interrupt-parent = <&a55_irqsteer> > interrupts = <3>, <4>, <5>, .... > edma driver can not parse the irq correctly. The err irq is connected to GIC, not irqsteer. > > + <&a55_irqsteer 6>, <&a55_irqsteer 7>, > <&a55_irqsteer 8>, > > + <&a55_irqsteer 9>, <&a55_irqsteer 10>, > <&a55_irqsteer 11>, > > + <&a55_irqsteer 12>, <&a55_irqsteer 13>, > <&a55_irqsteer 14>, > > + <&a55_irqsteer 15>, <&a55_irqsteer 16>, > <&a55_irqsteer 17>, > > + <&a55_irqsteer 18>, <&a55_irqsteer 19>, > <&a55_irqsteer 20>, > > + <&a55_irqsteer 21>, <&a55_irqsteer 22>, > <&a55_irqsteer 23>, > > + <&a55_irqsteer 24>, <&a55_irqsteer 25>, > <&a55_irqsteer 26>, > > + <&a55_irqsteer 27>, <&a55_irqsteer 28>, > <&a55_irqsteer 29>, > > + <&a55_irqsteer 30>, <&a55_irqsteer 31>, > <&a55_irqsteer 64>, > > + <&a55_irqsteer 65>, <&a55_irqsteer 66>, > <&a55_irqsteer 67>, > > + <&a55_irqsteer 68>, <&a55_irqsteer 69>, > <&a55_irqsteer 70>, > > + <&a55_irqsteer 71>, <&a55_irqsteer 72>, > <&a55_irqsteer 73>, > > + <&a55_irqsteer 74>, <&a55_irqsteer 75>, > <&a55_irqsteer 76>, > > + <&a55_irqsteer 77>, <&a55_irqsteer 78>, > <&a55_irqsteer 79>, > > + <&a55_irqsteer 80>, <&a55_irqsteer 81>, > <&a55_irqsteer 82>, > > + <&a55_irqsteer 83>, <&a55_irqsteer 84>, > <&a55_irqsteer 85>, > > + <&a55_irqsteer 86>, <&a55_irqsteer 87>, > <&a55_irqsteer 88>, > > > + cpu0: cpu@0 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a55"; > > + reg = <0x0>; > > I remember compatible is first property, then reg. > Will change it as you suggested if no other comments for the order of device type and compatible. BR > Frank > > + enable-method = "psci"; > > + #cooling-cells = <2>; > > + cpu-idle-states = <&cpu_pd_wait>; > > + power-domains = <&scmi_perf IMX94_PERF_A55>; > > + power-domain-names = "perf"; > > + i-cache-size = <32768>; > > + i-cache-line-size = <64>; > > + i-cache-sets = <128>; > > + d-cache-size = <32768>; > > + d-cache-line-size = <64>; > > + d-cache-sets = <128>; > > + next-level-cache = <&l2_cache_l0>; > > + }; > > + > > + cpu1: cpu@100 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a55"; > > + reg = <0x100>; > > + enable-method = "psci"; > > + #cooling-cells = <2>; > > + cpu-idle-states = <&cpu_pd_wait>; > > + power-domains = <&scmi_perf IMX94_PERF_A55>; > > + power-domain-names = "perf"; > > + i-cache-size = <32768>; > > + i-cache-line-size = <64>; > > + i-cache-sets = <128>; > > + d-cache-size = <32768>; > > + d-cache-line-size = <64>; > > + d-cache-sets = <128>; > > + next-level-cache = <&l2_cache_l1>; > > + }; > > + > > + cpu2: cpu@200 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a55"; > > + reg = <0x200>; > > + enable-method = "psci"; > > + #cooling-cells = <2>; > > + cpu-idle-states = <&cpu_pd_wait>; > > + power-domains = <&scmi_perf IMX94_PERF_A55>; > > + power-domain-names = "perf"; > > + i-cache-size = <32768>; > > + i-cache-line-size = <64>; > > + i-cache-sets = <128>; > > + d-cache-size = <32768>; > > + d-cache-line-size = <64>; > > + d-cache-sets = <128>; > > + next-level-cache = <&l2_cache_l2>; > > + }; > > + > > + cpu3: cpu@300 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a55"; > > + reg = <0x300>; > > + enable-method = "psci"; > > + #cooling-cells = <2>; > > + cpu-idle-states = <&cpu_pd_wait>; > > + power-domains = <&scmi_perf IMX94_PERF_A55>; > > + power-domain-names = "perf"; > > + i-cache-size = <32768>; > > + i-cache-line-size = <64>; > > + i-cache-sets = <128>; > > + d-cache-size = <32768>; > > + d-cache-line-size = <64>; > > + d-cache-sets = <128>; > > + next-level-cache = <&l2_cache_l3>; > > + }; > > + > > + l2_cache_l0: l2-cache-l0 { > > + compatible = "cache"; > > + cache-size = <65536>; > > + cache-line-size = <64>; > > + cache-sets = <256>; > > + cache-level = <2>; > > + cache-unified; > > + next-level-cache = <&l3_cache>; > > + }; > > + > > + l2_cache_l1: l2-cache-l1 { > > + compatible = "cache"; > > + cache-size = <65536>; > > + cache-line-size = <64>; > > + cache-sets = <256>; > > + cache-level = <2>; > > + cache-unified; > > + next-level-cache = <&l3_cache>; > > + }; > > + > > + l2_cache_l2: l2-cache-l2 { > > + compatible = "cache"; > > + cache-size = <65536>; > > + cache-line-size = <64>; > > + cache-sets = <256>; > > + cache-level = <2>; > > + cache-unified; > > + next-level-cache = <&l3_cache>; > > + }; > > + > > + l2_cache_l3: l2-cache-l3 { > > + compatible = "cache"; > > + cache-size = <65536>; > > + cache-line-size = <64>; > > + cache-sets = <256>; > > + cache-level = <2>; > > + cache-unified; > > + next-level-cache = <&l3_cache>; > > + }; > > + > > + l3_cache: l3-cache { > > + compatible = "cache"; > > + cache-size = <1048576>; > > + cache-line-size = <64>; > > + cache-sets = <1024>; > > + cache-level = <3>; > > + cache-unified; > > + }; > > + }; > > +}; > > -- > > 2.34.1 > > ^ permalink raw reply [flat|nested] 5+ messages in thread
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2025-03-13 7:16 [PATCh v3 0/3] Add i.MX943 basic dts support Jacky Bai
2025-03-13 7:16 ` [PATCh v3 1/3] dt-bindings: arm: fsl: add i.MX943 EVK board Jacky Bai
2025-03-13 7:16 ` [PATCh v3 3/3] arm64: dts: freescale: Add minimal dts support for imx943 evk Jacky Bai
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2025-03-14 16:42 ` [PATCh v3 2/3] arm64: dts: freescale: Add basic dtsi for imx943 Frank Li
2025-03-17 10:31 ` Jacky Bai
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