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From: Mark Rutland <mark.rutland@arm.com>
To: Gowthami Thiagarajan <gthiagarajan@marvell.com>
Cc: "will@kernel.org" <will@kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Sunil Kovvuri Goutham <sgoutham@marvell.com>,
	Bharat Bhushan <bbhushan2@marvell.com>,
	George Cherian <gcherian@marvell.com>,
	Linu Cherian <lcherian@marvell.com>
Subject: Re: [PATCH 3/6] perf/marvell : Odyssey LLC-TAD performance monitor support
Date: Tue, 15 Aug 2023 14:24:15 +0100	[thread overview]
Message-ID: <ZNt8f1Ui13SoxOUT@FVFF77S0Q05N> (raw)
In-Reply-To: <SN1PR18MB21262B71F310B0AF33C2D2EFDB11A@SN1PR18MB2126.namprd18.prod.outlook.com>

On Sat, Aug 12, 2023 at 01:51:00PM +0000, Gowthami Thiagarajan wrote:
> > -----Original Message-----
> > From: Mark Rutland <mark.rutland@arm.com>
> > Sent: Friday, July 28, 2023 9:08 PM
> > To: Gowthami Thiagarajan <gthiagarajan@marvell.com>
> > Cc: will@kernel.org; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Sunil Kovvuri
> > Goutham <sgoutham@marvell.com>; Bharat Bhushan <bbhushan2@marvell.com>; George Cherian
> > <gcherian@marvell.com>; Linu Cherian <lcherian@marvell.com>
> > Subject: [EXT] Re: [PATCH 3/6] perf/marvell : Odyssey LLC-TAD performance monitor support
> > 
> > External Email
> > 
> > ----------------------------------------------------------------------
> > On Fri, Jun 30, 2023 at 05:33:48PM +0530, Gowthami Thiagarajan wrote:

> > > +static int tad_pmu_event_counter_add(struct perf_event *event, int flags)
> > > +{

> > > +	if (!event->attr.disabled)
> > > +		return -EINVAL;
> > 
> > Why?
> Just checks the default disabled attribute.

Why does it matter?

What's the problem with opening an event which is *not* disabled?

[...]

> > > +static int tad_pmu_probe(struct platform_device *pdev)
> > > +{
> > > +	struct device *dev = &pdev->dev;
> > > +	struct tad_region *regions;
> > > +	struct tad_pmu *tad_pmu;
> > > +	struct resource *res;
> > > +	u32 tad_pmu_page_size;
> > > +	u32 tad_page_size;
> > > +	u32 tad_cnt;
> > > +	int i, ret;
> > > +	char *name;
> > > +
> > > +	tad_pmu = devm_kzalloc(&pdev->dev, sizeof(*tad_pmu), GFP_KERNEL);
> > > +	if (!tad_pmu)
> > > +		return -ENOMEM;
> > > +
> > > +	platform_set_drvdata(pdev, tad_pmu);
> > > +
> > > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > > +	if (!res) {
> > > +		dev_err(&pdev->dev, "Mem resource not found\n");
> > > +		return -ENODEV;
> > > +	}
> > > +
> > > +	ret = device_property_read_u32(dev, "marvell,tad-page-size", &tad_page_size);
> > > +	if (ret) {
> > > +		dev_err(&pdev->dev, "Can't find tad-page-size property\n");
> > > +		return ret;
> > > +	}
> > > +
> > > +	ret = device_property_read_u32(dev, "marvell,tad-pmu-page-size",
> > > +				       &tad_pmu_page_size);
> > > +	if (ret) {
> > > +		dev_err(&pdev->dev, "Can't find tad-pmu-page-size property\n");
> > > +		return ret;
> > > +	}
> > 
> > Why do you think these properties are necessary?
> > 
> > These should almost certainly be provided by IO resources, and shouldn't need a
> > custom property.
> 
> IO resources don't provide all the information in this case. Need to vary these values
> at different boot times. So, kept these custom properties.

I think the only rason the information is missing is that your DT binding isn't quite right.

Later on you do:

+       for (i = 0; i < tad_cnt && res->start < res->end; i++) {
+               regions[i].base = devm_ioremap(&pdev->dev,
+                                              res->start,
+                                              tad_pmu_page_size);
+               if (IS_ERR(regions[i].base)) {
+                       dev_err(&pdev->dev, "TAD%d ioremap fail\n", i);
+                       return -ENOMEM;
+               }
+               res->start += tad_page_size;
+       }

... which means you're splitting one reg entry into multiple mappings, whereas
you could have multiple reg entries, one per TAD page.

Thanks,
Mark.

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  parent reply	other threads:[~2023-08-15 13:24 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-30 12:03 [PATCH 0/6] Marvell Odyssey uncore performance monitor support Gowthami Thiagarajan
2023-06-30 12:03 ` [PATCH 1/6] perf/marvell: Marvell PEM " Gowthami Thiagarajan
2023-07-28 15:01   ` Mark Rutland
2023-08-12  3:43     ` [EXT] " Gowthami Thiagarajan
2023-06-30 12:03 ` [PATCH 2/6] dt-bindings: perf: marvell: Add YAML schemas for Marvell PEM pmu Gowthami Thiagarajan
2023-07-02  9:25   ` Krzysztof Kozlowski
2023-07-28 15:23   ` Mark Rutland
2023-06-30 12:03 ` [PATCH 3/6] perf/marvell : Odyssey LLC-TAD performance monitor support Gowthami Thiagarajan
2023-07-28 15:38   ` Mark Rutland
2023-08-12 13:51     ` Gowthami Thiagarajan
2023-08-15  9:58       ` Will Deacon
2023-08-15 13:24       ` Mark Rutland [this message]
2023-08-17 13:26         ` [EXT] " Gowthami Thiagarajan
2023-06-30 12:03 ` [PATCH 4/6] dt-bindings: perf: marvell: Add YAML schemas for Marvell Odyssey LLC-TAD pmu Gowthami Thiagarajan
2023-07-02  9:26   ` Krzysztof Kozlowski
2023-08-12  3:33     ` [EXT] " Gowthami Thiagarajan
2023-06-30 12:03 ` [PATCH 5/6] perf/marvell: Odyssey DDR Performance monitor support Gowthami Thiagarajan
2023-06-30 12:03 ` [PATCH 6/6] dt-bindings: Add YAML schemas for Marvell Odyssey DDR PMU Gowthami Thiagarajan
2023-07-02  9:27   ` Krzysztof Kozlowski

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