[PATCH 1/1] dt-bindings: PCI: host-generic-pci: Increase maxItems to 8 of ranges

[PATCH 1/1] dt-bindings: PCI: host-generic-pci: Increase maxItems to 8 of ranges

[Frank Li]

IEEE Std 1275-1994 is Inactive-Withdrawn Standard according to
https://standards.ieee.org/ieee/1275/1932/.

"require at least one non-prefetchable memory and One or both of
prefetchable Memory and IO Space may also be provided". But it does not
limit maximum ranges number is 3.

Inscrease maximum to 8 because freescale ls1028 and iMX95 use more than
3 ranges.

Fix below CHECK_DTBS warning.
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb: pcie@1f0000000: ranges: [[2181038080, 1, 4160749568, 1, 4160749568, 0, 1441792], [3254779904, 1, 4162191360, 1, 4162191360, 0, 458752], [2181038080, 1, 4162650112, 1, 4162650112, 0, 131072], [3254779904, 1, 4162781184, 1, 4162781184, 0, 131072], [2181038080, 1, 4162912256, 1, 4162912256, 0, 131072], [3254779904, 1, 4163043328, 1, 4163043328, 0, 131072], [2181038080, 1, 4227858432, 1, 4227858432, 0, 4194304]] is too long

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
index 3484e0b4b412e..506eed7f6c63d 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
@@ -103,7 +103,7 @@ properties:
       definition of non-prefetchable memory. One or both of prefetchable Memory
       and IO Space may also be provided.
     minItems: 1
-    maxItems: 3
+    maxItems: 8
 
   dma-coherent: true
   iommu-map: true
-- 
2.34.1

Re: [PATCH 1/1] dt-bindings: PCI: host-generic-pci: Increase maxItems to 8 of ranges

[Bjorn Helgaas]

On Tue, Jul 02, 2024 at 11:37:02AM -0400, Frank Li wrote:
> IEEE Std 1275-1994 is Inactive-Withdrawn Standard according to
> https://standards.ieee.org/ieee/1275/1932/.

I'm not quite sure what the connection is?  Is the sentence below a
quote from the spec above?  Perhaps include the section number it came
from?

> "require at least one non-prefetchable memory and One or both of
> prefetchable Memory and IO Space may also be provided". But it does not
> limit maximum ranges number is 3.

"But IEEE Std 1275-1994 does not limit maximum ranges to 3"?

> Inscrease maximum to 8 because freescale ls1028 and iMX95 use more than
> 3 ranges.

s/Inscrease/Increase/

> Fix below CHECK_DTBS warning.
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb: pcie@1f0000000: ranges: [[2181038080, 1, 4160749568, 1, 4160749568, 0, 1441792], [3254779904, 1, 4162191360, 1, 4162191360, 0, 458752], [2181038080, 1, 4162650112, 1, 4162650112, 0, 131072], [3254779904, 1, 4162781184, 1, 4162781184, 0, 131072], [2181038080, 1, 4162912256, 1, 4162912256, 0, 131072], [3254779904, 1, 4163043328, 1, 4163043328, 0, 131072], [2181038080, 1, 4227858432, 1, 4227858432, 0, 4194304]] is too long
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
> index 3484e0b4b412e..506eed7f6c63d 100644
> --- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
> +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
> @@ -103,7 +103,7 @@ properties:
>        definition of non-prefetchable memory. One or both of prefetchable Memory
>        and IO Space may also be provided.
>      minItems: 1
> -    maxItems: 3
> +    maxItems: 8
>  
>    dma-coherent: true
>    iommu-map: true
> -- 
> 2.34.1
> 

Re: [PATCH 1/1] dt-bindings: PCI: host-generic-pci: Increase maxItems to 8 of ranges

[Frank Li]

On Tue, Jul 02, 2024 at 11:43:50AM -0500, Bjorn Helgaas wrote:
> On Tue, Jul 02, 2024 at 11:37:02AM -0400, Frank Li wrote:
> > IEEE Std 1275-1994 is Inactive-Withdrawn Standard according to
> > https://standards.ieee.org/ieee/1275/1932/.
> 
> I'm not quite sure what the connection is?  Is the sentence below a
> quote from the spec above?  Perhaps include the section number it came
> from?

I quote from original yaml file. This spec is not free. I can't access
this spec so far. But I think limited to 3 is not reasonable.

Frank Li

> 
> > "require at least one non-prefetchable memory and One or both of
> > prefetchable Memory and IO Space may also be provided". But it does not
> > limit maximum ranges number is 3.
> 
> "But IEEE Std 1275-1994 does not limit maximum ranges to 3"?
> 
> > Inscrease maximum to 8 because freescale ls1028 and iMX95 use more than
> > 3 ranges.
> 
> s/Inscrease/Increase/
> 
> > Fix below CHECK_DTBS warning.
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb: pcie@1f0000000: ranges: [[2181038080, 1, 4160749568, 1, 4160749568, 0, 1441792], [3254779904, 1, 4162191360, 1, 4162191360, 0, 458752], [2181038080, 1, 4162650112, 1, 4162650112, 0, 131072], [3254779904, 1, 4162781184, 1, 4162781184, 0, 131072], [2181038080, 1, 4162912256, 1, 4162912256, 0, 131072], [3254779904, 1, 4163043328, 1, 4163043328, 0, 131072], [2181038080, 1, 4227858432, 1, 4227858432, 0, 4194304]] is too long
> > 
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> >  Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
> > index 3484e0b4b412e..506eed7f6c63d 100644
> > --- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
> > +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
> > @@ -103,7 +103,7 @@ properties:
> >        definition of non-prefetchable memory. One or both of prefetchable Memory
> >        and IO Space may also be provided.
> >      minItems: 1
> > -    maxItems: 3
> > +    maxItems: 8
> >  
> >    dma-coherent: true
> >    iommu-map: true
> > -- 
> > 2.34.1
> > 

Re: [PATCH 1/1] dt-bindings: PCI: host-generic-pci: Increase maxItems to 8 of ranges

[Rob Herring]

On Tue, Jul 2, 2024 at 9:37 AM Frank Li <Frank.Li@nxp.com> wrote:
>
> IEEE Std 1275-1994 is Inactive-Withdrawn Standard according to
> https://standards.ieee.org/ieee/1275/1932/.

That has nothing to do with this.

> "require at least one non-prefetchable memory and One or both of
> prefetchable Memory and IO Space may also be provided". But it does not
> limit maximum ranges number is 3.

3 was just my poor assumption that a non-prefetch, prefetchable and IO
region would be enough. Not sure why you'd want multiple fragmented
regions though. I guess for device assignment based on the comments.

> Inscrease maximum to 8 because freescale ls1028 and iMX95 use more than
> 3 ranges.

Unless there is some actual limit, I would just drop the minItems and
maxItems here. Then it will be limited to 32 entries in
pci-bus-common.yaml (in dtschema) which is also a 'should be enough'
value.

Rob

Re: [PATCH 1/1] dt-bindings: PCI: host-generic-pci: Increase maxItems to 8 of ranges

[Frank Li]

On Wed, Jul 03, 2024 at 11:26:14AM -0600, Rob Herring wrote:
> On Tue, Jul 2, 2024 at 9:37 AM Frank Li <Frank.Li@nxp.com> wrote:
> >
> > IEEE Std 1275-1994 is Inactive-Withdrawn Standard according to
> > https://standards.ieee.org/ieee/1275/1932/.
> 
> That has nothing to do with this.
> 
> > "require at least one non-prefetchable memory and One or both of
> > prefetchable Memory and IO Space may also be provided". But it does not
> > limit maximum ranges number is 3.
> 
> 3 was just my poor assumption that a non-prefetch, prefetchable and IO
> region would be enough. Not sure why you'd want multiple fragmented
> regions though. I guess for device assignment based on the comments.

ENETC is embeded PCI device, hardware address space layout is fragment.

Frank

> 
> > Inscrease maximum to 8 because freescale ls1028 and iMX95 use more than
> > 3 ranges.
> 
> Unless there is some actual limit, I would just drop the minItems and
> maxItems here. Then it will be limited to 32 entries in
> pci-bus-common.yaml (in dtschema) which is also a 'should be enough'
> value.
> 
> Rob