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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Keerthy <j-keerthy@ti.com>, <robh+dt@kernel.org>, <nm@ti.com>,
	<conor+dt@kernel.org>, <kristo@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <u-kumar1@ti.com>, <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
Date: Tue, 3 Oct 2023 12:18:26 +0530	[thread overview]
Message-ID: <a8749e98-7ead-939e-6fa6-35779593a5f4@ti.com> (raw)
In-Reply-To: <20230927023357.9883-5-j-keerthy@ti.com>



On 27/09/23 08:03, Keerthy wrote:
> +	/*
> +	 * The following RTI instances are coupled with MCU R5Fs, c7x and
> +	 * GPU so keeping them disabled as these will be used by their
> +	 * respective firmware
> +	 */
> +	watchdog16: watchdog@2300000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2300000 0x00 0x100>;
> +		clocks = <&k3_clks 356 1>;
> +		power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 356 0>;
> +		assigned-clock-parents = <&k3_clks 356 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog17: watchdog@2310000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2310000 0x00 0x100>;
> +		clocks = <&k3_clks 357 1>;
> +		power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 357 0>;
> +		assigned-clock-parents = <&k3_clks 357 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog18: watchdog@2320000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2320000 0x00 0x100>;
> +		clocks = <&k3_clks 358 1>;
> +		power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 358 0>;
> +		assigned-clock-parents = <&k3_clks 358 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog19: watchdog@2330000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2330000 0x00 0x100>;
> +		clocks = <&k3_clks 359 1>;
> +		power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 359 0>;
> +		assigned-clock-parents = <&k3_clks 359 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog15: watchdog@22f0000 {


I understand you are arranging based on Firmware Device ID. But these
numbers don't have much meaning when user maps to TRM. So, I suggest
nodes to be arranged by TRM numbering or ascending order of register
address so that its easier for end user to map the nodes to IP  instance
in TRM.

> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x22f0000 0x00 0x100>;
> +		clocks = <&k3_clks 360 1>;
> +		power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 360 0>;
> +		assigned-clock-parents = <&k3_clks 360 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog28: watchdog@23c0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23c0000 0x00 0x100>;
> +		clocks = <&k3_clks 361 1>;
> +		power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 361 0>;
> +		assigned-clock-parents = <&k3_clks 361 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog29: watchdog@23d0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23d0000 0x00 0x100>;
> +		clocks = <&k3_clks 362 1>;
> +		power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 362 0>;
> +		assigned-clock-parents = <&k3_clks 362 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog30: watchdog@23e0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23e0000 0x00 0x100>;
> +		clocks = <&k3_clks 363 1>;
> +		power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 363 0>;
> +		assigned-clock-parents = <&k3_clks 363 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog31: watchdog@23f0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23f0000 0x00 0x100>;
> +		clocks = <&k3_clks 364 1>;
> +		power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 364 0>;
> +		assigned-clock-parents = <&k3_clks 364 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog32: watchdog@2540000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2540000 0x00 0x100>;
> +		clocks = <&k3_clks 365 1>;
> +		power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 365 0>;
> +		assigned-clock-parents = <&k3_clks 366 4>;
> +		status = "disabled";
> +	};
> +
> +	watchdog33: watchdog@2550000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2550000 0x00 0x100>;
> +		clocks = <&k3_clks 366 1>;
> +		power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 366 0>;
> +		assigned-clock-parents = <&k3_clks 366 4>;
> +		status = "disabled";
> +	};
>  };
> -- 2.17.1

-- 
Regards
Vignesh

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  reply	other threads:[~2023-10-03  6:49 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-27  2:33 [PATCH v6 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
2023-09-27  2:33 ` [PATCH v6 1/7] arm64: dts: ti: k3-j721s2: Add ESM instances Keerthy
2023-10-03  6:50   ` Vignesh Raghavendra
2023-10-05  1:15     ` J, KEERTHY
2023-09-27  2:33 ` [PATCH v6 2/7] arm64: dts: ti: k3-j784s4: " Keerthy
2023-10-03  6:50   ` Vignesh Raghavendra
2023-10-05  1:15     ` J, KEERTHY
2023-10-05 11:15       ` Nishanth Menon
2023-10-05 12:31         ` J, KEERTHY
2023-09-27  2:33 ` [PATCH v6 3/7] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance Keerthy
2023-09-27  2:33 ` [PATCH v6 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances Keerthy
2023-10-03  6:48   ` Vignesh Raghavendra [this message]
2023-10-05  1:17     ` J, KEERTHY
2023-09-27  2:33 ` [PATCH v6 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the mcu " Keerthy
2023-09-27  2:33 ` [PATCH v6 6/7] arm64: dts: ti: k3-j721s2-main: Add the main " Keerthy
2023-09-27  2:33 ` [PATCH v6 7/7] dts: ti: k3-j712s2-mcu: Add the mcu " Keerthy
2023-09-27  7:53   ` Krzysztof Kozlowski
2023-09-27  8:16     ` J, KEERTHY
2023-09-27  8:25       ` J, KEERTHY

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