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From: Niklas Cassel <cassel@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Wilfred Mallawa" <wilfred.mallawa@wdc.com>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Laszlo Fiat" <laszlo.fiat@proton.me>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready
Date: Thu, 12 Jun 2025 13:40:23 +0200	[thread overview]
Message-ID: <aEq8pxE45PmeXN_W@ryzen> (raw)
In-Reply-To: <20250612113827.GA894522@bhelgaas>

On Thu, Jun 12, 2025 at 06:38:27AM -0500, Bjorn Helgaas wrote:
> On Thu, Jun 12, 2025 at 01:19:45PM +0200, Niklas Cassel wrote:
> > On Wed, Jun 11, 2025 at 04:14:56PM -0500, Bjorn Helgaas wrote:
> > > On Wed, Jun 11, 2025 at 12:51:42PM +0200, Niklas Cassel wrote:
> > > > Commit ec9fd499b9c6 ("PCI: dw-rockchip: Don't wait for link since we can
> > > > detect Link Up") changed so that we no longer call dw_pcie_wait_for_link(),
> > > > and instead enumerate the bus directly after receiving the Link Up IRQ.
> > > > 
> > > > This means that there is no longer any delay between link up and the bus
> > > > getting enumerated.
> 
> > > I think the comment at the PCIE_T_RRS_READY_MS definition should be
> > > enough (although it might need to be updated to mention link-up).
> > > This delay is going to be a standard piece of every driver, so it
> > > won't require special notice.
> > 
> > Looking at pci.h, we already have a comment mentioning exactly this
> > (link-up):
> > https://github.com/torvalds/linux/blob/v6.16-rc1/drivers/pci/pci.h#L51-L63
> > 
> > I will change the patches to use PCIE_RESET_CONFIG_DEVICE_WAIT_MS instead.
> 
> I'll more closely later, but I think PCIE_T_RRS_READY_MS and
> PCIE_RESET_CONFIG_DEVICE_WAIT_MS are duplicates and only one should
> exist.  It looks like they got merged at about the same time by
> different people, so we didn't notice.

I came to the same conclusion, I will send a patch to remove
PCIE_T_RRS_READY_MS and convert the only existing user to use
PCIE_RESET_CONFIG_DEVICE_WAIT_MS.


Kind regards,
Niklas


  reply	other threads:[~2025-06-12 13:19 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-11 10:51 [PATCH 0/4] PCI: dwc: Do not enumerate bus before endpoint devices are ready Niklas Cassel
2025-06-11 10:51 ` [PATCH 1/4] PCI: dw-rockchip: " Niklas Cassel
2025-06-11 12:33   ` Damien Le Moal
2025-06-11 21:14   ` Bjorn Helgaas
2025-06-12 11:19     ` Niklas Cassel
2025-06-12 11:38       ` Bjorn Helgaas
2025-06-12 11:40         ` Niklas Cassel [this message]
2025-06-12 12:21           ` Bjorn Helgaas
2025-06-12 13:00             ` Manivannan Sadhasivam
2025-06-12 14:44               ` Bjorn Helgaas
2025-06-12 15:03                 ` Manivannan Sadhasivam
2025-06-12 15:24                   ` Bjorn Helgaas
2025-06-12 16:51                     ` Manivannan Sadhasivam
  -- strict thread matches above, loose matches on Subject: below --
2025-05-05  9:26 [PATCH 0/4] PCI: dwc: Link Up IRQ fixes Niklas Cassel
2025-05-05  9:26 ` [PATCH 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready Niklas Cassel
2025-05-05 14:09   ` Niklas Cassel

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