[PATCH v2 0/2] perf vendor events arm64 AmpereOneX/AmpereOne: Fix typo in l1d_cache_access_prefetches and a few typos in metrics descriptions

[PATCH v2 0/2] perf vendor events arm64 AmpereOneX/AmpereOne: Fix typo in l1d_cache_access_prefetches and a few typos in metrics descriptions

[Ilkka Koskinen]

* Fix a typo in AmpereOneX metrics name ("l1d_cache_access_prefetces")
* Fix a few typos in AmpereOneX and AmpereOne metrics

v2: Add a patch to fix AmpereOne typos

v1: https://lore.kernel.org/all/20250909210120.9823-1-ilkka@os.amperecomputing.com/

Ilkka Koskinen (2):
  perf vendor events arm64 AmpereOneX: Fix typo - should be
    l1d_cache_access_prefetches
  perf vendor events arm64 AmpereOne: Fix typos in metrics' descriptions

 .../arch/arm64/ampere/ampereone/metrics.json           |  8 ++++----
 .../arch/arm64/ampere/ampereonex/metrics.json          | 10 +++++-----
 2 files changed, 9 insertions(+), 9 deletions(-)

-- 
2.51.0

[PATCH v2 1/2] perf vendor events arm64 AmpereOneX: Fix typo - should be l1d_cache_access_prefetches

[Ilkka Koskinen]

Add missing 'h' to l1d_cache_access_prefetces

Also fix a couple of typos and use consistent term in brief descriptions

Fixes: 16438b652b46 ("perf vendor events arm64 AmpereOneX: Add core PMU events and metrics")
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
---
 .../arch/arm64/ampere/ampereonex/metrics.json          | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
index 5228f94a793f..6817cac149e0 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
@@ -113,7 +113,7 @@
     {
         "MetricName": "load_store_spec_rate",
         "MetricExpr": "LDST_SPEC / INST_SPEC",
-        "BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speclatively executed",
+        "BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speculatively executed",
         "MetricGroup": "Operation_Mix",
         "ScaleUnit": "100percent of operations"
     },
@@ -132,7 +132,7 @@
     {
         "MetricName": "pc_write_spec_rate",
         "MetricExpr": "PC_WRITE_SPEC / INST_SPEC",
-        "BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speclatively executed",
+        "BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speculatively executed",
         "MetricGroup": "Operation_Mix",
         "ScaleUnit": "100percent of operations"
     },
@@ -195,14 +195,14 @@
     {
         "MetricName": "stall_frontend_cache_rate",
         "MetricExpr": "STALL_FRONTEND_CACHE / CPU_CYCLES",
-        "BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and cache miss",
+        "BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and cache miss",
         "MetricGroup": "Stall",
         "ScaleUnit": "100percent of cycles"
     },
     {
         "MetricName": "stall_frontend_tlb_rate",
         "MetricExpr": "STALL_FRONTEND_TLB / CPU_CYCLES",
-        "BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and TLB miss",
+        "BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and TLB miss",
         "MetricGroup": "Stall",
         "ScaleUnit": "100percent of cycles"
     },
@@ -391,7 +391,7 @@
         "ScaleUnit": "100percent of cache acceses"
     },
     {
-        "MetricName": "l1d_cache_access_prefetces",
+        "MetricName": "l1d_cache_access_prefetches",
         "MetricExpr": "L1D_CACHE_PRFM / L1D_CACHE",
         "BriefDescription": "L1D cache access - prefetch",
         "MetricGroup": "Cache",
-- 
2.51.0

[PATCH v2 2/2] perf vendor events arm64 AmpereOne: Fix typos in metrics' descriptions

[Ilkka Koskinen]

While fixing a typo in "l1d_cache_access_prefetches" in AmpereOneX,
a few other typos were found in metrics' descriptions too. While AmpereOne
doesn't have the metric, it did have the typos in the descriptions.

Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
---
 .../pmu-events/arch/arm64/ampere/ampereone/metrics.json   | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
index afcdad58ef89..324104438e78 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
@@ -113,7 +113,7 @@
     {
 	"MetricName": "load_store_spec_rate",
 	"MetricExpr": "((LDST_SPEC / INST_SPEC) * 100)",
-	"BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speclatively executed",
+	"BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speculatively executed",
         "MetricGroup": "Operation_Mix",
         "ScaleUnit": "1percent of operations"
     },
@@ -132,7 +132,7 @@
     {
 	"MetricName": "pc_write_spec_rate",
 	"MetricExpr": "((PC_WRITE_SPEC / INST_SPEC) * 100)",
-	"BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speclatively executed",
+	"BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speculatively executed",
         "MetricGroup": "Operation_Mix",
         "ScaleUnit": "1percent of operations"
     },
@@ -195,14 +195,14 @@
     {
 	"MetricName": "stall_frontend_cache_rate",
 	"MetricExpr": "((STALL_FRONTEND_CACHE / CPU_CYCLES) * 100)",
-	"BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and cache miss",
+	"BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and cache miss",
 	"MetricGroup": "Stall",
         "ScaleUnit": "1percent of cycles"
     },
     {
 	"MetricName": "stall_frontend_tlb_rate",
 	"MetricExpr": "((STALL_FRONTEND_TLB / CPU_CYCLES) * 100)",
-	"BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and TLB miss",
+	"BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and TLB miss",
 	"MetricGroup": "Stall",
         "ScaleUnit": "1percent of cycles"
     },
-- 
2.51.0

Re: [PATCH v2 2/2] perf vendor events arm64 AmpereOne: Fix typos in metrics' descriptions

[James Clark]

On 10/09/2025 8:52 pm, Ilkka Koskinen wrote:
> While fixing a typo in "l1d_cache_access_prefetches" in AmpereOneX,
> a few other typos were found in metrics' descriptions too. While AmpereOne
> doesn't have the metric, it did have the typos in the descriptions.
> 
> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> ---
>   .../pmu-events/arch/arm64/ampere/ampereone/metrics.json   | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
> index afcdad58ef89..324104438e78 100644
> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json
> @@ -113,7 +113,7 @@
>       {
>   	"MetricName": "load_store_spec_rate",
>   	"MetricExpr": "((LDST_SPEC / INST_SPEC) * 100)",
> -	"BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speclatively executed",
> +	"BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speculatively executed",
>           "MetricGroup": "Operation_Mix",
>           "ScaleUnit": "1percent of operations"
>       },
> @@ -132,7 +132,7 @@
>       {
>   	"MetricName": "pc_write_spec_rate",
>   	"MetricExpr": "((PC_WRITE_SPEC / INST_SPEC) * 100)",
> -	"BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speclatively executed",
> +	"BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speculatively executed",
>           "MetricGroup": "Operation_Mix",
>           "ScaleUnit": "1percent of operations"
>       },
> @@ -195,14 +195,14 @@
>       {
>   	"MetricName": "stall_frontend_cache_rate",
>   	"MetricExpr": "((STALL_FRONTEND_CACHE / CPU_CYCLES) * 100)",
> -	"BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and cache miss",
> +	"BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and cache miss",
>   	"MetricGroup": "Stall",
>           "ScaleUnit": "1percent of cycles"
>       },
>       {
>   	"MetricName": "stall_frontend_tlb_rate",
>   	"MetricExpr": "((STALL_FRONTEND_TLB / CPU_CYCLES) * 100)",
> -	"BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and TLB miss",
> +	"BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and TLB miss",
>   	"MetricGroup": "Stall",
>           "ScaleUnit": "1percent of cycles"
>       },

Reviewed-by: James Clark <james.clark@linaro.org>

Re: [PATCH v2 2/2] perf vendor events arm64 AmpereOne: Fix typos in metrics' descriptions

[Arnaldo Carvalho de Melo]

On Thu, Sep 11, 2025 at 09:26:47AM +0100, James Clark wrote:
> On 10/09/2025 8:52 pm, Ilkka Koskinen wrote:
> > While fixing a typo in "l1d_cache_access_prefetches" in AmpereOneX,
> > a few other typos were found in metrics' descriptions too. While AmpereOne
> > doesn't have the metric, it did have the typos in the descriptions.
> > 
> > Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>

> Reviewed-by: James Clark <james.clark@linaro.org>

Thanks, applied to perf-tools-next,

- Arnaldo