* [PATCH] arm64: dts: cix: add DT nodes for SPI
@ 2025-09-19 1:31 Jun Guo
2025-09-23 5:48 ` Peter Chen
0 siblings, 1 reply; 2+ messages in thread
From: Jun Guo @ 2025-09-19 1:31 UTC (permalink / raw)
To: peter.chen, fugang.duan, robh, krzk+dt, conor+dt
Cc: cix-kernel-upstream, linux-arm-kernel, devicetree, linux-kernel,
Jun Guo
Add the device tree node for the spi controller of the CIX SKY1 SoC.
Signed-off-by: Jun Guo <jun.guo@cixtech.com>
---
arch/arm64/boot/dts/cix/sky1.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index 2fb2c99c0796..ea324336bf34 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -264,6 +264,26 @@ i2c7: i2c@4080000 {
status = "disabled";
};
+ spi0: spi@4090000 {
+ compatible = "cdns,spi-r1p6";
+ reg = <0x0 0x04090000 0x0 0x10000>;
+ clocks = <&scmi_clk CLK_TREE_FCH_SPI0_APB>,
+ <&scmi_clk CLK_TREE_FCH_SPI0_APB>;
+ clock-names = "ref_clk", "pclk";
+ interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;
+ status = "disabled";
+ };
+
+ spi1: spi@40a0000 {
+ compatible = "cdns,spi-r1p6";
+ reg = <0x0 0x040a0000 0x0 0x10000>;
+ clocks = <&scmi_clk CLK_TREE_FCH_SPI1_APB>,
+ <&scmi_clk CLK_TREE_FCH_SPI1_APB>;
+ clock-names = "ref_clk", "pclk";
+ interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>;
+ status = "disabled";
+ };
+
uart0: serial@40b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x040b0000 0x0 0x1000>;
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] arm64: dts: cix: add DT nodes for SPI
2025-09-19 1:31 [PATCH] arm64: dts: cix: add DT nodes for SPI Jun Guo
@ 2025-09-23 5:48 ` Peter Chen
0 siblings, 0 replies; 2+ messages in thread
From: Peter Chen @ 2025-09-23 5:48 UTC (permalink / raw)
To: Jun Guo
Cc: fugang.duan, robh, krzk+dt, conor+dt, cix-kernel-upstream,
linux-arm-kernel, devicetree, linux-kernel
On 25-09-19 09:31:18, Jun Guo wrote:
> Add the device tree node for the spi controller of the CIX SKY1 SoC.
>
> Signed-off-by: Jun Guo <jun.guo@cixtech.com>
Applied, thanks.
Peter
> ---
> arch/arm64/boot/dts/cix/sky1.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> index 2fb2c99c0796..ea324336bf34 100644
> --- a/arch/arm64/boot/dts/cix/sky1.dtsi
> +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> @@ -264,6 +264,26 @@ i2c7: i2c@4080000 {
> status = "disabled";
> };
>
> + spi0: spi@4090000 {
> + compatible = "cdns,spi-r1p6";
> + reg = <0x0 0x04090000 0x0 0x10000>;
> + clocks = <&scmi_clk CLK_TREE_FCH_SPI0_APB>,
> + <&scmi_clk CLK_TREE_FCH_SPI0_APB>;
> + clock-names = "ref_clk", "pclk";
> + interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;
> + status = "disabled";
> + };
> +
> + spi1: spi@40a0000 {
> + compatible = "cdns,spi-r1p6";
> + reg = <0x0 0x040a0000 0x0 0x10000>;
> + clocks = <&scmi_clk CLK_TREE_FCH_SPI1_APB>,
> + <&scmi_clk CLK_TREE_FCH_SPI1_APB>;
> + clock-names = "ref_clk", "pclk";
> + interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>;
> + status = "disabled";
> + };
> +
> uart0: serial@40b0000 {
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x0 0x040b0000 0x0 0x1000>;
> --
> 2.34.1
>
--
Best regards,
Peter
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