* [PATCH 1/3] spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND
2025-11-14 23:34 [PATCH 0/3] spi: airoha: add support of en7523 SoC (for 6.19) Mikhail Kshevetskiy
@ 2025-11-14 23:34 ` Mikhail Kshevetskiy
2025-11-15 16:01 ` Lorenzo Bianconi
2025-11-14 23:34 ` [PATCH 2/3] dt-bindings: spi: airoha: add compatible for EN7523 Mikhail Kshevetskiy
2025-11-14 23:34 ` [PATCH 3/3] arm: dts: airoha: en7523: add SNAND node Mikhail Kshevetskiy
2 siblings, 1 reply; 5+ messages in thread
From: Mikhail Kshevetskiy @ 2025-11-14 23:34 UTC (permalink / raw)
To: Lorenzo Bianconi, Ray Liu, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, linux-arm-kernel, linux-spi,
devicetree, linux-kernel, linux-mediatek
Cc: Mikhail Kshevetskiy, Andreas Gnau
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode.
It was found that some flashes operates incorrectly in RESERVED mode.
Micron and Skyhigh flashes are definitely affected by the issue,
Winbond flashes are NOT affected.
Details:
--------
DMA reading of odd pages on affected flashes operates incorrectly. Page
reading offset (start of the page) on hardware level is replaced by 0x10.
Thus results in incorrect data reading. Usage of UBI make things even
worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
becomes impossible.
Non-DMA reading is OK.
This patch detects booting in reserved mode, turn off DMA and print big
fat warning.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
---
drivers/spi/spi-airoha-snfi.c | 40 ++++++++++++++++++++++++++++++-----
1 file changed, 35 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c
index 8408aee9c06e..0e84a9addfa5 100644
--- a/drivers/spi/spi-airoha-snfi.c
+++ b/drivers/spi/spi-airoha-snfi.c
@@ -1013,6 +1013,11 @@ static const struct spi_controller_mem_ops airoha_snand_mem_ops = {
.dirmap_write = airoha_snand_dirmap_write,
};
+static const struct spi_controller_mem_ops airoha_snand_nodma_mem_ops = {
+ .supports_op = airoha_snand_supports_op,
+ .exec_op = airoha_snand_exec_op,
+};
+
static int airoha_snand_setup(struct spi_device *spi)
{
struct airoha_snand_ctrl *as_ctrl;
@@ -1058,7 +1063,8 @@ static int airoha_snand_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct spi_controller *ctrl;
void __iomem *base;
- int err;
+ int err, dma_enabled;
+ u32 sfc_strap;
ctrl = devm_spi_alloc_host(dev, sizeof(*as_ctrl));
if (!ctrl)
@@ -1092,12 +1098,36 @@ static int airoha_snand_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(as_ctrl->spi_clk),
"unable to get spi clk\n");
- err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
- if (err)
- return err;
+ dma_enabled = 1;
+ if (device_is_compatible(dev, "airoha,en7523-snand")) {
+ err = regmap_read(as_ctrl->regmap_ctrl,
+ REG_SPI_CTRL_SFC_STRAP, &sfc_strap);
+ if (err)
+ return err;
+
+ if (!(sfc_strap & 0x04)) {
+ dma_enabled = 0;
+ dev_warn(dev,
+ "=== WARNING ======================================================\n"
+ "Detected booting in RESERVED mode (UART_TXD was short to GND).\n"
+ "This mode is known for incorrect DMA reading of some flashes.\n"
+ "Usage of DMA for flash operations will be disabled to prevent data\n"
+ "damage. Unplug your serial console and power cycle the board\n"
+ "to boot with full performance.\n"
+ "==================================================================\n");
+ }
+ }
+
+ if (dma_enabled) {
+ err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
+ if (err)
+ return err;
+ }
ctrl->num_chipselect = 2;
- ctrl->mem_ops = &airoha_snand_mem_ops;
+ ctrl->mem_ops = dma_enabled ?
+ &airoha_snand_mem_ops :
+ &airoha_snand_nodma_mem_ops;
ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
ctrl->mode_bits = SPI_RX_DUAL;
ctrl->setup = airoha_snand_setup;
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 1/3] spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND
2025-11-14 23:34 ` [PATCH 1/3] spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND Mikhail Kshevetskiy
@ 2025-11-15 16:01 ` Lorenzo Bianconi
0 siblings, 0 replies; 5+ messages in thread
From: Lorenzo Bianconi @ 2025-11-15 16:01 UTC (permalink / raw)
To: Mikhail Kshevetskiy
Cc: Ray Liu, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno,
linux-arm-kernel, linux-spi, devicetree, linux-kernel,
linux-mediatek, Andreas Gnau
[-- Attachment #1: Type: text/plain, Size: 3870 bytes --]
> We found that some serial console may pull TX line to GROUND during board
> boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
> to booting in RESERVED boot mode.
>
> It was found that some flashes operates incorrectly in RESERVED mode.
> Micron and Skyhigh flashes are definitely affected by the issue,
> Winbond flashes are NOT affected.
>
> Details:
> --------
> DMA reading of odd pages on affected flashes operates incorrectly. Page
> reading offset (start of the page) on hardware level is replaced by 0x10.
> Thus results in incorrect data reading. Usage of UBI make things even
> worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
> becomes impossible.
>
> Non-DMA reading is OK.
>
> This patch detects booting in reserved mode, turn off DMA and print big
> fat warning.
>
> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
> ---
> drivers/spi/spi-airoha-snfi.c | 40 ++++++++++++++++++++++++++++++-----
> 1 file changed, 35 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c
> index 8408aee9c06e..0e84a9addfa5 100644
> --- a/drivers/spi/spi-airoha-snfi.c
> +++ b/drivers/spi/spi-airoha-snfi.c
> @@ -1013,6 +1013,11 @@ static const struct spi_controller_mem_ops airoha_snand_mem_ops = {
> .dirmap_write = airoha_snand_dirmap_write,
> };
>
> +static const struct spi_controller_mem_ops airoha_snand_nodma_mem_ops = {
> + .supports_op = airoha_snand_supports_op,
> + .exec_op = airoha_snand_exec_op,
> +};
> +
> static int airoha_snand_setup(struct spi_device *spi)
> {
> struct airoha_snand_ctrl *as_ctrl;
> @@ -1058,7 +1063,8 @@ static int airoha_snand_probe(struct platform_device *pdev)
> struct device *dev = &pdev->dev;
> struct spi_controller *ctrl;
> void __iomem *base;
> - int err;
> + int err, dma_enabled;
here you can use bool for dma_enable:
bool dma_enable = true;
> + u32 sfc_strap;
>
> ctrl = devm_spi_alloc_host(dev, sizeof(*as_ctrl));
> if (!ctrl)
> @@ -1092,12 +1098,36 @@ static int airoha_snand_probe(struct platform_device *pdev)
> return dev_err_probe(dev, PTR_ERR(as_ctrl->spi_clk),
> "unable to get spi clk\n");
>
> - err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
> - if (err)
> - return err;
> + dma_enabled = 1;
> + if (device_is_compatible(dev, "airoha,en7523-snand")) {
> + err = regmap_read(as_ctrl->regmap_ctrl,
> + REG_SPI_CTRL_SFC_STRAP, &sfc_strap);
> + if (err)
> + return err;
> +
> + if (!(sfc_strap & 0x04)) {
> + dma_enabled = 0;
dma_enable = false;
> + dev_warn(dev,
> + "=== WARNING ======================================================\n"
you do not need to add "WARNING here".
> + "Detected booting in RESERVED mode (UART_TXD was short to GND).\n"
> + "This mode is known for incorrect DMA reading of some flashes.\n"
> + "Usage of DMA for flash operations will be disabled to prevent data\n"
> + "damage. Unplug your serial console and power cycle the board\n"
> + "to boot with full performance.\n"
> + "==================================================================\n");
> + }
> + }
> +
> + if (dma_enabled) {
> + err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
> + if (err)
> + return err;
> + }
>
> ctrl->num_chipselect = 2;
> - ctrl->mem_ops = &airoha_snand_mem_ops;
> + ctrl->mem_ops = dma_enabled ?
> + &airoha_snand_mem_ops :
> + &airoha_snand_nodma_mem_ops;
nit: no need to add a new-line here:
ctrl->mem_ops = dma_enabled ? &airoha_snand_mem_ops
: &airoha_snand_nodma_mem_ops;
Regards,
Lorenzo
> ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
> ctrl->mode_bits = SPI_RX_DUAL;
> ctrl->setup = airoha_snand_setup;
> --
> 2.51.0
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/3] dt-bindings: spi: airoha: add compatible for EN7523
2025-11-14 23:34 [PATCH 0/3] spi: airoha: add support of en7523 SoC (for 6.19) Mikhail Kshevetskiy
2025-11-14 23:34 ` [PATCH 1/3] spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND Mikhail Kshevetskiy
@ 2025-11-14 23:34 ` Mikhail Kshevetskiy
2025-11-14 23:34 ` [PATCH 3/3] arm: dts: airoha: en7523: add SNAND node Mikhail Kshevetskiy
2 siblings, 0 replies; 5+ messages in thread
From: Mikhail Kshevetskiy @ 2025-11-14 23:34 UTC (permalink / raw)
To: Lorenzo Bianconi, Ray Liu, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, linux-arm-kernel, linux-spi,
devicetree, linux-kernel, linux-mediatek
Cc: Mikhail Kshevetskiy, Andreas Gnau, Krzysztof Kozlowski
Add dt-bindings documentation of SPI NAND controller
for Airoha EN7523 SoC platform.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/spi/airoha,en7581-snand.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml b/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
index b820c5613dcc..855aa08995b9 100644
--- a/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
+++ b/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
@@ -14,7 +14,12 @@ allOf:
properties:
compatible:
- const: airoha,en7581-snand
+ oneOf:
+ - const: airoha,en7581-snand
+ - items:
+ - enum:
+ - airoha,en7523-snand
+ - const: airoha,en7581-snand
reg:
items:
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/3] arm: dts: airoha: en7523: add SNAND node
2025-11-14 23:34 [PATCH 0/3] spi: airoha: add support of en7523 SoC (for 6.19) Mikhail Kshevetskiy
2025-11-14 23:34 ` [PATCH 1/3] spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND Mikhail Kshevetskiy
2025-11-14 23:34 ` [PATCH 2/3] dt-bindings: spi: airoha: add compatible for EN7523 Mikhail Kshevetskiy
@ 2025-11-14 23:34 ` Mikhail Kshevetskiy
2 siblings, 0 replies; 5+ messages in thread
From: Mikhail Kshevetskiy @ 2025-11-14 23:34 UTC (permalink / raw)
To: Lorenzo Bianconi, Ray Liu, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, linux-arm-kernel, linux-spi,
devicetree, linux-kernel, linux-mediatek
Cc: Mikhail Kshevetskiy, Andreas Gnau
Add SNAND node to enable support of attached SPI-NAND on the EN7523 SoC.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm/boot/dts/airoha/en7523.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/airoha/en7523.dtsi b/arch/arm/boot/dts/airoha/en7523.dtsi
index b523a868c4ad..31191b8d1430 100644
--- a/arch/arm/boot/dts/airoha/en7523.dtsi
+++ b/arch/arm/boot/dts/airoha/en7523.dtsi
@@ -203,4 +203,24 @@ pcie_intc1: interrupt-controller {
#interrupt-cells = <1>;
};
};
+
+ spi_ctrl: spi@1fa10000 {
+ compatible = "airoha,en7523-snand", "airoha,en7581-snand";
+ reg = <0x1fa10000 0x140>,
+ <0x1fa11000 0x160>;
+
+ clocks = <&scu EN7523_CLK_SPI>;
+ clock-names = "spi";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand: nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <2>;
+ };
+ };
};
--
2.51.0
^ permalink raw reply related [flat|nested] 5+ messages in thread