Re: [PATCH rc v4 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage

[Nicolin Chen <nicolinc@nvidia.com>]

On Thu, Dec 18, 2025 at 04:47:38PM +0000, Mostafa Saleh wrote:
> On Tue, Dec 16, 2025 at 08:26:02PM -0800, Nicolin Chen wrote:
> > STE in a nested case requires both S1 and S2 fields. And this makes the use
> > case different from the existing one.
> > 
> > Add coverage for previously failed cases shifting between S2-only and S1+S2
> > STEs.
> > 
> > Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
> > Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
> > ---
> >  .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c  | 46 +++++++++++++++++++
> >  1 file changed, 46 insertions(+)
> > 
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> > index 5db14718fdd6..8255a02f4efa 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> > @@ -33,8 +33,12 @@ static struct mm_struct sva_mm = {
> >  enum arm_smmu_test_master_feat {
> >  	ARM_SMMU_MASTER_TEST_ATS = BIT(0),
> >  	ARM_SMMU_MASTER_TEST_STALL = BIT(1),
> > +	ARM_SMMU_MASTER_TEST_NESTED = BIT(2),
> >  };
> >  
> > +static void arm_smmu_test_make_s2_ste(struct arm_smmu_ste *ste,
> > +				      enum arm_smmu_test_master_feat feat);
> > +
> >  static bool arm_smmu_entry_differs_in_used_bits(const __le64 *entry,
> >  						const __le64 *used_bits,
> >  						const __le64 *target,
> > @@ -197,6 +201,17 @@ static void arm_smmu_test_make_cdtable_ste(struct arm_smmu_ste *ste,
> >  	};
> >  
> >  	arm_smmu_make_cdtable_ste(ste, &master, ats_enabled, s1dss);
> > +	if (feat & ARM_SMMU_MASTER_TEST_NESTED) {
> > +		struct arm_smmu_ste s2ste;
> > +		int i;
> > +
> > +		arm_smmu_test_make_s2_ste(&s2ste, ARM_SMMU_MASTER_TEST_ATS);
> 
> Shouldn't that be conditional on "ats_enabled", I see the callers of the
> new tests already set ARM_SMMU_MASTER_TEST_ATS.

I will fix that.

Thanks
Nicolin