[PATCH] ARM: dts: lpc32xx: Update spi clock properties

[PATCH] ARM: dts: lpc32xx: Update spi clock properties

[Vladimir Zapolskiy]

From: Kuldeep Singh <singh.kuldeep87k@gmail.com>

PL022 binding require two clocks to be defined but NXP LPC32xx platform
doesn't comply with the bindings and define only one clock i.e apb_pclk.

Update SPI clocks and clocks-names property by adding appropriate clock
reference to make it compliant with the bindings.

Noteworthy, strictly speaking the change tackles DT ABI by changing
the order in the list of clock-names property values, however this level
of impact is considered as acceptable.

Cc: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
[vzapolskiy: rebased and minor update to the commit message]
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
I do resend the unapplied change from the past, which raised a discussion:
* https://lore.kernel.org/all/20220311093800.18778-4-singh.kuldeep87k@gmail.com/

A functionally identical change has been sent recently:
* https://lore.kernel.org/all/20251029202801.3963952-2-Frank.Li@nxp.com/
---
 arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
index e780451fd335..206c66bdfe41 100644
--- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
@@ -172,8 +172,8 @@ ssp0: spi@20084000 {
 				compatible = "arm,pl022", "arm,primecell";
 				reg = <0x20084000 0x1000>;
 				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk LPC32XX_CLK_SSP0>;
-				clock-names = "apb_pclk";
+				clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>;
+				clock-names = "sspclk", "apb_pclk";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				status = "disabled";
@@ -196,8 +196,8 @@ ssp1: spi@2008c000 {
 				compatible = "arm,pl022", "arm,primecell";
 				reg = <0x2008c000 0x1000>;
 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk LPC32XX_CLK_SSP1>;
-				clock-names = "apb_pclk";
+				clocks = <&clk LPC32XX_CLK_SSP1>, <&clk LPC32XX_CLK_SSP1>;
+				clock-names = "sspclk", "apb_pclk";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				status = "disabled";
-- 
2.43.0

Re: [PATCH] ARM: dts: lpc32xx: Update spi clock properties

[Frank Li]

On Wed, Dec 24, 2025 at 06:52:05AM +0200, Vladimir Zapolskiy wrote:
> From: Kuldeep Singh <singh.kuldeep87k@gmail.com>
>
> PL022 binding require two clocks to be defined but NXP LPC32xx platform
> doesn't comply with the bindings and define only one clock i.e apb_pclk.
>
> Update SPI clocks and clocks-names property by adding appropriate clock
> reference to make it compliant with the bindings.
>
> Noteworthy, strictly speaking the change tackles DT ABI by changing
> the order in the list of clock-names property values, however this level
> of impact is considered as acceptable.
>
> Cc: Vladimir Zapolskiy <vz@mleia.com>
> Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
> [vzapolskiy: rebased and minor update to the commit message]
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> ---
> I do resend the unapplied change from the past, which raised a discussion:
> * https://lore.kernel.org/all/20220311093800.18778-4-singh.kuldeep87k@gmail.com/
>
> A functionally identical change has been sent recently:
> * https://lore.kernel.org/all/20251029202801.3963952-2-Frank.Li@nxp.com/
> ---
>  arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
> index e780451fd335..206c66bdfe41 100644
> --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
> @@ -172,8 +172,8 @@ ssp0: spi@20084000 {
>  				compatible = "arm,pl022", "arm,primecell";
>  				reg = <0x20084000 0x1000>;
>  				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clk LPC32XX_CLK_SSP0>;
> -				clock-names = "apb_pclk";
> +				clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>;
> +				clock-names = "sspclk", "apb_pclk";
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  				status = "disabled";
> @@ -196,8 +196,8 @@ ssp1: spi@2008c000 {
>  				compatible = "arm,pl022", "arm,primecell";
>  				reg = <0x2008c000 0x1000>;
>  				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clk LPC32XX_CLK_SSP1>;
> -				clock-names = "apb_pclk";
> +				clocks = <&clk LPC32XX_CLK_SSP1>, <&clk LPC32XX_CLK_SSP1>;
> +				clock-names = "sspclk", "apb_pclk";
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  				status = "disabled";
> --
> 2.43.0
>