[PATCH v2 0/2] selftests/arm64: Fix sve2p1_sigill() and add cmpbr_sigill() for hwcap test

[PATCH v2 0/2] selftests/arm64: Fix sve2p1_sigill() and add cmpbr_sigill() for hwcap test

[Yifan Wu]

Hi all,

This patch series fixes and adds two selftests in the arm64 hwcap
test suite.

Patch 1/2 fixes the sve2p1_sigill() test to correctly detect the
FEAT_SVE2p1 feature. Previously, the test incorrectly assumed that
the presence of FEAT_SVE2.1 implied support for the BFADD
instruction, which actually depends on the FEAT_SVE_B16B16 feature.
The test is updated to use the LD1Q instruction, which is
unambiguously implied by FEAT_SVE2p1.

Patch 2/2 implements the cmpbr_sigill() test to correctly detect
the presence of the CMPBR extension. The test uses the CBEQ
instruction, which is valid only if the CPU supports the extension.
If supported, a branch is taken and the UDF instruction is skipped,
avoiding a SIGILL. Otherwise, the UDF is executed and a SIGILL
is generated.

These changes improve the accuracy and reliability of the selftests
for arm64 hardware capability detection.

References:

CBEQ: https://developer.arm.com/documentation/ddi0602/2025-12/Base-Instructions/CB-cc---register---Compare-registers-and-branch-?lang=en
BFADD: https://developer.arm.com/documentation/ddi0602/2025-12/SVE-Instructions/BFADD--unpredicated---BFloat16-add--unpredicated--?lang=en
LD1Q: https://developer.arm.com/documentation/ddi0602/2025-12/SVE-Instructions/LD1Q--Gather-load-quadwords-?lang=en
ID_AA64ZFR0_EL1: https://developer.arm.com/documentation/ddi0601/2025-03/AArch64-Registers/ID-AA64ZFR0-EL1--SVE-Feature-ID-Register-0?lang=en

Change Log:
v1:
Fixes the sve2p1_sigill() in patch 1.
Implements cmpbr_sigill() by the single asm volatile statement.
Updated the comments.

v1 can be found at:
https://lore.kernel.org/all/20260227031933.4103333-1-wuyifan50@huawei.com/

Yifan Wu (2):
  selftest/arm64: Fix sve2p1_sigill() to hwcap test
  selftests/arm64: Implement cmpbr_sigill() to hwcap test

 tools/testing/selftests/arm64/abi/hwcap.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

-- 
2.33.0

[PATCH v2 1/2] selftest/arm64: Fix sve2p1_sigill() to hwcap test

[Yifan Wu]

The FEAT_SVE2p1 is indicated by ID_AA64ZFR0_EL1.SVEver. However,
the BFADD requires the FEAT_SVE_B16B16, which is indicated by
ID_AA64ZFR0_EL1.B16B16. This could cause the test to incorrectly
fail on a CPU that supports FEAT_SVE2.1 but not FEAT_SVE_B16B16.

LD1Q Gather load quadwords which is decoded from SVE encodings and
implied by FEAT_SVE2p1.

Fixes: c5195b027d29 ("kselftest/arm64: Add SVE 2.1 to hwcap test")
Signed-off-by: Yifan Wu <wuyifan50@huawei.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
---
 tools/testing/selftests/arm64/abi/hwcap.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index 9d2df1f3e6bb..c2661a312fc9 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -475,8 +475,8 @@ static void sve2_sigill(void)
 
 static void sve2p1_sigill(void)
 {
-	/* BFADD Z0.H, Z0.H, Z0.H */
-	asm volatile(".inst 0x65000000" : : : "z0");
+	/* LD1Q {Z0.Q}, P0/Z, [Z0.D, X0] */
+	asm volatile(".inst 0xC400A000" : : : "z0");
 }
 
 static void sve2p2_sigill(void)
-- 
2.33.0

[PATCH v2 2/2] selftests/arm64: Implement cmpbr_sigill() to hwcap test

[Yifan Wu]

The function executes a CBEQ instruction which is valid if the CPU
supports the CMPBR extension. The CBEQ branches to skip the following
UDF instruction, and no SIGILL is generated. Otherwise, it will
generate a SIGILL.

Signed-off-by: Yifan Wu <wuyifan50@huawei.com>
---
 tools/testing/selftests/arm64/abi/hwcap.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index c2661a312fc9..e22703d6b97c 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -56,7 +56,8 @@ static void atomics_sigill(void)
 
 static void cmpbr_sigill(void)
 {
-	/* Not implemented, too complicated and unreliable anyway */
+	asm volatile(".inst 0x74C00040\n" /* CBEQ w0, w0, +8 */
+		     "udf #0" : : : "cc"); /* UDF #0 */
 }
 
 static void crc32_sigill(void)
-- 
2.33.0

Re: [PATCH v2 2/2] selftests/arm64: Implement cmpbr_sigill() to hwcap test

[Mark Brown]

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On Thu, Mar 05, 2026 at 09:36:38AM +0800, Yifan Wu wrote:

> The function executes a CBEQ instruction which is valid if the CPU
> supports the CMPBR extension. The CBEQ branches to skip the following
> UDF instruction, and no SIGILL is generated. Otherwise, it will
> generate a SIGILL.

Reviewed-by: Mark Brown <broonie@kernel.org>

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Re: [PATCH v2 0/2] selftests/arm64: Fix sve2p1_sigill() and add cmpbr_sigill() for hwcap test

[Will Deacon]

On Thu, 05 Mar 2026 09:36:36 +0800, Yifan Wu wrote:
> This patch series fixes and adds two selftests in the arm64 hwcap
> test suite.
> 
> Patch 1/2 fixes the sve2p1_sigill() test to correctly detect the
> FEAT_SVE2p1 feature. Previously, the test incorrectly assumed that
> the presence of FEAT_SVE2.1 implied support for the BFADD
> instruction, which actually depends on the FEAT_SVE_B16B16 feature.
> The test is updated to use the LD1Q instruction, which is
> unambiguously implied by FEAT_SVE2p1.
> 
> [...]

Applied first patch to arm64 (for-next/fixes), thanks!

[1/2] selftest/arm64: Fix sve2p1_sigill() to hwcap test
      https://git.kernel.org/arm64/c/d87c828daa7e

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

Re: [PATCH v2 0/2] selftests/arm64: Fix sve2p1_sigill() and add cmpbr_sigill() for hwcap test

[wuyifan]

HiWill,

Gentle ping on patch 2/2. I have received a Reviewed-by from Mark Brown

and there have been no further review comments so far.

Could you please consider applying it if everything looks good?

On 3/6/2026 8:26 PM, Will Deacon wrote:
> On Thu, 05 Mar 2026 09:36:36 +0800, Yifan Wu wrote:
>> This patch series fixes and adds two selftests in the arm64 hwcap
>> test suite.
>>
>> Patch 1/2 fixes the sve2p1_sigill() test to correctly detect the
>> FEAT_SVE2p1 feature. Previously, the test incorrectly assumed that
>> the presence of FEAT_SVE2.1 implied support for the BFADD
>> instruction, which actually depends on the FEAT_SVE_B16B16 feature.
>> The test is updated to use the LD1Q instruction, which is
>> unambiguously implied by FEAT_SVE2p1.
>>
>> [...]
> Applied first patch to arm64 (for-next/fixes), thanks!
>
> [1/2] selftest/arm64: Fix sve2p1_sigill() to hwcap test
>        https://git.kernel.org/arm64/c/d87c828daa7e
>
> Cheers,

Thanks,

Yifan

Re: (subset) [PATCH v2 0/2] selftests/arm64: Fix sve2p1_sigill() and add cmpbr_sigill() for hwcap test

[Catalin Marinas]

On Thu, 05 Mar 2026 09:36:36 +0800, Yifan Wu wrote:
> This patch series fixes and adds two selftests in the arm64 hwcap
> test suite.
> 
> Patch 1/2 fixes the sve2p1_sigill() test to correctly detect the
> FEAT_SVE2p1 feature. Previously, the test incorrectly assumed that
> the presence of FEAT_SVE2.1 implied support for the BFADD
> instruction, which actually depends on the FEAT_SVE_B16B16 feature.
> The test is updated to use the LD1Q instruction, which is
> unambiguously implied by FEAT_SVE2p1.
> 
> [...]

Applied to arm64 (for-kernelci), thanks!

[2/2] selftests/arm64: Implement cmpbr_sigill() to hwcap test
      https://git.kernel.org/arm64/c/74cd4e0e5399

-- 
Catalin

Re: (subset) [PATCH v2 0/2] selftests/arm64: Fix sve2p1_sigill() and add cmpbr_sigill() for hwcap test

[Catalin Marinas]

On Fri, Mar 27, 2026 at 12:58:11PM +0000, Catalin Marinas wrote:
> On Thu, 05 Mar 2026 09:36:36 +0800, Yifan Wu wrote:
> > This patch series fixes and adds two selftests in the arm64 hwcap
> > test suite.
> > 
> > Patch 1/2 fixes the sve2p1_sigill() test to correctly detect the
> > FEAT_SVE2p1 feature. Previously, the test incorrectly assumed that
> > the presence of FEAT_SVE2.1 implied support for the BFADD
> > instruction, which actually depends on the FEAT_SVE_B16B16 feature.
> > The test is updated to use the LD1Q instruction, which is
> > unambiguously implied by FEAT_SVE2p1.
> > 
> > [...]
> 
> Applied to arm64 (for-kernelci), thanks!

Wrong branch, it's for-next/kselftest (script got confused).