* [PATCH v1] arm64: dts: cix: Add CPU idle states for Sky1
@ 2026-04-24 4:34 Devin Li
2026-05-06 8:28 ` Peter Chen
0 siblings, 1 reply; 2+ messages in thread
From: Devin Li @ 2026-04-24 4:34 UTC (permalink / raw)
To: peter.chen, fugang.duan, robh, krzk+dt, conor+dt,
cix-kernel-upstream
Cc: linux-arm-kernel, devicetree, linux-kernel, guoyin.chen,
robin.wang, hong.guo, Devin.Li
From: "devin.li" <Devin.Li@cixtech.com>
Add PSCI-based CPU idle state definitions for the Sky1 SoC,
enabling core and cluster level power management through
ARM PSCI firmware.
Three idle states are defined:
- CPU_SLEEP_0: Core idle state for A520 cores
(psci-suspend-param 0x0010000), entry-latency 34us,
exit-latency 100us
- CPU_SLEEP_1: Core idle state for A720 cores
(psci-suspend-param 0x10000), entry-latency 31us,
exit-latency 79us
- CLUSTER_SLEEP_0: Cluster idle state shared by all cores
(psci-suspend-param 0x1010000), entry-latency 41us,
exit-latency 104us
A520 cores (cpu0-3) reference CPU_SLEEP_0 and CLUSTER_SLEEP_0,
while A720 cores (cpu4-11) reference CPU_SLEEP_1 and
CLUSTER_SLEEP_0.
Signed-off-by: devin.li <Devin.Li@cixtech.com>
---
arch/arm64/boot/dts/cix/sky1.dtsi | 41 +++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index bb5cfb1f2113..0611098b5f05 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -23,6 +23,7 @@ cpu0: cpu@0 {
reg = <0x0 0x0>;
device_type = "cpu";
capacity-dmips-mhz = <403>;
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu1: cpu@100 {
@@ -31,6 +32,7 @@ cpu1: cpu@100 {
reg = <0x0 0x100>;
device_type = "cpu";
capacity-dmips-mhz = <403>;
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu2: cpu@200 {
@@ -39,6 +41,7 @@ cpu2: cpu@200 {
reg = <0x0 0x200>;
device_type = "cpu";
capacity-dmips-mhz = <403>;
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu3: cpu@300 {
@@ -47,6 +50,7 @@ cpu3: cpu@300 {
reg = <0x0 0x300>;
device_type = "cpu";
capacity-dmips-mhz = <403>;
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu4: cpu@400 {
@@ -55,6 +59,7 @@ cpu4: cpu@400 {
reg = <0x0 0x400>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu5: cpu@500 {
@@ -63,6 +68,7 @@ cpu5: cpu@500 {
reg = <0x0 0x500>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu6: cpu@600 {
@@ -71,6 +77,7 @@ cpu6: cpu@600 {
reg = <0x0 0x600>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu7: cpu@700 {
@@ -79,6 +86,7 @@ cpu7: cpu@700 {
reg = <0x0 0x700>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu8: cpu@800 {
@@ -87,6 +95,7 @@ cpu8: cpu@800 {
reg = <0x0 0x800>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu9: cpu@900 {
@@ -95,6 +104,7 @@ cpu9: cpu@900 {
reg = <0x0 0x900>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu10: cpu@a00 {
@@ -103,6 +113,7 @@ cpu10: cpu@a00 {
reg = <0x0 0xa00>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu11: cpu@b00 {
@@ -111,6 +122,7 @@ cpu11: cpu@b00 {
reg = <0x0 0xb00>;
device_type = "cpu";
capacity-dmips-mhz = <1024>;
+ cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu-map {
@@ -153,6 +165,35 @@ core11 {
};
};
};
+
+ idle-states {
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <34>;
+ exit-latency-us = <100>;
+ min-residency-us = <3000>;
+ };
+
+ CPU_SLEEP_1: cpu-sleep-1 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <31>;
+ exit-latency-us = <79>;
+ min-residency-us = <3000>;
+ };
+
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x1010000>;
+ local-timer-stop;
+ entry-latency-us = <41>;
+ exit-latency-us = <104>;
+ min-residency-us = <4000>;
+ };
+ };
};
firmware {
--
2.49.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v1] arm64: dts: cix: Add CPU idle states for Sky1
2026-04-24 4:34 [PATCH v1] arm64: dts: cix: Add CPU idle states for Sky1 Devin Li
@ 2026-05-06 8:28 ` Peter Chen
0 siblings, 0 replies; 2+ messages in thread
From: Peter Chen @ 2026-05-06 8:28 UTC (permalink / raw)
To: Devin Li
Cc: fugang.duan, robh, krzk+dt, conor+dt, cix-kernel-upstream,
linux-arm-kernel, devicetree, linux-kernel, guoyin.chen,
robin.wang, hong.guo
On 26-04-24 12:34:36, Devin Li wrote:
> From: "devin.li" <Devin.Li@cixtech.com>
Please also use your real name.
>
> Add PSCI-based CPU idle state definitions for the Sky1 SoC,
> enabling core and cluster level power management through
> ARM PSCI firmware.
>
> Three idle states are defined:
>
> - CPU_SLEEP_0: Core idle state for A520 cores
> (psci-suspend-param 0x0010000), entry-latency 34us,
> exit-latency 100us
>
> - CPU_SLEEP_1: Core idle state for A720 cores
> (psci-suspend-param 0x10000), entry-latency 31us,
> exit-latency 79us
>
> - CLUSTER_SLEEP_0: Cluster idle state shared by all cores
> (psci-suspend-param 0x1010000), entry-latency 41us,
> exit-latency 104us
>
> A520 cores (cpu0-3) reference CPU_SLEEP_0 and CLUSTER_SLEEP_0,
> while A720 cores (cpu4-11) reference CPU_SLEEP_1 and
> CLUSTER_SLEEP_0.
>
> Signed-off-by: devin.li <Devin.Li@cixtech.com>
Ditto
Others are okay for me.
Peter
> ---
> arch/arm64/boot/dts/cix/sky1.dtsi | 41 +++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> index bb5cfb1f2113..0611098b5f05 100644
> --- a/arch/arm64/boot/dts/cix/sky1.dtsi
> +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> @@ -23,6 +23,7 @@ cpu0: cpu@0 {
> reg = <0x0 0x0>;
> device_type = "cpu";
> capacity-dmips-mhz = <403>;
> + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
> };
>
> cpu1: cpu@100 {
> @@ -31,6 +32,7 @@ cpu1: cpu@100 {
> reg = <0x0 0x100>;
> device_type = "cpu";
> capacity-dmips-mhz = <403>;
> + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
> };
>
> cpu2: cpu@200 {
> @@ -39,6 +41,7 @@ cpu2: cpu@200 {
> reg = <0x0 0x200>;
> device_type = "cpu";
> capacity-dmips-mhz = <403>;
> + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
> };
>
> cpu3: cpu@300 {
> @@ -47,6 +50,7 @@ cpu3: cpu@300 {
> reg = <0x0 0x300>;
> device_type = "cpu";
> capacity-dmips-mhz = <403>;
> + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
> };
>
> cpu4: cpu@400 {
> @@ -55,6 +59,7 @@ cpu4: cpu@400 {
> reg = <0x0 0x400>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu5: cpu@500 {
> @@ -63,6 +68,7 @@ cpu5: cpu@500 {
> reg = <0x0 0x500>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu6: cpu@600 {
> @@ -71,6 +77,7 @@ cpu6: cpu@600 {
> reg = <0x0 0x600>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu7: cpu@700 {
> @@ -79,6 +86,7 @@ cpu7: cpu@700 {
> reg = <0x0 0x700>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu8: cpu@800 {
> @@ -87,6 +95,7 @@ cpu8: cpu@800 {
> reg = <0x0 0x800>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu9: cpu@900 {
> @@ -95,6 +104,7 @@ cpu9: cpu@900 {
> reg = <0x0 0x900>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu10: cpu@a00 {
> @@ -103,6 +113,7 @@ cpu10: cpu@a00 {
> reg = <0x0 0xa00>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu11: cpu@b00 {
> @@ -111,6 +122,7 @@ cpu11: cpu@b00 {
> reg = <0x0 0xb00>;
> device_type = "cpu";
> capacity-dmips-mhz = <1024>;
> + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
> };
>
> cpu-map {
> @@ -153,6 +165,35 @@ core11 {
> };
> };
> };
> +
> + idle-states {
> + CPU_SLEEP_0: cpu-sleep-0 {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x0010000>;
> + local-timer-stop;
> + entry-latency-us = <34>;
> + exit-latency-us = <100>;
> + min-residency-us = <3000>;
> + };
> +
> + CPU_SLEEP_1: cpu-sleep-1 {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x0010000>;
> + local-timer-stop;
> + entry-latency-us = <31>;
> + exit-latency-us = <79>;
> + min-residency-us = <3000>;
> + };
> +
> + CLUSTER_SLEEP_0: cluster-sleep-0 {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x1010000>;
> + local-timer-stop;
> + entry-latency-us = <41>;
> + exit-latency-us = <104>;
> + min-residency-us = <4000>;
> + };
> + };
> };
>
> firmware {
> --
> 2.49.0
>
--
Best regards,
Peter
^ permalink raw reply [flat|nested] 2+ messages in thread
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