From: Mark Rutland <mark.rutland@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Will Deacon <will@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Jonathan Corbet <corbet@lwn.net>, Shuah Khan <shuah@kernel.org>,
Oliver Upton <oupton@kernel.org>,
Dave Martin <Dave.Martin@arm.com>, Fuad Tabba <tabba@google.com>,
Ben Horgan <ben.horgan@arm.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
Peter Maydell <peter.maydell@linaro.org>,
Eric Auger <eric.auger@redhat.com>
Subject: Re: [PATCH v10 02/30] arm64/fpsimd: Update FA64 and ZT0 enables when loading SME state
Date: Tue, 26 May 2026 15:20:52 +0100 [thread overview]
Message-ID: <ahWsRNb9uZhf46hG@J2N7QTR9R3> (raw)
In-Reply-To: <d8074c6b-9bc9-496e-8a74-94ac18ce9a55@sirena.org.uk>
On Tue, May 26, 2026 at 02:25:56PM +0100, Mark Brown wrote:
> On Tue, May 26, 2026 at 01:48:41PM +0100, Mark Rutland wrote:
> > On Fri, Mar 06, 2026 at 05:00:54PM +0000, Mark Brown wrote:
>
> > > We provide a helper which does the configuration as part of a
> > > read/modify/write operation along with the configuration of the task VL,
> > > then update the floating point state load and SME access trap to use it.
>
> > > + if (fa64) \
> > > + __new |= SMCR_ELx_FA64; \
> > > + if (zt0) \
> > > + __new |= SMCR_ELx_EZT0; \
>
> > I'd strongly prefer that we make it the caller's responsiblity to track
> > all the bits within SMCR, rather than requiring each caller to pass a
> > bag of booleans.
>
> I was explicitly going for the opposite of that in order to make it
> harder for someone implementing a future extension to miss a place where
> an update is required, having the callers independently constructing the
> register values feels like it's asking for trouble.
I didn't say callers should *construct* the value independently, and I
showed how to centralize the construction in a __task_smcr() function.
I think callers should pass the entire value around rather than a
collection of discrete booleans: constructing a collection of discrete
booleans is functionally equivalent to construction the entire value,
and we can more easily manage the construction and passing of the entire
value.
> > unsigned long __task_smcr(const struct task_struct *tsk)
> > {
> > unsigned long vq = sve_vq_from_vl(task_get_sme_vl(tsk));
> > unsigned long smcr = vq - 1;
>
> I agree that's a better pattern for the main kernel - we could also do
> something similar with a task_set_smcr() which wraps the explicitly
> specifed version.
I don't think a task_set_smcr() function would gain much vs
using sysreg_cond_update_s(). I expect that we'd use the SMCR value as
the source of truth (and hence that would need to be generated outside
of task_set_smcr()), at which point either task_set_smcr() would be a
thin wrapper that just hides the register name, or it would generate the
value independently and obscure the connection.
I expect that what we should have eventually is something like:
unsigned long smcr = __task_smcr(task);
sysreg_cond_update_s(SYS_SMCR_EL1, smcr);
if (za) {
__sme load_za(sme_state);
if (smcr & SMCR_ELx_EZT0)
__sme_load_zt(sme_state);
}
... or:
const unsigned long smcr = __task_smcr(task);
const bool zt0 = smcr & SMCR_ELx_EZT0;
sysreg_cond_update_s(SYS_SMCR_EL1, smcr);
if (za) {
__sme load_za(sme_state);
if (zt0)
__sme_load_zt(sme_state);
}
... where in either case it's clear at the function level that the value
programmed into SMCR matches what we're using for boolean decisions, and
it's clear at a higher level that functions are consistent given
consistent usage of __task_smcr().
> That would I think avoid most of the issue you're seeing?
I'm not sure what you mean here.
I don't think we need task_set_smcr(), and I'd prefer what I suggested.
Mark.
next prev parent reply other threads:[~2026-05-26 14:21 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 17:00 [PATCH v10 00/30] KVM: arm64: Implement support for SME Mark Brown
2026-03-06 17:00 ` [PATCH v10 01/30] arm64/sysreg: Update SMIDR_EL1 to DDI0601 2025-06 Mark Brown
2026-03-16 16:34 ` Catalin Marinas
2026-05-08 17:12 ` Mark Rutland
2026-05-09 0:43 ` Mark Brown
2026-05-11 10:40 ` Mark Rutland
2026-05-11 12:31 ` Mark Brown
2026-03-06 17:00 ` [PATCH v10 02/30] arm64/fpsimd: Update FA64 and ZT0 enables when loading SME state Mark Brown
2026-03-16 17:37 ` Catalin Marinas
2026-05-26 12:48 ` Mark Rutland
2026-05-26 13:25 ` Mark Brown
2026-05-26 14:20 ` Mark Rutland [this message]
2026-05-26 15:19 ` Mark Brown
2026-03-06 17:00 ` [PATCH v10 03/30] arm64/fpsimd: Decide to save ZT0 and streaming mode FFR at bind time Mark Brown
2026-03-16 17:42 ` Catalin Marinas
2026-05-26 12:53 ` Mark Rutland
2026-03-06 17:00 ` [PATCH v10 04/30] arm64/fpsimd: Determine maximum virtualisable SME vector length Mark Brown
2026-03-16 17:44 ` Catalin Marinas
2026-03-18 17:29 ` Jean-Philippe Brucker
2026-05-11 10:32 ` Mark Rutland
2026-05-11 12:42 ` Mark Brown
2026-05-26 12:55 ` Mark Rutland
2026-03-06 17:00 ` [PATCH v10 05/30] KVM: arm64: Pay attention to FFR parameter in SVE save and load Mark Brown
2026-03-18 17:30 ` Jean-Philippe Brucker
2026-03-06 17:00 ` [PATCH v10 06/30] KVM: arm64: Pull ctxt_has_ helpers to start of sysreg-sr.h Mark Brown
2026-03-18 17:31 ` Jean-Philippe Brucker
2026-03-06 17:00 ` [PATCH v10 07/30] KVM: arm64: Move SVE state access macros after feature test macros Mark Brown
2026-03-18 17:32 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 08/30] KVM: arm64: Rename SVE finalization constants to be more general Mark Brown
2026-03-18 17:33 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 09/30] KVM: arm64: Define internal features for SME Mark Brown
2026-03-18 17:44 ` Jean-Philippe Brucker
2026-03-18 17:50 ` Mark Brown
2026-03-06 17:01 ` [PATCH v10 10/30] KVM: arm64: Rename sve_state_reg_region Mark Brown
2026-03-18 17:46 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 11/30] KVM: arm64: Store vector lengths in an array Mark Brown
2026-03-18 17:48 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 12/30] KVM: arm64: Factor SVE code out of fpsimd_lazy_switch_to_host() Mark Brown
2026-03-18 17:49 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 13/30] KVM: arm64: Document the KVM ABI for SME Mark Brown
2026-03-18 17:51 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 14/30] KVM: arm64: Implement SME vector length configuration Mark Brown
2026-03-18 17:53 ` Jean-Philippe Brucker
2026-04-23 18:34 ` Mark Brown
2026-03-06 17:01 ` [PATCH v10 15/30] KVM: arm64: Support SME control registers Mark Brown
2026-03-18 17:54 ` Jean-Philippe Brucker
2026-05-08 17:20 ` Mark Rutland
2026-05-11 14:17 ` Mark Brown
2026-03-06 17:01 ` [PATCH v10 16/30] KVM: arm64: Support TPIDR2_EL0 Mark Brown
2026-03-18 17:55 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 17/30] KVM: arm64: Support SME identification registers for guests Mark Brown
2026-03-18 17:27 ` Jean-Philippe Brucker
2026-03-06 17:01 ` [PATCH v10 18/30] KVM: arm64: Support SME priority registers Mark Brown
2026-03-06 17:01 ` [PATCH v10 19/30] KVM: arm64: Provide assembly for SME register access Mark Brown
2026-05-21 14:51 ` Mark Rutland
2026-05-21 15:17 ` Mark Brown
2026-05-22 5:52 ` Marc Zyngier
2026-03-06 17:01 ` [PATCH v10 20/30] KVM: arm64: Support userspace access to streaming mode Z and P registers Mark Brown
2026-03-06 17:01 ` [PATCH v10 21/30] KVM: arm64: Flush register state on writes to SVCR.SM and SVCR.ZA Mark Brown
2026-03-06 17:01 ` [PATCH v10 22/30] KVM: arm64: Expose SME specific state to userspace Mark Brown
2026-03-06 17:01 ` [PATCH v10 23/30] KVM: arm64: Context switch SME state for guests Mark Brown
2026-03-06 17:01 ` [PATCH v10 24/30] KVM: arm64: Handle SME exceptions Mark Brown
2026-03-06 17:01 ` [PATCH v10 25/30] KVM: arm64: Expose SME to nested guests Mark Brown
2026-03-06 17:01 ` [PATCH v10 26/30] KVM: arm64: Provide interface for configuring and enabling SME for guests Mark Brown
2026-03-06 17:01 ` [PATCH v10 27/30] KVM: arm64: selftests: Remove spurious check for single bit safe values Mark Brown
2026-03-06 17:01 ` [PATCH v10 28/30] KVM: arm64: selftests: Skip impossible invalid value tests Mark Brown
2026-03-24 14:54 ` Ben Horgan
2026-03-24 14:56 ` Mark Brown
2026-03-06 17:01 ` [PATCH v10 29/30] KVM: arm64: selftests: Add SME system registers to get-reg-list Mark Brown
2026-03-06 17:01 ` [PATCH v10 30/30] KVM: arm64: selftests: Add SME to set_id_regs test Mark Brown
2026-04-02 21:12 ` (subset) [PATCH v10 00/30] KVM: arm64: Implement support for SME Catalin Marinas
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