From: Beata Michalska <beata.michalska@arm.com>
To: Pengjie Zhang <zhangpengjie2@huawei.com>
Cc: catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org,
lenb@kernel.org, robert.moore@intel.com, zhenglifeng1@huawei.com,
zhanjie9@hisilicon.com, sumitg@nvidia.com,
cuiyunhui@bytedance.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
acpica-devel@lists.linux.dev, linuxarm@huawei.com,
jonathan.cameron@huawei.com, prime.zeng@hisilicon.com,
wanghuiqiang@huawei.com, xuwei5@huawei.com, lihuisong@huawei.com,
yubowen8@huawei.com, wangzhi12@huawei.com
Subject: Re: [PATCH 1/2] ACPI: CPPC: add paired FFH feedback-counter read hook
Date: Tue, 30 Jun 2026 09:37:24 +0200 [thread overview]
Message-ID: <akNyNKSGf5yKwtwN@arm.com> (raw)
In-Reply-To: <20260410094145.4132082-2-zhangpengjie2@huawei.com>
Gonna be a bit picky with wording so do bear with me ...
On Fri, Apr 10, 2026 at 05:41:44PM +0800, Pengjie Zhang wrote:
> cppc_get_perf_ctrs() reads the delivered and reference performance
> counters one at a time.
>
> Allow architectures to provide both FFH feedback counters in one
> operation when that either narrows the sampling window or avoids extra
> cross-CPU reads. Add a small FFH-specific hook for that case and fall
> back to the existing per-register reads when unsupported.
>
> Signed-off-by: Pengjie Zhang <zhangpengjie2@huawei.com>
> ---
> drivers/acpi/cppc_acpi.c | 58 ++++++++++++++++++++++++++++++++++++----
> include/acpi/cppc_acpi.h | 7 +++++
> 2 files changed, 60 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
> index 2e91c5a97761..7b3e8b0597dc 100644
> --- a/drivers/acpi/cppc_acpi.c
> +++ b/drivers/acpi/cppc_acpi.c
> @@ -988,6 +988,23 @@ int __weak cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
> return -ENOTSUPP;
> }
>
> +/**
> + * cpc_read_ffh_fb_ctrs() - Read FFH feedback counters together
> + * @cpunum: CPU number to read
This reads bit awkward. Target CPU maybe ?
> + * @reg1: first CPPC register information
> + * @val1: place holder for first return value
> + * @reg2: second CPPC register information
> + * @val2: place holder for second return value
> + *
> + * Return: 0 for success and error code
0 on success, error code otherwise ?
> + */
> +int __weak cpc_read_ffh_fb_ctrs(int cpunum, struct cpc_reg *reg1,
> + u64 *val1, struct cpc_reg *reg2, u64 *val2)
> +{
> + return -EOPNOTSUPP;
> +}
> +
> +
> /**
> * cpc_write_ffh() - Write FFH register
> * @cpunum: CPU number to write
> @@ -1504,6 +1521,40 @@ bool cppc_perf_ctrs_in_pcc(void)
> }
> EXPORT_SYMBOL_GPL(cppc_perf_ctrs_in_pcc);
>
> +static int cppc_read_perf_fb_ctrs(int cpunum,
> + struct cpc_register_resource *delivered_reg,
> + struct cpc_register_resource *reference_reg,
> + u64 *delivered, u64 *reference)
The signature here differs from cpc_read_ffh_fb_ctrs.
It's not an issue but it might be good idea to stay consistent maybe ?
Also ... was about to suggest to stick to either perf_ctrs or feedback_ctrs
in naming but it seems the is no clear pattern withint the file
...
> +{
> + int ret;
> +
> + /*
> + * For FFH feedback counters, try a paired read first to reduce
> + * sampling skew between delivered and reference counters. Fall
> + * back to the existing per-register reads if unsupported.
> + */
> + if (CPC_IN_FFH(delivered_reg) && CPC_IN_FFH(reference_reg)) {
> + ret = cpc_read_ffh_fb_ctrs(cpunum,
> + &delivered_reg->cpc_entry.reg, delivered,
> + &reference_reg->cpc_entry.reg, reference);
> + if (!ret)
> + return 0;
> +
> + if (ret != -EOPNOTSUPP)
> + return ret;
Shouldn't this one be enough ? Don't think you need the first condition.
> + }
> +
> + ret = cpc_read(cpunum, delivered_reg, delivered);
> + if (ret)
> + return ret;
> +
> + ret = cpc_read(cpunum, reference_reg, reference);
> + if (ret)
> + return ret;
As you are not doing anything with 'ret' this could just be:
ret = cpc_read(cpunum, delivered_reg, delivered);
if (ret) return ret;
return cpc_read(cpunum, reference_reg, reference);
Though that's minor.
---
BR
Beata
> +
> + return 0;
> +}
> +
> /**
> * cppc_get_perf_ctrs - Read a CPU's performance feedback counters.
> * @cpunum: CPU from which to read counters.
> @@ -1547,11 +1598,8 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
> }
> }
>
> - ret = cpc_read(cpunum, delivered_reg, &delivered);
> - if (ret)
> - goto out_err;
> -
> - ret = cpc_read(cpunum, reference_reg, &reference);
> + ret = cppc_read_perf_fb_ctrs(cpunum, delivered_reg, reference_reg,
> + &delivered, &reference);
> if (ret)
> goto out_err;
>
> diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
> index d1f02ceec4f9..006b42dbbd4b 100644
> --- a/include/acpi/cppc_acpi.h
> +++ b/include/acpi/cppc_acpi.h
> @@ -172,6 +172,8 @@ extern int cppc_get_transition_latency(int cpu);
> extern bool cpc_ffh_supported(void);
> extern bool cpc_supported_by_cpu(void);
> extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
> +extern int cpc_read_ffh_fb_ctrs(int cpu, struct cpc_reg *reg1, u64 *val1,
> + struct cpc_reg *reg2, u64 *val2);
> extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
> extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf);
> extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
> @@ -246,6 +248,11 @@ static inline int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
> {
> return -EOPNOTSUPP;
> }
> +static inline int cpc_read_ffh_fb_ctrs(int cpu, struct cpc_reg *reg1, u64 *val1,
> + struct cpc_reg *reg2, u64 *val2)
> +{
> + return -EOPNOTSUPP;
> +}
> static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
> {
> return -EOPNOTSUPP;
> --
> 2.33.0
>
next prev parent reply other threads:[~2026-06-30 7:37 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-10 9:41 [PATCH 0/2] CPPC: reduce FFH feedback-counter sampling skew on arm64 Pengjie Zhang
2026-04-10 9:41 ` [PATCH 1/2] ACPI: CPPC: add paired FFH feedback-counter read hook Pengjie Zhang
2026-06-30 7:37 ` Beata Michalska [this message]
2026-04-10 9:41 ` [PATCH 2/2] arm64: topology: read CPPC FFH feedback counters in one operation Pengjie Zhang
2026-06-29 15:27 ` Sumit Gupta
2026-06-30 7:34 ` Beata Michalska
2026-04-30 10:00 ` [PATCH 0/2] CPPC: reduce FFH feedback-counter sampling skew on arm64 zhangpengjie (A)
2026-05-19 10:47 ` Will Deacon
2026-05-20 2:55 ` Pengjie Zhang
2026-06-24 10:51 ` Beata Michalska
2026-06-26 14:55 ` Vanshidhar Konda
2026-06-27 11:26 ` Pengjie Zhang
2026-06-27 10:50 ` Pengjie Zhang
2026-06-29 15:54 ` Sumit Gupta
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