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From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Shih-Yuan Lee <fourdollars@debian.org>
Cc: Mark Brown <broonie@kernel.org>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Lukas Wunner <lukas@wunner.de>, Daniel Mack <daniel@zonque.org>,
	Haojian Zhuang <haojian.zhuang@gmail.com>,
	Robert Jarzmik <robert.jarzmik@free.fr>,
	linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v16 6/7] spi: pxa2xx: restore LPSS private register state on S3 resume
Date: Mon, 20 Jul 2026 22:59:33 +0300	[thread overview]
Message-ID: <al5-JasTYF5r8A-j@ashevche-desk.local> (raw)
In-Reply-To: <20260720162117.32304-7-fourdollars@debian.org>

On Tue, Jul 21, 2026 at 12:21:15AM +0800, Shih-Yuan Lee wrote:

Is this series AI-assisted?

> Intel LPSS SPI controllers lose all private register state across S3
> suspend because the LPSS power domain is fully removed. On resume the
> driver only re-enables the SSP clock, leaving the LPSS private registers
> in their power-on-reset state, which causes two problems:
> 
> 1. LPSS_PRIV_RESETS (offset 0x04 within the LPSS private space) stays
>    zero, keeping the functional block in reset. Any MMIO access while
>    the block is held in reset causes a PCIe Completion Timeout and a
>    watchdog-triggered system reset. LPSS_PRIV_RESETS_FUNC and
>    LPSS_PRIV_RESETS_IDMA must be de-asserted before any other register
>    access on resume.
> 
> 2. The LPSS software chip-select control register must not be blindly
>    restored from its suspend-time snapshot: if CS was asserted at the
>    moment of suspend, restoring that state corrupts the first
>    post-resume SPI transaction. Instead, call lpss_ssp_setup() which
>    unconditionally writes SW_MODE | CS_HIGH (idle/deasserted), matching
>    the state established at probe time.
> 
> To resolve these issues safely:
> - Wrap S3 suspend/resume with pm_runtime_resume_and_get() and
>   pm_runtime_put_noidle() to guarantee active clocks during MMIO
>   access and preserve PM reference counting.
> - Restrict LPSS private register save/restore to LPT, BYT, and BSW

^^^^ (1)

>   platforms via pxa2xx_spi_need_lpss_restore() (newer platforms are
>   handled by intel-lpss.c).
> - Save only the first 6 LPSS private registers (offsets 0x00..0x14) in
>   drv_data during suspend, avoiding reserved offsets beyond 0x14.
> - On resume, de-assert resets first, restore saved registers, call
>   lpss_ssp_setup(), and clear drv_data->suspended to prevent unclocked
>   IRQ access.
> - Add error recovery paths for spi_controller_suspend/resume failures.
> - On the resume error path, call pm_runtime_set_suspended() before
>   pm_runtime_put_noidle() to align the PM runtime state with the
>   already-disabled hardware clock, preventing pxa2xx_spi_runtime_suspend()
>   from attempting unclocked MMIO via pxa2xx_spi_off().

This is an ugly hack.

Saving context is done in drivers/acpi/x86/lpss.c (see #1 why this file).
If something wrong in the flow it has to be fixed there, not here.

-- 
With Best Regards,
Andy Shevchenko




  reply	other threads:[~2026-07-20 19:59 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-20 16:21 [PATCH v16 0/7] spi: pxa2xx: Fix PM and interrupt issues on Intel LPSS SPI Shih-Yuan Lee
2026-07-20 16:21 ` [PATCH v16 1/7] spi: pxa2xx: introduce clock enable and disable helper functions Shih-Yuan Lee
2026-07-20 19:22   ` Andy Shevchenko
2026-07-20 16:21 ` [PATCH v16 2/7] spi: pxa2xx: introduce suspended flag for interrupt synchronization Shih-Yuan Lee
2026-07-20 17:18   ` Mark Brown
2026-07-20 16:21 ` [PATCH v16 3/7] spi: pxa2xx: overhaul teardown and suspend sequence using pxa2xx_spi_off Shih-Yuan Lee
2026-07-20 19:53   ` Andy Shevchenko
2026-07-20 16:21 ` [PATCH v16 4/7] spi: pxa2xx: lock out runtime autosuspend for Intel LPSS SPI in PIO mode Shih-Yuan Lee
2026-07-20 19:55   ` Andy Shevchenko
2026-07-20 16:21 ` [PATCH v16 5/7] spi: pxa2xx: disable DMA for Apple MacBook8,1 Shih-Yuan Lee
2026-07-20 19:27   ` Andy Shevchenko
2026-07-21 14:49     ` Shih-Yuan Lee (FourDollars)
2026-07-21 20:31       ` Andy Shevchenko
2026-07-21  9:00   ` Lukas Wunner
2026-07-21  9:26     ` Shih-Yuan Lee (FourDollars)
2026-07-21 14:34       ` Shih-Yuan Lee (FourDollars)
2026-07-21 15:05         ` Mark Brown
2026-07-21 15:26           ` Shih-Yuan Lee (FourDollars)
2026-07-21 16:09             ` Shih-Yuan Lee (FourDollars)
2026-07-21 20:41               ` Andy Shevchenko
2026-07-22  9:58               ` Lukas Wunner
2026-07-21 20:28             ` Andy Shevchenko
2026-07-20 16:21 ` [PATCH v16 6/7] spi: pxa2xx: restore LPSS private register state on S3 resume Shih-Yuan Lee
2026-07-20 19:59   ` Andy Shevchenko [this message]
2026-07-20 16:21 ` [PATCH v16 7/7] spi: pxa2xx: rename local status variable to ret Shih-Yuan Lee
2026-07-20 19:56   ` Andy Shevchenko

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