From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <iommu@lists.linux.dev>, "Joerg Roedel (AMD)" <joro@8bytes.org>,
Jean-Philippe Brucker <jpb@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
David Matlack <dmatlack@google.com>,
"Pasha Tatashin" <pasha.tatashin@soleen.com>,
<patches@lists.linux.dev>,
"Pranjal Shrivastava" <praan@google.com>,
Samiullah Khawaja <skhawaja@google.com>,
Mostafa Saleh <smostafa@google.com>
Subject: Re: [PATCH v3 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it
Date: Tue, 14 Jul 2026 18:45:55 -0700 [thread overview]
Message-ID: <albmU+R52NGo4nRu@nvidia.com> (raw)
In-Reply-To: <0-v3-4e7f64f4e094+85e-smmu_tlbi_jgg@nvidia.com>
On Tue, Jul 14, 2026 at 03:46:00PM -0300, Jason Gunthorpe wrote:
> v3:
> - Carry the base translation granule in the TLBI description and pass the
> domain separately
> - Invalidate the leaves when doing a table invalidation too, corrects a
> missed invalidation but means we don't do anything about the duplicate
> invalidations.
> - Simplify the control flow in a few places
> - Clarify the TTL derivation and accomodate DS
I tested this series alone for sanity. S1, S2, SVA invalidations
all work fine.
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
prev parent reply other threads:[~2026-07-15 1:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 18:46 [PATCH v3 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Jason Gunthorpe
2026-07-14 18:46 ` [PATCH v3 1/8] iommu/arm-smmu-v3: Pass the parameters for the invalidation in a struct Jason Gunthorpe
2026-07-14 18:46 ` [PATCH v3 2/8] iommu/arm-smmu-v3: Move pgsize out of arm_smmu_inv Jason Gunthorpe
2026-07-14 18:46 ` [PATCH v3 3/8] iommu/arm-smmu-v3: Optimize range invalidation for latency Jason Gunthorpe
2026-07-14 18:46 ` [PATCH v3 4/8] iommu/arm-smmu-v3: Keep track in the arm_smmu_invs if RIL is used Jason Gunthorpe
2026-07-14 18:46 ` [PATCH v3 5/8] iommu/arm-smmu-v3: Precompute the invalidation commands Jason Gunthorpe
2026-07-14 21:42 ` Nicolin Chen
2026-07-14 18:46 ` [PATCH v3 6/8] iommu/arm-smmu-v3: Populate the tlbi at the top of the call chain Jason Gunthorpe
2026-07-14 21:29 ` Nicolin Chen
2026-07-14 18:46 ` [PATCH v3 7/8] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Jason Gunthorpe
2026-07-14 23:09 ` Nicolin Chen
2026-07-14 18:46 ` [PATCH v3 8/8] iommu/arm-smmu-v3: Support the DS expansion of RIL's SCALE Jason Gunthorpe
2026-07-15 1:45 ` Nicolin Chen [this message]
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