Re: [PATCH v2 2/2] iommu/arm-smmu-v3: Add HAFT support for SVA

[Jason Gunthorpe <jgg@nvidia.com>]

On Sun, Jul 26, 2026 at 01:00:38PM +0100, Will Deacon wrote:
> On Sat, Jul 25, 2026 at 11:27:59AM -0300, Jason Gunthorpe wrote:
> > On Thu, Jul 23, 2026 at 03:19:44PM +0100, Robin Murphy wrote:
> > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> > > @@ -102,6 +102,8 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target,
> > >  			target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HA);
> > >  		if (master->smmu->features & ARM_SMMU_FEAT_HD)
> > >  			target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HD);
> > > +		if (master->smmu->features & ARM_SMMU_FEAT_HAFT && system_supports_haft())
> > > +			target->data[1] |= cpu_to_le64(CTXDESC_CD_1_HAFT);
> > >  	} else {
> > >  		target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_EPD0);
> > 
> > Based on the Sashiko remark and your note you should lift all the
> > HA/HD/HAFT bits outside this if (mm) block.
> > 
> > AFAICT it is fine for HA/HD/HAFT to be set with EPD0, the HW won't
> > process any PTEs so they won't have any effect.
> 
> I'm not sure about that. The spec says this about CD.HAFT:
> 
> | If CD.HA is 0 and not IGNORED, it is ILLEGAL to set this field to 1
> | and this results in C_BAD_CD.

Right, this is what Robin pointed to
 
> so the question is whether or not CD.HA is IGNORED when EPD0 is set, and
> I couldn't find anything to suggest that is the case (which kinda makes
> sense, given that there are two TTBs).

Not quite, I said to lift all three bits out. So the spec question is
if any HA/HD/HAFT have to be zero when EPD0 is set, and I think it
does not say that (again it makes sense since there are two TTBs)?

Basically we want HA=1, HAFT=1, EPD0=1, TTBR0=0 as the "drop"
configuration.

IOW I don't think there was any reason HA/HD were put in that branch
in the first place.

Jason