From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: zl020895 <zl020895@163.com>
Cc: longzhao <longzhao@ambarella.com>, Arnd Bergmann <arnd@arndb.de>,
Krzysztof Kozlowski <krzk@kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
soc <soc@lists.linux.dev>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
linux-gpio <linux-gpio@vger.kernel.org>,
linux-serial <linux-serial@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Brian Masney <bmasney@redhat.com>, Lee Jones <lee@kernel.org>,
mfd <mfd@lists.linux.dev>
Subject: Re: Re: Re: [PATCH v5 10/12] serial: 8250: add Ambarella UART driver
Date: Wed, 19 Aug 2026 10:34:46 +0300 [thread overview]
Message-ID: <aoVclvO1eAV3TULu@ashevche-desk.local> (raw)
In-Reply-To: <4dfe3bbe.2c34f.1a018d297c3.Coremail.zl020895@163.com>
On Wed, Aug 19, 2026 at 03:00:49PM +0800, zl020895 wrote:
>
> The register layout is 16550-compatible with reg-shift = 2, and it has a
> USR-style busy bit at a similar offset to DW APB UART. That is why it looks
> Synopsys-like and why we first tried 8250_dw.
I see.
> It is still Ambarella IP, not a Synopsys DesignWare license. Besides the
> common 8250 map it has Ambarella-specific pieces (e.g. IER ETOI, and DMA via
> DMAE/DMAF rather than the DW DMA path). DMA support is out of scope for this
> minimal bring-up series; the current driver is PIO / console only.
Okay, put the summary and the details of this discussion in the commit message
of the next version to make sure we have a justification for a new driver and
some pieces that looks like Synopsys DesignWare.
Also try to make the driver really bare minimum without any blindly copied
pieces or "features" that are not related to your HW or will be implemented
differently in the future.
> Sorry, I do not have a public datasheet URL I can post.
If you can share register layout with small descriptions (even privately) it
would be helpful (some pages from your datasheet, for example).
> ---- Replied Message ----
> | From | Andy Shevchenko<andriy.shevchenko@linux.intel.com> |
> | Date | 08/19/2026 14:50 |
> On Wed, Aug 19, 2026 at 02:31:59PM +0800, zl020895 wrote:
>
> > This is Ambarella 8250-compatible IP, not Synopsys DesignWare. We
> > first tried 8250_dw after Linus asked us to move to the 8250 library;
> > you then told us not to touch 8250_dw and to use 8250_ambarella
> > instead. That is what this patch is.
> > Background:
> > https://lore.kernel.org/r/CAD++jLm6HzEU1TM-c=Vtjv3FJEBecVP7TyxSgq_Q0zF-YwT6NA@mail.gmail.com/
> > https://lore.kernel.org/linux-serial/an8KvvHWX0naH3Xw@ashevche-desk.local/
> > https://lore.kernel.org/linux-serial/7E774305-3920-4BB7-BA46-E0772D6BED84@ambarella.com/
> > I will also switch to uart_read_port_properties() and trim the
> > 8250_dw-derived boilerplate.
>
> But it has layout like Synopsys? Do you have a link to the datasheet?
>
> > ---- Replied Message ----
> > | From | Andy Shevchenko<andriy.shevchenko@linux.intel.com> |
> > | Date | 08/18/2026 22:17 |
> > On Tue, Aug 18, 2026 at 06:31:24PM +0800, Long Zhao via B4 Relay wrote:
> >
> > > Add an 8250 platform driver for Ambarella CV75 instead of claiming
> > > snps,dw-apb-uart compatibility.
> >
> > This is a record from a changelog. There is nothing in the commit message.
...
> > The code seems like an almost blind copy of 8250_dw.c.
> >
> > > +#define AMBARELLA_UART_USR 0x1f
> > > +#define AMBARELLA_UART_USR_BUSY BIT(0)
> >
> > So, is it Synopsys IP-based design? How this gets into this platform? This
> > whole story completely made me lost.
> >
> > > +#define AMBARELLA_UART_IIR_IID GENMASK(3, 0)
> > > +#define AMBARELLA_UART_IIR_STATUS GENMASK(5, 0)
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-08-19 7:35 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 10:31 [PATCH v5 00/12] Ambarella CV75 SoC minimal bring-up Long Zhao via B4 Relay
2026-08-18 10:31 ` [PATCH v5 01/12] dt-bindings: arm: add Ambarella CV75 platforms Long Zhao via B4 Relay
2026-08-18 10:31 ` [PATCH v5 02/12] dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad Long Zhao via B4 Relay
2026-08-18 19:27 ` Krzysztof Kozlowski
2026-08-19 9:21 ` zl020895
2026-08-18 10:31 ` [PATCH v5 03/12] dt-bindings: clock: add Ambarella CV75 RCT Long Zhao via B4 Relay
2026-08-18 19:28 ` Krzysztof Kozlowski
2026-08-18 10:31 ` [PATCH v5 04/12] dt-bindings: pinctrl: add Ambarella CV75 pinctrl Long Zhao via B4 Relay
2026-08-18 10:31 ` [PATCH v5 05/12] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-08-19 7:47 ` Linus Walleij
2026-08-19 9:04 ` zl020895
2026-08-19 10:02 ` Linus Walleij
2026-08-18 10:31 ` [PATCH v5 06/12] dt-bindings: serial: add Ambarella CV75 UART Long Zhao via B4 Relay
2026-08-19 7:32 ` Linus Walleij
2026-08-19 7:37 ` Krzysztof Kozlowski
2026-08-19 9:26 ` zl020895
2026-08-18 10:31 ` [PATCH v5 07/12] clk: ambarella: add CV75 CCU driver Long Zhao via B4 Relay
2026-08-18 10:31 ` [PATCH v5 08/12] gpio: pl061: add Ambarella CV75 register layout variant Long Zhao via B4 Relay
2026-08-18 14:11 ` Andy Shevchenko
[not found] ` <79f6dc8c.2c42c.1a018dadd29.Coremail.zl020895@163.com>
2026-08-19 7:27 ` Andy Shevchenko
2026-08-18 10:31 ` [PATCH v5 09/12] pinctrl: ambarella: add CV75 pin controller Long Zhao via B4 Relay
2026-08-18 10:31 ` [PATCH v5 10/12] serial: 8250: add Ambarella UART driver Long Zhao via B4 Relay
2026-08-18 14:17 ` Andy Shevchenko
[not found] ` <162c0385.2c076.1a018b82fa7.Coremail.zl020895@163.com>
2026-08-19 6:50 ` Andy Shevchenko
[not found] ` <4dfe3bbe.2c34f.1a018d297c3.Coremail.zl020895@163.com>
2026-08-19 7:34 ` Andy Shevchenko [this message]
2026-08-18 10:31 ` [PATCH v5 11/12] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT Long Zhao via B4 Relay
2026-08-18 10:31 ` [PATCH v5 12/12] MAINTAINERS: add ARM/AMBARELLA SoC support Long Zhao via B4 Relay
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