Linux-ARM-Kernel Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Nicolin Chen <nicolinc@nvidia.com>
To: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>, <jgg@nvidia.com>,
	<joro@8bytes.org>, <bhelgaas@google.com>, <praan@google.com>,
	<kevin.tian@intel.com>, <kees@kernel.org>, <smostafa@google.com>,
	<baolu.lu@linux.intel.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<skaestle@nvidia.com>, <mmarrid@nvidia.com>,
	<skolothumtho@nvidia.com>, <bbiber@nvidia.com>,
	<harsha.v@oss.qualcomm.com>
Subject: Re: [PATCH v3 13/13] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device()
Date: Fri, 4 Sep 2026 22:53:27 -0700	[thread overview]
Message-ID: <apuuV04NRqljXnIK@nvidia.com> (raw)
In-Reply-To: <178846311320.1308030.2192800704181905560.b4-review@b4>

On Thu, Sep 03, 2026 at 12:18:33PM -0700, Jonathan Cameron wrote:
> > SMMUv3 forbids the Stall model on PCIe streams. Refuse to enable PRI on a
> > PCIe master that came with stall_enabled, so page_response() can dispatch
> > on master state unambiguously.
> 
> As earlier, we have exceptions in tree for Stall mode on PCIe streams
> (lets not reopen that fun arguement) so I'd focus this on PRI not
> making any sense if stall mode is in use as that has alternative
> handling for page faults.

Replaced with:

A stalling master resolves its faults synchronously, so it has no reason at
all to issue a page request. Refuse to enable PRI on such a master, so that
page_response() can keep dispatching on the master state unambiguously.

> > +	/* Same as the eventq drain above, for the hardware priq */
> > +	if (master->pri_enabled) {
> > +		ret |= arm_smmu_drain_queue(smmu, &smmu->priq.q, false);
> > +		/* Ensure pending requests have reached the IOPF queue */
> > +		if (!ret && smmu->priq.q.irq)
> 
> Similar to before, I'd factor out the if (!ret)
> Using |= on return values is never particularly nice though safe
> as used here.  Still I'd use another variable to store that things
> timed out already so we are skipping these.

OK. Replaced with a "bool timed_out" (in both PATCH-4 and here):

@@ void arm_smmu_attach_release(struct arm_smmu_attach_state *state)
 	struct arm_smmu_master_domain *master_domain = state->old_master_domain;
 	struct arm_smmu_master *master = state->master;
 	struct arm_smmu_device *smmu = master->smmu;
-	int ret = 0;
+	bool timed_out = false;
 
 	lockdep_assert_not_held(&arm_smmu_asid_lock);
 	iommu_group_mutex_assert(master->dev);
@@ void arm_smmu_attach_release(struct arm_smmu_attach_state *state)
 	 * against the next domain.
 	 */
 	if (master->stall_enabled) {
-		ret = arm_smmu_wait_for_queue_drained(smmu, &smmu->evtq.q, false);
+		timed_out = arm_smmu_wait_for_queue_drained(smmu, &smmu->evtq.q,
+							    false);
 		/*
 		 * Ensure pending events have reached the IOPF queue, unless
 		 * the drain timed out: a stuck consumer would also block an
 		 * unbounded wait_event() inside the synchronize_irq().
 		 */
-		if (!ret) {
+		if (!timed_out) {
 			if (smmu->evtq.q.irq)
 				synchronize_irq(smmu->evtq.q.irq);
 			/* Pending events might be in the combined_irq handler */
@@ void arm_smmu_attach_release(struct arm_smmu_attach_state *state)
 
 	/* Same as the eventq drain above, for the hardware priq */
 	if (master->pri_enabled) {
-		ret |= arm_smmu_wait_for_queue_drained(smmu, &smmu->priq.q, false);
+		timed_out |= arm_smmu_wait_for_queue_drained(
+			smmu, &smmu->priq.q, false);
 		/* Ensure pending requests have reached the IOPF queue */
-		if (!ret) {
+		if (!timed_out) {
 			if (smmu->priq.q.irq)
 				synchronize_irq(smmu->priq.q.irq);
 			/* Pending requests might be in the combined_irq handler */
@@ void arm_smmu_attach_release(struct arm_smmu_attach_state *state)
 		 * such work still references. Skip the iopf teardown and
 		 * leak master_domain, rather than risk a UAF.
 		 */
-		if (WARN_ON(ret)) {
+		if (WARN_ON(timed_out)) {
 			state->old_master_domain = NULL;
 			return;
 		}

> > +	if (!pci_pri_supported(pdev))
> > +		return;
> > +
> > +	/* SMMUv3 forbids the Stall model on PCIe streams */
> 
> Again, I'd tweak the wording given we have quite a few examples
> in tree that do stall mode on PCIe smelling streams.

Replaced with:
	/* A stalling master resolves its faults without any page request */

Thanks
Nicolin


  reply	other threads:[~2026-09-05  5:54 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01  0:33 [PATCH v3 00/13] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 01/13] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-04 20:16     ` Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 02/13] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 03/13] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-04 14:09     ` Jason Gunthorpe
2026-09-04 22:57       ` Nicolin Chen
2026-09-04 21:42     ` Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 04/13] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-05  0:54     ` Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 05/13] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-01  0:33 ` [PATCH v3 06/13] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-05  1:15     ` Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 07/13] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-05  3:24     ` Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 08/13] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-04 14:15     ` Jason Gunthorpe
2026-09-01  0:33 ` [PATCH v3 09/13] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-05  5:08     ` Nicolin Chen
2026-09-01  0:33 ` [PATCH v3 10/13] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-01  0:33 ` [PATCH v3 11/13] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-01  0:33 ` [PATCH v3 12/13] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-01  0:33 ` [PATCH v3 13/13] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
2026-09-03 19:18   ` Jonathan Cameron
2026-09-05  5:53     ` Nicolin Chen [this message]
2026-09-03 19:18 ` [PATCH v3 00/13] iommu/arm-smmu-v3: Add PRI support Jonathan Cameron
2026-09-04 14:10   ` Jason Gunthorpe

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=apuuV04NRqljXnIK@nvidia.com \
    --to=nicolinc@nvidia.com \
    --cc=baolu.lu@linux.intel.com \
    --cc=bbiber@nvidia.com \
    --cc=bhelgaas@google.com \
    --cc=harsha.v@oss.qualcomm.com \
    --cc=iommu@lists.linux.dev \
    --cc=jgg@nvidia.com \
    --cc=jonathan.cameron@oss.qualcomm.com \
    --cc=joro@8bytes.org \
    --cc=kees@kernel.org \
    --cc=kevin.tian@intel.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=mmarrid@nvidia.com \
    --cc=praan@google.com \
    --cc=robin.murphy@arm.com \
    --cc=skaestle@nvidia.com \
    --cc=skolothumtho@nvidia.com \
    --cc=smostafa@google.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox