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From: Baolu Lu <baolu.lu@linux.intel.com>
To: Nicolin Chen <nicolinc@nvidia.com>, Will Deacon <will@kernel.org>,
	Jason Gunthorpe <jgg@nvidia.com>,
	Kevin Tian <kevin.tian@intel.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>, Shuah Khan <shuah@kernel.org>,
	Pranjal Shrivastava <praan@google.com>,
	Kees Cook <kees@kernel.org>, Yi Liu <yi.l.liu@intel.com>,
	Eric Auger <eric.auger@redhat.com>,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v1 1/4] iommufd: Set upper bounds on cache invalidation entry_num and entry_len
Date: Wed, 10 Jun 2026 11:16:10 +0800	[thread overview]
Message-ID: <b2119f23-190b-4dcc-bc63-9554f0f8383a@linux.intel.com> (raw)
In-Reply-To: <447fa93663f7526eb361719e83fa8b649464483d.1780521606.git.nicolinc@nvidia.com>

On 6/4/26 05:26, Nicolin Chen wrote:
> iommufd_hwpt_invalidate() takes a user-controlled entry_num and entry_len,
> each bounded only by U32_MAX. An entry_len beyond the kernel's struct size
> makes the copy helper verify the extra bytes are zero, scanning that excess
> in one uninterruptible pass; a multi-gigabyte value over zeroed user memory
> trips the soft-lockup watchdog.
> 
> A large entry_num is the other half, driving the backend invalidation loop
> with no reschedule. The VT-d nested handler, for one, copies each entry and
> flushes caches per iteration, pinning the CPU on a non-preemptible kernel.
> 
> Cap both in the ioctl. entry_len is held under PAGE_SIZE, above any request
> struct, and entry_num under 1 << 19, the order of a hardware invalidation
> queue and well beyond any real batch, bounding the per-call loop length.
> 
> Fixes: 8c6eabae3807 ("iommufd: Add IOMMU_HWPT_INVALIDATE")
> Cc:stable@vger.kernel.org
> Assisted-by:Claude:claude-opus-4-8
> Signed-off-by: Nicolin Chen<nicolinc@nvidia.com>
> ---
>   drivers/iommu/iommufd/hw_pagetable.c | 11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)

Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>


  reply	other threads:[~2026-06-10  3:17 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-03 21:26 [PATCH v1 0/4] iommufd: Cache invalidation hardening and SMMUv3 batching rework Nicolin Chen
2026-06-03 21:26 ` [PATCH v1 1/4] iommufd: Set upper bounds on cache invalidation entry_num and entry_len Nicolin Chen
2026-06-10  3:16   ` Baolu Lu [this message]
2026-06-03 21:26 ` [PATCH v1 2/4] iommufd/selftest: Add invalidation entry_num and entry_len boundary tests Nicolin Chen
2026-06-10  3:18   ` Baolu Lu
2026-06-03 21:26 ` [PATCH v1 3/4] iommu: Avoid copying the user array twice in the full-array copy helper Nicolin Chen
2026-06-10  3:21   ` Baolu Lu
2026-06-03 21:26 ` [PATCH v1 4/4] iommu/arm-smmu-v3: Process vIOMMU invalidations in batches Nicolin Chen

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