From: Vignesh Raghavendra <vigneshr@ti.com>
To: Pratyush Yadav <p.yadav@ti.com>, Nishanth Menon <nm@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/3] arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0
Date: Fri, 5 Mar 2021 21:43:32 +0530 [thread overview]
Message-ID: <cbc23906-68cd-d885-2a81-c6088c402caf@ti.com> (raw)
In-Reply-To: <20210305153926.3479-4-p.yadav@ti.com>
On 3/5/21 9:09 PM, Pratyush Yadav wrote:
> TI J7200 has the Cadence OSPI controller for interfacing with OSPI
> flashes. Add its node to allow using SPI flashes.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> ---
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
>
> Notes:
> Changes in v2:
> - Do not force a pulldown on the DQS line because it already has a
> pulldown resistor.
>
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 17 +++++++++
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 36 +++++++++++++++++++
> 2 files changed, 53 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 359e3e8a8cd0..5408ec815d58 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -269,6 +269,23 @@ hbmc: hyperbus@47034000 {
> #size-cells = <1>;
> mux-controls = <&hbmc_mux 0>;
> };
> +
> + ospi0: spi@47040000 {
> + compatible = "ti,am654-ospi";
> + reg = <0x0 0x47040000 0x0 0x100>,
> + <0x5 0x00000000 0x1 0x0000000>;
> + interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
> + cdns,fifo-depth = <256>;
> + cdns,fifo-width = <4>;
> + cdns,trigger-address = <0x0>;
> + clocks = <&k3_clks 103 0>;
> + assigned-clocks = <&k3_clks 103 0>;
> + assigned-clock-parents = <&k3_clks 103 2>;
> + assigned-clock-rates = <166666666>;
> + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> };
>
> tscadc0: tscadc@40200000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index a988e2ab2ba1..34724440171a 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -100,6 +100,22 @@ J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
> J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
> >;
> };
> +
> + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
> + pinctrl-single,pins = <
> + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
> + J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
> + J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
> + J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
> + J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
> + J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
> + J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
> + J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
> + J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
> + J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
> + J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
> + >;
> + };
> };
>
> &main_pmx0 {
> @@ -235,3 +251,23 @@ exp_som: gpio@21 {
> "GPIO_LIN_EN", "CAN_STB";
> };
> };
> +
> +&ospi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
> +
> + flash@0{
> + compatible = "jedec,spi-nor";
> + reg = <0x0>;
> + spi-tx-bus-width = <8>;
> + spi-rx-bus-width = <8>;
> + spi-max-frequency = <25000000>;
> + cdns,tshsl-ns = <60>;
> + cdns,tsd2d-ns = <60>;
> + cdns,tchsh-ns = <60>;
> + cdns,tslch-ns = <60>;
> + cdns,read-delay = <4>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> +};
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-05 16:15 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-05 15:39 [PATCH v2 0/3] Enable 8D-8D-8D mode on J721E, J7200, AM654 Pratyush Yadav
2021-03-05 15:39 ` [PATCH v2 1/3] arm64: dts: ti: k3-j721e-som-p0: Enable 8D-8D-8D mode on OSPI Pratyush Yadav
2021-03-05 16:12 ` Vignesh Raghavendra
2021-03-05 15:39 ` [PATCH v2 2/3] arm64: dts: ti: am654-base-board: " Pratyush Yadav
2021-03-05 16:12 ` Vignesh Raghavendra
2021-03-05 15:39 ` [PATCH v2 3/3] arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0 Pratyush Yadav
2021-03-05 16:13 ` Vignesh Raghavendra [this message]
2021-03-11 13:22 ` Nishanth Menon
2021-03-11 13:41 ` Pratyush Yadav
2021-03-11 13:49 ` Nishanth Menon
2021-03-09 17:01 ` Nishanth Menon
2021-03-11 14:17 ` [PATCH v2 0/3] Enable 8D-8D-8D mode on J721E, J7200, AM654 Nishanth Menon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cbc23906-68cd-d885-2a81-c6088c402caf@ti.com \
--to=vigneshr@ti.com \
--cc=devicetree@vger.kernel.org \
--cc=kristo@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=p.yadav@ti.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox