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From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/2] arm64: dts: renesas: condor: add PCIe support
Date: Thu, 14 Jun 2018 22:19:58 +0300	[thread overview]
Message-ID: <eba72bac-60f8-2c09-e3e7-4b6a73e5fdfa@cogentembedded.com> (raw)
In-Reply-To: <b37d458c-071a-833a-2057-be8a07c880be@cogentembedded.com>

Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor
board.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 2:
- mentioned Vladimir's original work and added his signoff;
- refreshed the patch.

 arch/arm64/boot/dts/renesas/r8a77980-condor.dts |   12 ++++++++++++
 1 file changed, 12 insertions(+)

Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -223,6 +223,18 @@
 	status = "okay";
 };
 
+&pciec {
+	status = "okay";
+};
+
+&pcie_bus_clk {
+	clock-frequency = <100000000>;
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
 &pfc {
 	avb_pins: avb {
 		groups = "avb_mdio", "avb_rgmii";

  parent reply	other threads:[~2018-06-14 19:19 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-14 19:16 [PATCH v2 0/2] Add R8A77980/Condor PCIe support Sergei Shtylyov
2018-06-14 19:17 ` [PATCH v2 1/2] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
2018-06-20  8:49   ` Simon Horman
2018-06-14 19:19 ` Sergei Shtylyov [this message]
2018-06-18  9:36 ` [PATCH v2 0/2] Add R8A77980/Condor " Simon Horman
2018-06-18 16:16   ` Sergei Shtylyov
2018-06-20  8:50     ` Simon Horman

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