* [PATCH 2/2] davinci: Disable modem status (CTS) interrupts on UART1
From: Michael Williamson @ 2011-01-04 13:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294149062-31173-1-git-send-email-michael.williamson@criticallink.com>
All supported configurations of the MityDSP-L138 and MityARM-1808 platforms do
not use the CTS pin associated with UART1 as a CTS function. Instead, this
pin is typically configured as AHCLKX for the McASP or as the USB reference clock.
Disable the modem status interrupts that may be generated by this pin toggling.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
---
arch/arm/mach-davinci/board-mityomapl138.c | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 0bb5f0c..87ffe06 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -17,6 +17,7 @@
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/etherdevice.h>
+#include <linux/serial_8250.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -352,6 +353,16 @@ static struct platform_device da850_pm_device = {
.id = -1,
};
+static void __init mityomapl138_init_serial(void)
+{
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+ struct device *dev = &soc_info->serial_dev->dev;
+ struct plat_serial8250_port *p = dev->platform_data;
+
+ p[1].flags |= UPF_NO_MSR;
+ davinci_serial_init(&mityomapl138_uart_config);
+}
+
static void __init mityomapl138_init(void)
{
int ret;
@@ -365,7 +376,7 @@ static void __init mityomapl138_init(void)
if (ret)
pr_warning("watchdog registration failed: %d\n", ret);
- davinci_serial_init(&mityomapl138_uart_config);
+ mityomapl138_init_serial();
ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
if (ret)
--
1.7.0.4
^ permalink raw reply related
* [PATCH 1/2] serial: Provide capability to disable modem status interrupts in 8250 driver
From: Michael Williamson @ 2011-01-04 13:51 UTC (permalink / raw)
To: linux-arm-kernel
Certain SOC platforms utilize the 8250 serial UART core that do not provide
valid modem control lines (in particular, CTS). A mechanism is needed to
allow platforms to configure the 8250 driver to disable modem status interrupts.
Add a new UPF_NO_MSR flag and use it to check for the condition.
This patch was tested using a MityDSP-L138F platform having a UART CTS pin
connected to a clock signal (and configured, via pinmux, as a clock input
for another peripheral function).
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
---
Tested against linux-davinci tree.
Checked that patch against davinci-next was successful.
drivers/serial/8250.c | 3 ++-
include/linux/serial_core.h | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 09a5508..5b9e9f3 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2613,7 +2613,8 @@ static void serial8250_config_port(struct uart_port *port, int flags)
autoconfig(up, probeflags);
/* if access method is AU, it is a 16550 with a quirk */
- if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
+ if ((up->port.type == PORT_16550A && up->port.iotype == UPIO_AU) ||
+ up->port.flags & UPF_NO_MSR)
up->bugs |= UART_BUG_NOMSR;
if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 212eb4c..e76064e 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -339,6 +339,7 @@ struct uart_port {
#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
#define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
+#define UPF_NO_MSR ((__force upf_t) (1 << 17))
#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
/* The exact UART type is known and should not be probed. */
@@ -348,7 +349,7 @@ struct uart_port {
#define UPF_DEAD ((__force upf_t) (1 << 30))
#define UPF_IOREMAP ((__force upf_t) (1 << 31))
-#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
+#define UPF_CHANGE_MASK ((__force upf_t) (0x37fff))
#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
unsigned int mctrl; /* current modem ctrl settings */
--
1.7.0.4
^ permalink raw reply related
* [PATCH v8 7/7] omap3: nand: making ecc layout as compatible with romcode ecc
From: Sukumar Ghorai @ 2011-01-04 13:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294148004-10789-1-git-send-email-s-ghorai@ti.com>
This patch overrides nand ecc layout and bad block descriptor (for 8-bit
device) to support hw ecc in romcode layout. So as to have in sync with ecc
layout throughout; i.e. x-loader, u-boot and kernel.
This enables to flash x-loader, u-boot, kernel, FS images from kernel itself
and compatiable with other tools.
This patch does not enables this feature by default and need to pass from
board file to enable for any board.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
---
arch/arm/plat-omap/include/plat/gpmc.h | 2 +
drivers/mtd/nand/omap2.c | 37 +++++++++++++++++++++++++++++++-
2 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index bc325c5..c07f3f2 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -90,6 +90,8 @@ enum omap_ecc {
/* 1-bit ecc: stored at end of spare area */
OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
+ /* 1-bit ecc: stored at begining of spare area as romcode */
+ OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
};
/*
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 6d4a42e..4e33972 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -98,6 +98,20 @@
static const char *part_probes[] = { "cmdlinepart", NULL };
#endif
+/* oob info generated runtime depending on ecc algorithm and layout selected */
+static struct nand_ecclayout omap_oobinfo;
+/* Define some generic bad / good block scan pattern which are used
+ * while scanning a device for factory marked good / bad blocks
+ */
+static uint8_t scan_ff_pattern[] = { 0xff };
+static struct nand_bbt_descr bb_descrip_flashbased = {
+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .offs = 0,
+ .len = 1,
+ .pattern = scan_ff_pattern,
+};
+
+
struct omap_nand_info {
struct nand_hw_control controller;
struct omap_nand_platform_data *pdata;
@@ -914,6 +928,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
struct omap_nand_info *info;
struct omap_nand_platform_data *pdata;
int err;
+ int i, offset;
pdata = pdev->dev.platform_data;
if (pdata == NULL) {
@@ -1037,7 +1052,8 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
/* selsect the ecc type */
if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
info->nand.ecc.mode = NAND_ECC_SOFT;
- else if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) {
+ else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
+ (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
info->nand.ecc.bytes = 3;
info->nand.ecc.size = 512;
info->nand.ecc.calculate = omap_calculate_ecc;
@@ -1057,6 +1073,25 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
}
}
+ /* rom code layout */
+ if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
+
+ if (info->nand.options & NAND_BUSWIDTH_16)
+ offset = 2;
+ else {
+ offset = 1;
+ info->nand.badblock_pattern = &bb_descrip_flashbased;
+ }
+ omap_oobinfo.eccbytes = 3 * (info->mtd.oobsize/16);
+ for (i = 0; i < omap_oobinfo.eccbytes; i++)
+ omap_oobinfo.eccpos[i] = i+offset;
+
+ omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
+ omap_oobinfo.oobfree->length = info->mtd.oobsize -
+ (offset + omap_oobinfo.eccbytes);
+
+ info->nand.ecc.layout = &omap_oobinfo;
+ }
#ifdef CONFIG_MTD_PARTITIONS
err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v8 5/7] omap3: nand: configurable fifo threshold to gain the throughput
From: Sukumar Ghorai @ 2011-01-04 13:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294148004-10789-1-git-send-email-s-ghorai@ti.com>
Configure the FIFO THREASHOLD value different for read and write to keep busy
both filling and to drain out of FIFO at reading and writing.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
---
arch/arm/mach-omap2/gpmc.c | 11 +++++++----
arch/arm/plat-omap/include/plat/gpmc.h | 5 ++++-
drivers/mtd/nand/omap2.c | 22 ++++++++++++++--------
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index a2df8b1..117ab29 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -59,7 +59,6 @@
#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
#define GPMC_SECTION_SHIFT 28 /* 128 MB */
-#define PREFETCH_FIFOTHRESHOLD (0x40 << 8)
#define CS_NUM_SHIFT 24
#define ENABLE_PREFETCH (0x1 << 7)
#define DMA_MPU_MODE 2
@@ -595,15 +594,19 @@ EXPORT_SYMBOL(gpmc_nand_write);
/**
* gpmc_prefetch_enable - configures and starts prefetch transfer
* @cs: cs (chip select) number
+ * @fifo_th: fifo threshold to be used for read/ write
* @dma_mode: dma mode enable (1) or disable (0)
* @u32_count: number of bytes to be transferred
* @is_write: prefetch read(0) or write post(1) mode
*/
-int gpmc_prefetch_enable(int cs, int dma_mode,
+int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
unsigned int u32_count, int is_write)
{
- if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
+ if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) {
+ pr_err("gpmc: fifo threshold is not supported\n");
+ return -1;
+ } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
/* Set the amount of bytes to be prefetched */
gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
@@ -611,7 +614,7 @@ int gpmc_prefetch_enable(int cs, int dma_mode,
* enable the engine. Set which cs is has requested for.
*/
gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) |
- PREFETCH_FIFOTHRESHOLD |
+ PREFETCH_FIFOTHRESHOLD(fifo_th) |
ENABLE_PREFETCH |
(dma_mode << DMA_MPU_MODE) |
(0x1 & is_write)));
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 054e704..9e4dc7a 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -83,6 +83,9 @@
#define GPMC_IRQ_FIFOEVENTENABLE 0x01
#define GPMC_IRQ_COUNT_EVENT 0x02
+#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
+#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
+
/*
* Note that all values in this struct are in nanoseconds, while
* the register values are in gpmc_fck cycles.
@@ -133,7 +136,7 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
extern void gpmc_cs_free(int cs);
extern int gpmc_cs_set_reserved(int cs, int reserved);
extern int gpmc_cs_reserved(int cs);
-extern int gpmc_prefetch_enable(int cs, int dma_mode,
+extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
unsigned int u32_count, int is_write);
extern int gpmc_prefetch_reset(int cs);
extern void omap3_gpmc_save_context(void);
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index fbe8414..f1648fd 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -244,7 +244,8 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
}
/* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0);
+ ret = gpmc_prefetch_enable(info->gpmc_cs,
+ PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x0);
if (ret) {
/* PFPW engine is busy, use cpu copy method */
if (info->nand.options & NAND_BUSWIDTH_16)
@@ -289,7 +290,8 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
}
/* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x1);
+ ret = gpmc_prefetch_enable(info->gpmc_cs,
+ PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x1);
if (ret) {
/* PFPW engine is busy, use cpu copy method */
if (info->nand.options & NAND_BUSWIDTH_16)
@@ -345,8 +347,9 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
int ret;
unsigned long tim, limit;
- /* The fifo depth is 64 bytes. We have a sync at each frame and frame
- * length is 64 bytes.
+ /* The fifo depth is 64 bytes max.
+ * But configure the FIFO-threahold to 32 to get a sync at each frame
+ * and frame length is 32 bytes.
*/
int buf_len = len >> 6;
@@ -387,7 +390,8 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
OMAP24XX_DMA_GPMC, OMAP_DMA_SRC_SYNC);
}
/* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x1, len, is_write);
+ ret = gpmc_prefetch_enable(info->gpmc_cs,
+ PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write);
if (ret)
/* PFPW engine is busy, use cpu copy method */
goto out_copy;
@@ -522,7 +526,8 @@ static void omap_read_buf_irq_pref(struct mtd_info *mtd, u_char *buf, int len)
init_completion(&info->comp);
/* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0);
+ ret = gpmc_prefetch_enable(info->gpmc_cs,
+ PREFETCH_FIFOTHRESHOLD_MAX/2, 0x0, len, 0x0);
if (ret)
/* PFPW engine is busy, use cpu copy method */
goto out_copy;
@@ -569,8 +574,9 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
info->buf = (u_char *) buf;
init_completion(&info->comp);
- /* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x1);
+ /* configure and start prefetch transfer : size=24 */
+ ret = gpmc_prefetch_enable(info->gpmc_cs,
+ (PREFETCH_FIFOTHRESHOLD_MAX * 3) / 8, 0x0, len, 0x1);
if (ret)
/* PFPW engine is busy, use cpu copy method */
goto out_copy;
--
1.7.0.4
^ permalink raw reply related
* [PATCH v8 3/7] omap: gpmc: enable irq mode in gpmc
From: Sukumar Ghorai @ 2011-01-04 13:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294148004-10789-1-git-send-email-s-ghorai@ti.com>
add support the irq mode in GPMC.
gpmc_init() function move after omap_init_irq() as it has dependecy on irq.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
---
arch/arm/mach-omap2/board-2430sdp.c | 1 +
arch/arm/mach-omap2/board-3430sdp.c | 1 +
arch/arm/mach-omap2/board-3630sdp.c | 1 +
arch/arm/mach-omap2/board-4430sdp.c | 2 +
arch/arm/mach-omap2/board-am3517evm.c | 2 +
arch/arm/mach-omap2/board-apollon.c | 1 +
arch/arm/mach-omap2/board-cm-t35.c | 1 +
arch/arm/mach-omap2/board-devkit8000.c | 1 +
arch/arm/mach-omap2/board-generic.c | 2 +
arch/arm/mach-omap2/board-h4.c | 1 +
arch/arm/mach-omap2/board-igep0020.c | 1 +
arch/arm/mach-omap2/board-ldp.c | 1 +
arch/arm/mach-omap2/board-n8x0.c | 2 +
arch/arm/mach-omap2/board-omap3beagle.c | 1 +
arch/arm/mach-omap2/board-omap3evm.c | 2 +
arch/arm/mach-omap2/board-omap3pandora.c | 2 +
arch/arm/mach-omap2/board-omap3stalker.c | 1 +
arch/arm/mach-omap2/board-omap3touchbook.c | 1 +
arch/arm/mach-omap2/board-omap4panda.c | 2 +
arch/arm/mach-omap2/board-overo.c | 1 +
arch/arm/mach-omap2/board-rx51.c | 1 +
arch/arm/mach-omap2/board-zoom2.c | 2 +
arch/arm/mach-omap2/board-zoom3.c | 2 +
arch/arm/mach-omap2/gpmc.c | 39 ++++++++++++++++++++++++++-
arch/arm/mach-omap2/io.c | 2 -
arch/arm/plat-omap/include/plat/gpmc.h | 4 +++
arch/arm/plat-omap/include/plat/irqs.h | 9 +++++-
27 files changed, 81 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index b527f8d..11c89dc 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -145,6 +145,7 @@ static void __init omap_2430sdp_init_irq(void)
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 470872e..690fecd 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -328,6 +328,7 @@ static void __init omap_3430sdp_init_irq(void)
omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 0a74141..46c1755 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -77,6 +77,7 @@ static void __init omap_sdp_init_irq(void)
omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index df5a425..8d15604 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -34,6 +34,7 @@
#include <plat/common.h>
#include <plat/usb.h>
#include <plat/mmc.h>
+#include <plat/gpmc.h>
#include "hsmmc.h"
#include "timer-gp.h"
@@ -222,6 +223,7 @@ static void __init omap_4430sdp_init_irq(void)
omap2_gp_clockevent_set_gptimer(1);
#endif
gic_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 0739950..460e3d1 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -35,6 +35,7 @@
#include <plat/common.h>
#include <plat/usb.h>
#include <plat/display.h>
+#include <plat/gpmc.h>
#include "mux.h"
#include "control.h"
@@ -392,6 +393,7 @@ static void __init am3517_evm_init_irq(void)
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 2c6db1a..8264e7a 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -280,6 +280,7 @@ static void __init omap_apollon_init_irq(void)
omap_board_config_size = ARRAY_SIZE(apollon_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
apollon_init_smc91x();
}
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 63f764e..7c9a834 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -686,6 +686,7 @@ static void __init cm_t35_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 53ac762..f82d3b7 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -447,6 +447,7 @@ static void __init devkit8000_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index b1c2c9a..0b0d2cb 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -29,6 +29,7 @@
#include <plat/usb.h>
#include <plat/board.h>
#include <plat/common.h>
+#include <plat/gpmc.h>
static struct omap_board_config_kernel generic_config[] = {
};
@@ -39,6 +40,7 @@ static void __init omap_generic_init_irq(void)
omap_board_config_size = ARRAY_SIZE(generic_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
}
static void __init omap_generic_init(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 929993b..41b04c4 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -293,6 +293,7 @@ static void __init omap_h4_init_irq(void)
omap_board_config_size = ARRAY_SIZE(h4_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
h4_init_flash();
}
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 5e035a5..c4de273 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -497,6 +497,7 @@ static void __init igep2_init_irq(void)
omap_board_config_size = ARRAY_SIZE(igep2_config);
omap2_init_common_hw(m65kxxxxam_sdrc_params, m65kxxxxam_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index b088b1d..489f40d 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -294,6 +294,7 @@ static void __init omap_ldp_init_irq(void)
omap_board_config_size = ARRAY_SIZE(ldp_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
ldp_init_smsc911x();
}
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index e823c70..4f7c714 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -33,6 +33,7 @@
#include <plat/onenand.h>
#include <plat/mmc.h>
#include <plat/serial.h>
+#include <plat/gpmc.h>
#include "mux.h"
@@ -641,6 +642,7 @@ static void __init n8x0_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 14f4224..a83c3f3 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -487,6 +487,7 @@ static void __init omap3_beagle_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b04365c..21cc9e5 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -43,6 +43,7 @@
#include <plat/common.h>
#include <plat/mcspi.h>
#include <plat/display.h>
+#include <plat/gpmc.h>
#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
@@ -625,6 +626,7 @@ static void __init omap3_evm_init_irq(void)
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 89ed1be..e095f1d 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -47,6 +47,7 @@
#include <plat/mcspi.h>
#include <plat/usb.h>
#include <plat/display.h>
+#include <plat/gpmc.h>
#include <plat/nand.h>
#include "mux.h"
@@ -639,6 +640,7 @@ static void __init omap3pandora_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index f252721..c07ba77 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -586,6 +586,7 @@ static void __init omap3_stalker_init_irq(void)
omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
omap_init_irq();
+ gpmc_init();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 41104bb..d549763 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -425,6 +425,7 @@ static void __init omap3_touchbook_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 1ecd0a6..a03a021 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -36,6 +36,7 @@
#include <plat/common.h>
#include <plat/usb.h>
#include <plat/mmc.h>
+#include <plat/gpmc.h>
#include "timer-gp.h"
#include "hsmmc.h"
@@ -78,6 +79,7 @@ static void __init omap4_panda_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
gic_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 7053bc0..c5fe2b0 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -416,6 +416,7 @@ static void __init overo_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 36f2cf4..3be8729 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -107,6 +107,7 @@ static void __init rx51_init_irq(void)
omap3_pm_init_cpuidle(rx51_cpuidle_params);
sdrc_params = rx51_get_sdram_timings();
omap2_init_common_hw(sdrc_params, sdrc_params);
+ gpmc_init();
omap_init_irq();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 994d286..b77802b 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -22,6 +22,7 @@
#include <plat/common.h>
#include <plat/board.h>
+#include <plat/gpmc.h>
#include <mach/board-zoom.h>
@@ -34,6 +35,7 @@ static void __init omap_zoom2_init_irq(void)
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c
index 0c9c15e..d56024f 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -22,6 +22,7 @@
#include <plat/common.h>
#include <plat/board.h>
#include <plat/usb.h>
+#include <plat/gpmc.h>
#include "board-flash.h"
#include "mux.h"
@@ -78,6 +79,7 @@ static void __init omap_zoom_init_irq(void)
omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
omap_init_irq();
+ gpmc_init();
omap_gpio_init();
}
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f46933b..a2df8b1 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -14,6 +14,7 @@
*/
#undef DEBUG
+#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/err.h>
@@ -22,12 +23,12 @@
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/interrupt.h>
#include <asm/mach-types.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
-
/* GPMC register offsets */
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
@@ -100,6 +101,8 @@ static void __iomem *gpmc_base;
static struct clk *gpmc_l3_clk;
+static irqreturn_t gpmc_handle_irq(int irq, void *dev);
+
static void gpmc_write_reg(int idx, u32 val)
{
__raw_writel(val, gpmc_base + idx);
@@ -487,6 +490,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
u32 regval = 0;
switch (cmd) {
+ case GPMC_ENABLE_IRQ:
+ gpmc_write_reg(GPMC_IRQENABLE, wval);
+ break;
+
case GPMC_SET_IRQ_STATUS:
gpmc_write_reg(GPMC_IRQSTATUS, wval);
break;
@@ -670,7 +677,8 @@ static void __init gpmc_mem_init(void)
void __init gpmc_init(void)
{
- u32 l;
+ u32 l, irq;
+ int cs;
char *ck = NULL;
if (cpu_is_omap24xx()) {
@@ -713,6 +721,33 @@ void __init gpmc_init(void)
l |= (0x02 << 3) | (1 << 0);
gpmc_write_reg(GPMC_SYSCONFIG, l);
gpmc_mem_init();
+
+ /* initalize the irq_chained */
+ irq = OMAP_GPMC_IRQ_BASE;
+ for (cs = 0; cs < GPMC_CS_NUM; cs++) {
+ set_irq_handler(irq, handle_simple_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ irq++;
+ }
+
+ if (request_irq(INT_34XX_GPMC_IRQ,
+ gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base))
+ pr_err("gpmc: irq-%d could not claim: err %d\n",
+ INT_34XX_GPMC_IRQ, irq);
+}
+
+static irqreturn_t gpmc_handle_irq(int irq, void *dev)
+{
+ u8 cs;
+
+ if (irq != INT_34XX_GPMC_IRQ)
+ return IRQ_HANDLED;
+ /* check cs to invoke the irq */
+ cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
+ if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
+ generic_handle_irq(OMAP_GPMC_IRQ_BASE+cs);
+
+ return IRQ_HANDLED;
}
#ifdef CONFIG_ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a1939b1..3e67a67 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -30,7 +30,6 @@
#include <plat/sram.h>
#include <plat/sdrc.h>
-#include <plat/gpmc.h>
#include <plat/serial.h>
#include "clock2xxx.h"
@@ -351,5 +350,4 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
_omap2_init_reprogram_sdrc();
}
- gpmc_init();
}
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 9fd99b9..054e704 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -41,6 +41,8 @@
#define GPMC_NAND_ADDRESS 0x0000000b
#define GPMC_NAND_DATA 0x0000000c
+#define GPMC_ENABLE_IRQ 0x0000000d
+
/* ECC commands */
#define GPMC_ECC_READ 0 /* Reset Hardware ECC for read */
#define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */
@@ -78,6 +80,8 @@
#define WR_RD_PIN_MONITORING 0x00600000
#define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
+#define GPMC_IRQ_FIFOEVENTENABLE 0x01
+#define GPMC_IRQ_COUNT_EVENT 0x02
/*
* Note that all values in this struct are in nanoseconds, while
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 65e20a6..b90b9ef 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -318,6 +318,7 @@
#define INT_34XX_PRCM_MPU_IRQ 11
#define INT_34XX_MCBSP1_IRQ 16
#define INT_34XX_MCBSP2_IRQ 17
+#define INT_34XX_GPMC_IRQ 20
#define INT_34XX_MCBSP3_IRQ 22
#define INT_34XX_MCBSP4_IRQ 23
#define INT_34XX_CAM_IRQ 24
@@ -411,7 +412,13 @@
#define TWL_IRQ_END TWL6030_IRQ_END
#endif
-#define NR_IRQS TWL_IRQ_END
+/* GPMC related */
+#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END)
+#define OMAP_GPMC_NR_IRQS 7
+#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
+
+
+#define NR_IRQS OMAP_GPMC_IRQ_END
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
--
1.7.0.4
^ permalink raw reply related
* [PATCH v8 2/7] omap3: nand: configurable transfer type per board
From: Sukumar Ghorai @ 2011-01-04 13:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294148004-10789-1-git-send-email-s-ghorai@ti.com>
nand transfer type (sDMA, Polled, prefetch) can be select from board file,
enabling all transfer type in driver, by default.
this helps in multi-omap build and to select different transfer type for
different board.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
---
arch/arm/plat-omap/include/plat/nand.h | 7 +++
drivers/mtd/nand/Kconfig | 17 ------
drivers/mtd/nand/omap2.c | 94 ++++++++++++--------------------
3 files changed, 41 insertions(+), 77 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index 6562cd0..78c0bdb 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -10,6 +10,12 @@
#include <linux/mtd/partitions.h>
+enum nand_io {
+ NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
+ NAND_OMAP_POLLED, /* polled mode, without prefetch */
+ NAND_OMAP_PREFETCH_DMA /* prefetch enabled sDMA mode */
+};
+
struct omap_nand_platform_data {
unsigned int options;
int cs;
@@ -20,6 +26,7 @@ struct omap_nand_platform_data {
int (*nand_setup)(void);
int (*dev_ready)(struct omap_nand_platform_data *);
int dma_channel;
+ enum nand_io xfer_type;
unsigned long phys_base;
int devsize;
};
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8229802..89bb297 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -105,23 +105,6 @@ config MTD_NAND_OMAP2
help
Support for NAND flash on Texas Instruments OMAP2 and OMAP3 platforms.
-config MTD_NAND_OMAP_PREFETCH
- bool "GPMC prefetch support for NAND Flash device"
- depends on MTD_NAND_OMAP2
- default y
- help
- The NAND device can be accessed for Read/Write using GPMC PREFETCH engine
- to improve the performance.
-
-config MTD_NAND_OMAP_PREFETCH_DMA
- depends on MTD_NAND_OMAP_PREFETCH
- bool "DMA mode"
- default n
- help
- The GPMC PREFETCH engine can be configured eigther in MPU interrupt mode
- or in DMA interrupt mode.
- Say y for DMA mode or MPU mode will be used
-
config MTD_NAND_IDS
tristate
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 7c04cd6..60bac8e 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -96,27 +96,6 @@
static const char *part_probes[] = { "cmdlinepart", NULL };
#endif
-#ifdef CONFIG_MTD_NAND_OMAP_PREFETCH
-static int use_prefetch = 1;
-
-/* "modprobe ... use_prefetch=0" etc */
-module_param(use_prefetch, bool, 0);
-MODULE_PARM_DESC(use_prefetch, "enable/disable use of PREFETCH");
-
-#ifdef CONFIG_MTD_NAND_OMAP_PREFETCH_DMA
-static int use_dma = 1;
-
-/* "modprobe ... use_dma=0" etc */
-module_param(use_dma, bool, 0);
-MODULE_PARM_DESC(use_dma, "enable/disable use of DMA");
-#else
-static const int use_dma;
-#endif
-#else
-const int use_prefetch;
-static const int use_dma;
-#endif
-
struct omap_nand_info {
struct nand_hw_control controller;
struct omap_nand_platform_data *pdata;
@@ -324,7 +303,6 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
}
}
-#ifdef CONFIG_MTD_NAND_OMAP_PREFETCH_DMA
/*
* omap_nand_dma_cb: callback on the completion of dma transfer
* @lch: logical channel
@@ -426,14 +404,6 @@ out_copy:
: omap_write_buf8(mtd, (u_char *) addr, len);
return 0;
}
-#else
-static void omap_nand_dma_cb(int lch, u16 ch_status, void *data) {}
-static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
- unsigned int len, int is_write)
-{
- return 0;
-}
-#endif
/**
* omap_read_buf_dma_pref - read data from NAND controller into buffer
@@ -842,28 +812,13 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
info->nand.chip_delay = 50;
}
- if (use_prefetch) {
-
+ switch (pdata->xfer_type) {
+ case NAND_OMAP_PREFETCH_POLLED:
info->nand.read_buf = omap_read_buf_pref;
info->nand.write_buf = omap_write_buf_pref;
- if (use_dma) {
- err = omap_request_dma(OMAP24XX_DMA_GPMC, "NAND",
- omap_nand_dma_cb, &info->comp, &info->dma_ch);
- if (err < 0) {
- info->dma_ch = -1;
- printk(KERN_WARNING "DMA request failed."
- " Non-dma data transfer mode\n");
- } else {
- omap_set_dma_dest_burst_mode(info->dma_ch,
- OMAP_DMA_DATA_BURST_16);
- omap_set_dma_src_burst_mode(info->dma_ch,
- OMAP_DMA_DATA_BURST_16);
-
- info->nand.read_buf = omap_read_buf_dma_pref;
- info->nand.write_buf = omap_write_buf_dma_pref;
- }
- }
- } else {
+ break;
+
+ case NAND_OMAP_POLLED:
if (info->nand.options & NAND_BUSWIDTH_16) {
info->nand.read_buf = omap_read_buf16;
info->nand.write_buf = omap_write_buf16;
@@ -871,7 +826,33 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
info->nand.read_buf = omap_read_buf8;
info->nand.write_buf = omap_write_buf8;
}
+ break;
+
+ case NAND_OMAP_PREFETCH_DMA:
+ err = omap_request_dma(OMAP24XX_DMA_GPMC, "NAND",
+ omap_nand_dma_cb, &info->comp, &info->dma_ch);
+ if (err < 0) {
+ info->dma_ch = -1;
+ dev_err(&pdev->dev, "DMA request failed!\n");
+ goto out_release_mem_region;
+ } else {
+ omap_set_dma_dest_burst_mode(info->dma_ch,
+ OMAP_DMA_DATA_BURST_16);
+ omap_set_dma_src_burst_mode(info->dma_ch,
+ OMAP_DMA_DATA_BURST_16);
+
+ info->nand.read_buf = omap_read_buf_dma_pref;
+ info->nand.write_buf = omap_write_buf_dma_pref;
+ }
+ break;
+
+ default:
+ dev_err(&pdev->dev,
+ "xfer_type(%d) not supported!\n", pdata->xfer_type);
+ err = -EINVAL;
+ goto out_release_mem_region;
}
+
info->nand.verify_buf = omap_verify_buf;
#ifdef CONFIG_MTD_NAND_OMAP_HWECC
@@ -897,6 +878,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
}
}
+
#ifdef CONFIG_MTD_PARTITIONS
err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
if (err > 0)
@@ -926,7 +908,7 @@ static int omap_nand_remove(struct platform_device *pdev)
mtd);
platform_set_drvdata(pdev, NULL);
- if (use_dma)
+ if (info->dma_ch != -1)
omap_free_dma(info->dma_ch);
/* Release NAND device, its internal structures and partitions */
@@ -947,16 +929,8 @@ static struct platform_driver omap_nand_driver = {
static int __init omap_nand_init(void)
{
- printk(KERN_INFO "%s driver initializing\n", DRIVER_NAME);
+ pr_info("%s driver initializing\n", DRIVER_NAME);
- /* This check is required if driver is being
- * loaded run time as a module
- */
- if ((1 == use_dma) && (0 == use_prefetch)) {
- printk(KERN_INFO"Wrong parameters: 'use_dma' can not be 1 "
- "without use_prefetch'. Prefetch will not be"
- " used in either mode (mpu or dma)\n");
- }
return platform_driver_register(&omap_nand_driver);
}
--
1.7.0.4
^ permalink raw reply related
* [PATCH v8 1/7] omap3630: nand: fix device size to work in polled mode
From: Sukumar Ghorai @ 2011-01-04 13:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294148004-10789-1-git-send-email-s-ghorai@ti.com>
zoom3 and 3630-sdp having the x16 nand device.
This patch configure gpmc as x16 and select the currect function in driver
for polled mode (without prefetch enable) transfer.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
---
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-3630sdp.c | 3 ++-
arch/arm/mach-omap2/board-flash.c | 10 ++++++----
arch/arm/mach-omap2/board-flash.h | 4 ++--
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-zoom2.c | 5 +++--
arch/arm/mach-omap2/board-zoom3.c | 5 +++--
arch/arm/mach-omap2/gpmc-nand.c | 7 +++++--
drivers/mtd/nand/omap2.c | 2 +-
9 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 4e3742c..470872e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -809,7 +809,7 @@ static void __init omap_3430sdp_init(void)
omap_serial_init();
usb_musb_init(&musb_board_data);
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_3430);
+ board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
sdp3430_display_init();
enable_board_wakeup_source();
usb_ehci_init(&ehci_pdata);
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index bbcf580..0a74141 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -11,6 +11,7 @@
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/gpio.h>
+#include <linux/mtd/nand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -210,7 +211,7 @@ static void __init omap_sdp_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
zoom_peripherals_init();
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_sdp);
+ board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
enable_board_wakeup_source();
usb_ehci_init(&ehci_pdata);
}
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index fd38c05..f6b7253 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -139,11 +139,13 @@ static struct omap_nand_platform_data board_nand_data = {
};
void
-__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
+__init board_nand_init(struct mtd_partition *nand_parts,
+ u8 nr_parts, u8 cs, int nand_type)
{
board_nand_data.cs = cs;
board_nand_data.parts = nand_parts;
- board_nand_data.nr_parts = nr_parts;
+ board_nand_data.nr_parts = nr_parts;
+ board_nand_data.devsize = nand_type;
gpmc_nand_init(&board_nand_data);
}
@@ -194,7 +196,7 @@ unmap:
* @return - void.
*/
void board_flash_init(struct flash_partitions partition_info[],
- char chip_sel_board[][GPMC_CS_NUM])
+ char chip_sel_board[][GPMC_CS_NUM], int nand_type)
{
u8 cs = 0;
u8 norcs = GPMC_CS_NUM + 1;
@@ -250,5 +252,5 @@ void board_flash_init(struct flash_partitions partition_info[],
"in GPMC\n");
else
board_nand_init(partition_info[2].parts,
- partition_info[2].nr_parts, nandcs);
+ partition_info[2].nr_parts, nandcs, nand_type);
}
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
index 69befe0..c240a3f 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -25,6 +25,6 @@ struct flash_partitions {
};
extern void board_flash_init(struct flash_partitions [],
- char chip_sel[][GPMC_CS_NUM]);
+ char chip_sel[][GPMC_CS_NUM], int nand_type);
extern void board_nand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs);
+ u8 nr_parts, u8 cs, int nand_type);
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 001fd97..b088b1d 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -436,7 +436,7 @@ static void __init omap_ldp_init(void)
omap_serial_init();
usb_musb_init(&musb_board_data);
board_nand_init(ldp_nand_partitions,
- ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS);
+ ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 2992a9f..994d286 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -15,6 +15,7 @@
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/i2c/twl.h>
+#include <linux/mtd/nand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -102,8 +103,8 @@ static void __init omap_zoom2_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
zoom_peripherals_init();
- board_nand_init(zoom_nand_partitions,
- ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS);
+ board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
+ ZOOM_NAND_CS, NAND_BUSWIDTH_16);
zoom_debugboard_init();
}
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c
index 5adde12..0c9c15e 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -12,6 +12,7 @@
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/gpio.h>
+#include <linux/mtd/nand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -115,8 +116,8 @@ static void __init omap_zoom_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
zoom_peripherals_init();
- board_nand_init(zoom_nand_partitions,
- ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS);
+ board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
+ ZOOM_NAND_CS, NAND_BUSWIDTH_16);
zoom_debugboard_init();
omap_mux_init_gpio(64, OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 7222096..5d58f57 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/io.h>
+#include <linux/mtd/nand.h>
#include <asm/mach/flash.h>
@@ -69,8 +70,10 @@ static int omap2_nand_gpmc_retime(void)
t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
/* Configure GPMC */
- gpmc_cs_configure(gpmc_nand_data->cs,
- GPMC_CONFIG_DEV_SIZE, gpmc_nand_data->devsize);
+ if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
+ gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1);
+ else
+ gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
gpmc_cs_configure(gpmc_nand_data->cs,
GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 15682ec..7c04cd6 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -804,7 +804,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
info->mtd.name = dev_name(&pdev->dev);
info->mtd.owner = THIS_MODULE;
- info->nand.options |= pdata->devsize ? NAND_BUSWIDTH_16 : 0;
+ info->nand.options = pdata->devsize;
info->nand.options |= NAND_SKIP_BBTSCAN;
/* NAND write protect off */
--
1.7.0.4
^ permalink raw reply related
* [PATCH v8 0/7] nand prefetch-irq support and ecc layout chanage
From: Sukumar Ghorai @ 2011-01-04 13:33 UTC (permalink / raw)
To: linux-arm-kernel
The following set of patches applies on linux-2.6.
The main motivations behind this patch series are -
1. support NAND I/O in irq mode.
2. support of different ECC schema.
3. also add support ecc layout as like in romcode ecc layout, but not enabled
v8: free_irq() added; usedtimeout for this while loop
v7: NAND type (x16 or x8) is board specific and not omap specific; this passed form board file.
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg41469.html
v6: configurable transfer type from board file;
#define irq number used for nand-irq
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg39397.html
v5: http://www.mail-archive.com/linux-omap at vger.kernel.org/msg35860.html
This address the input as to support the irq_chained in GPMC.
And resend of
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg35848.html
v4: http://www.mail-archive.com/linux-omap at vger.kernel.org/msg34882.html
and resend of
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg32689.html
v3: http://www.mail-archive.com/linux-omap at vger.kernel.org/msg32071.html
Rebase on latest codebase and previous patch(posted).
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg31963.html
v2: Rebase on latest codebase and previous patch(posted).
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg31471.html
v1: http://www.mail-archive.com/linux-omap at vger.kernel.org/msg26666.html
Sukumar Ghorai (7):
omap3630: nand: fix device size to work in polled mode
omap3: nand: configurable transfer type per board
omap: gpmc: enable irq mode in gpmc
omap3: nand: prefetch in irq mode support
omap3: nand: configurable fifo threshold to gain the throughput
omap3: nand: ecc layout select from board file
omap3: nand: making ecc layout as compatible with romcode ecc
arch/arm/mach-omap2/board-2430sdp.c | 1 +
arch/arm/mach-omap2/board-3430sdp.c | 3 +-
arch/arm/mach-omap2/board-3630sdp.c | 4 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +
arch/arm/mach-omap2/board-am3517evm.c | 2 +
arch/arm/mach-omap2/board-apollon.c | 1 +
arch/arm/mach-omap2/board-cm-t35.c | 1 +
arch/arm/mach-omap2/board-devkit8000.c | 1 +
arch/arm/mach-omap2/board-flash.c | 13 +-
arch/arm/mach-omap2/board-flash.h | 4 +-
arch/arm/mach-omap2/board-generic.c | 2 +
arch/arm/mach-omap2/board-h4.c | 1 +
arch/arm/mach-omap2/board-igep0020.c | 1 +
arch/arm/mach-omap2/board-ldp.c | 3 +-
arch/arm/mach-omap2/board-n8x0.c | 2 +
arch/arm/mach-omap2/board-omap3beagle.c | 1 +
arch/arm/mach-omap2/board-omap3evm.c | 2 +
arch/arm/mach-omap2/board-omap3pandora.c | 2 +
arch/arm/mach-omap2/board-omap3stalker.c | 1 +
arch/arm/mach-omap2/board-omap3touchbook.c | 1 +
arch/arm/mach-omap2/board-omap4panda.c | 2 +
arch/arm/mach-omap2/board-overo.c | 1 +
arch/arm/mach-omap2/board-rx51.c | 1 +
arch/arm/mach-omap2/board-zoom2.c | 7 +-
arch/arm/mach-omap2/board-zoom3.c | 7 +-
arch/arm/mach-omap2/gpmc-nand.c | 7 +-
arch/arm/mach-omap2/gpmc.c | 50 ++++-
arch/arm/mach-omap2/io.c | 2 -
arch/arm/plat-omap/include/plat/gpmc.h | 17 ++-
arch/arm/plat-omap/include/plat/irqs.h | 9 +-
arch/arm/plat-omap/include/plat/nand.h | 11 +
drivers/mtd/nand/Kconfig | 17 --
drivers/mtd/nand/omap2.c | 336 +++++++++++++++++++++-------
33 files changed, 396 insertions(+), 119 deletions(-)
Sukumar Ghorai (7):
omap3630: nand: fix device size to work in polled mode
omap3: nand: configurable transfer type per board
omap: gpmc: enable irq mode in gpmc
omap3: nand: prefetch in irq mode support
omap3: nand: configurable fifo threshold to gain the throughput
omap3: nand: ecc layout select from board file
omap3: nand: making ecc layout as compatible with romcode ecc
arch/arm/mach-omap2/board-2430sdp.c | 1 +
arch/arm/mach-omap2/board-3430sdp.c | 3 +-
arch/arm/mach-omap2/board-3630sdp.c | 4 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +
arch/arm/mach-omap2/board-am3517evm.c | 2 +
arch/arm/mach-omap2/board-apollon.c | 1 +
arch/arm/mach-omap2/board-cm-t35.c | 1 +
arch/arm/mach-omap2/board-devkit8000.c | 1 +
arch/arm/mach-omap2/board-flash.c | 13 +-
arch/arm/mach-omap2/board-flash.h | 4 +-
arch/arm/mach-omap2/board-generic.c | 2 +
arch/arm/mach-omap2/board-h4.c | 1 +
arch/arm/mach-omap2/board-igep0020.c | 1 +
arch/arm/mach-omap2/board-ldp.c | 3 +-
arch/arm/mach-omap2/board-n8x0.c | 2 +
arch/arm/mach-omap2/board-omap3beagle.c | 1 +
arch/arm/mach-omap2/board-omap3evm.c | 2 +
arch/arm/mach-omap2/board-omap3pandora.c | 2 +
arch/arm/mach-omap2/board-omap3stalker.c | 1 +
arch/arm/mach-omap2/board-omap3touchbook.c | 1 +
arch/arm/mach-omap2/board-omap4panda.c | 2 +
arch/arm/mach-omap2/board-overo.c | 1 +
arch/arm/mach-omap2/board-rx51.c | 1 +
arch/arm/mach-omap2/board-zoom2.c | 7 +-
arch/arm/mach-omap2/board-zoom3.c | 7 +-
arch/arm/mach-omap2/gpmc-nand.c | 7 +-
arch/arm/mach-omap2/gpmc.c | 50 ++++-
arch/arm/mach-omap2/io.c | 2 -
arch/arm/plat-omap/include/plat/gpmc.h | 17 ++-
arch/arm/plat-omap/include/plat/irqs.h | 9 +-
arch/arm/plat-omap/include/plat/nand.h | 11 +
drivers/mtd/nand/Kconfig | 17 --
drivers/mtd/nand/omap2.c | 367 +++++++++++++++++++++-------
33 files changed, 416 insertions(+), 130 deletions(-)
^ permalink raw reply
* [GIT PULL] i.MX patches for next merge window
From: Sascha Hauer @ 2011-01-04 13:30 UTC (permalink / raw)
To: linux-arm-kernel
Russell,
Please pull the following for the next merge window.
Sascha
The following changes since commit 387c31c7e5c9805b0aef8833d1731a5fe7bdea14:
Linux 2.6.37-rc8 (2010-12-28 17:05:48 -0800)
are available in the git repository at:
git://git.pengutronix.de/git/imx/linux-2.6.git for-rmk
Alberto Panizzo (1):
ARM: mx3/mach-pcm037_eet: Fix section mismatch for eet_init_devices()
Arnaud Patard (17):
efikamx: read board id
imx51: fix iomux configuration
imx51: enhance iomux configuration for esdhc support
efikamx: add mmc support
imx51: add gpio mode for csi1 {h,v}sync
efikamx: add leds support
efikamx: add support for power key
imx51: fix gpio_4_24 and gpio_4_25 pad configuration
efikamx: add spi nor support
efikamx: add reset
imx: fix iomux v3
mx5: Fix efikamx build
iMX51: introduce IMX_GPIO_NR
Fix imx cpufreq driver as module
arch/arm/plat-mxc/ehci.c: fix errors/typos
MX51: Add support for usb host 2
mx51: fix usb clock support
Dinh Nguyen (3):
ARM: imx: Add core definitions for MX53
ARM: imx: Add mx53 support to common msl functions.
ARM: imx: Get the silicon version from the IIM module
Eric B?nard (1):
plat-mxc/ehci.c: fix compile breakage
Fabio Estevam (18):
mx31_3ds: Add touchscreen support
mx51_3ds: Add esdhc support
mx51_babbage: Add SPI flash support
ARM: mx5: introduce SOC_IMX51
ARM: mx5: dynamically allocate imx2-wdt devices
ARM: mx5: add support for the two watchdog modules
ARM: mx5: add watchdog clocks
ARM: mx5/mx51_babbage: Add watchdog support
watchdog: imx: use clk_get to acquire the watchdog clock
ARM: mx3/mx31_3ds: Add watchdog support
ARM: imx/mx27_3ds: Add watchdog support
ARM: mx5: check for error in ioremap
ARM: mx3/mx35_3ds: Add USB OTG Host mode
ARM: imx/mx27_3ds: Add USB OTG support
ARM: imx/mx25_3ds: Add USB support
ARM: mx3/mx31_3ds: Add support for OTG host mode
ARM: mx3/mx31_3ds: Add support for USB Host2 port
ARM: imx/mx27_3ds: Add PMIC support
Lothar Wa?mann (2):
ARM: i.MX IOMUX-V3 replace struct pad_desc with bitmapped cookie
MXC IOMUX-V3 replace struct pad_desc with bitmapped cookie (step 2)
Peter Horton (2):
mx51: add SSI3
mx51: support FIQ on TZIC, revised
Richard Zhao (6):
ARM: mx5: use config to define boot related addresses
arm: plat-mxc: add full parameter macro to define gpio port
arm: mx51: define mx51's own MXC_GPIO_IRQS
arm: mx5: mx51/53 have different mxc_cpu_type definition
arm: mx50: add core functions support except clock
arm: mx50: add mx50 reference design board support
Sascha Hauer (14):
Merge branch 'imx-for-2.6.38' of git://git.pengutronix.de/git/ukl/linux-2.6 into imx-for-2.6.38
ARM i.MX51 boards: Do not use PHYS_OFFSET
ARM i.MX irq: Compile avic irq code only on SoCs that need it
ARM i.MX51: Make CONFIG_MXC_TZIC an invisible option
ARM i.MX DMA: return gracefully on different socs
ARM i.MX51: return gracefully on different socs
ARM i.MX27 pm: return gracefully on different socs
dmaengine i.MX SDMA: Allow to run without firmware
ARM i.MX SDMA: Add ROM script addresses to platform_data
Merge commit 'v2.6.37-rc4' into imx-for-2.6.38
ARM i.MX51: Full iomux support
Merge branch 'sgu/mxs-core-v8' of git://git.pengutronix.de/git/ukl/linux-2.6 into imx-for-2.6.38-new
ARM i.MX51: Add ipu clock support
ARM i.MX51: rename IPU irqs
Shawn Guo (15):
ARM: mxs: Add core definitions
ARM: mxs: Add helper definition and function
ARM: mxs: Add reset routines
ARM: mxs: Add interrupt support
ARM: mxs: Add low-level debug UART support
ARM: mxs: Add timer support
ARM: mxs: Add gpio support
ARM: mxs: Add iomux support
ARM: mxs: Add clock support
ARM: mxs: Add static memory mapping
ARM: mxs: Dynamically allocate duart devices
ARM: mxs: Dynamically allocate fec devices
ARM: mxs: Add initial mx23evk support
ARM: mxs: Add initial mx28evk support
ARM: mxs: Add build configuration for mxs
Uwe Kleine-K?nig (52):
ARM: mx3: fix the last users of IMX_NEEDS_DEPRECATED_SYMBOLS
ARM: imx: refactor the io mapping macro
ARM: imx: use MXxy_IO_P2V macros to setup static mappings
ARM: imx: remove last explicit users of virtual base address defines
ARM: imx: change static io mapping to use a function
ARM: imx/debug-macro: rework using the new io mapping macro
ARM: imx: remove deprecated symbols as all users are gone now
ARM: imx: dynamically allocate mxc_w1 devices
ARM: imx: remove unused devices
ARM: imx: dynamically allocate imx_udc device
ARM: imx: allow specifying a dma mask when creating a platform device
ARM: imx: dynamically allocate mx1-camera device
ARM: imx/gpio: remove some useless casts
ARM: imx: dynamically allocate mx2-camera device
ARM: imx: dynamically allocate imx2-wdt devices
ARM: imx: change the way flexcan devices are registered
ARM: imx: dynamically register imx-fb devices
ARM: mx3: enable SPI_IMX for better compile coverage
ARM: imx: dynamically allocate mxc_pwm devices
ARM: imx: dynamically register mxc-mmc devices
ARM: imx: dynamically allocate mxc-ehci devices
ARM: imx: dynamically allocate fsl-usb2-udc devices
ARM: imx: dynamically allocate imx-keypad devices
ARM: imx: dynamically allocate imx21-hcd devices
ARM: imx: remove now empty devices.h
ARM: imx: move registration of gpios to plat-mxc/gpio.c
ARM: mx25: dynamically allocate mxc-ehci devices
ARM: mx25: dynamically allocate fsl-usb2-udc devices
ARM: mx25: dynamically allocate mxc_pwm devices
ARM: mx25: move registration of gpios to plat-mxc/gpio.c
ARM: mx25: dynamically allocate imx-keypad devices
ARM: mx25: dynamically allocate imxdi_rtc devices
ARM: mx25: dynamically allocatate imx-fb devices
ARM: mx25: dynamically allocate imx2-wdt devices
ARM: mx25: dynamically allocate mx2-camera devices
ARM: mx25: remove now empty devices.h
ARM: imx: move mx25 support to mach-imx
ARM: imx: let IMX_HAVE_PLATFORM_IMX_FB select HAVE_FB_IMX
ARM: imx: let the machines select SOC_IMX{21,27}
ARM: imx: use SOC_IMX25 instead of ARCH_MX25 for multi-SoC
ARM: mx3: move registration of gpios to plat-mxc/gpio.c
ARM: mx3: use an MX35 constant in imx35 only code
ARM: mx3: introduce SOC_IMX31 and SOC_IMX35
ARM: mx3: dynamically register mxc-mmc devices
ARM: mx3: dynamically allocate mxc_rnga devices
ARM: mx3: dynamically allocate fsl-usb2-udc devices
ARM: mx3: dynamically allocate mxc-ehci devices
ARM: mx3: dynamically allocate imx2-wdt devices
ARM: mx3: dynamically allocate imx-keypad devices
ARM: mx3/mx35_3ds: Add watchdog support
ARM: imx: fix name for functions adding sdhci-esdhc-imx devices
ARM: mx25: fix offset for usb host controller
Vasiliy Kulikov (1):
arm: dma: check clk_get() result
Yong Shen (2):
ARM i.MX53: Some bug fix about MX53 MSL code
ARM i.MX53: Make MX53 EVK bootable
arch/arm/Kconfig | 10 +
arch/arm/Makefile | 3 +-
arch/arm/configs/mx3_defconfig | 1 +
arch/arm/mach-imx/Kconfig | 138 ++-
arch/arm/mach-imx/Makefile | 8 +-
arch/arm/mach-imx/Makefile.boot | 4 +
arch/arm/mach-imx/clock-imx21.c | 2 +-
.../{mach-mx25/clock.c => mach-imx/clock-imx25.c} | 2 +-
arch/arm/mach-imx/clock-imx27.c | 24 +-
arch/arm/mach-imx/cpu-imx27.c | 14 +-
arch/arm/mach-imx/devices-imx21.h | 24 +
arch/arm/mach-imx/devices-imx25.h | 87 +
arch/arm/mach-imx/devices-imx27.h | 35 +
arch/arm/mach-imx/devices.c | 553 ------
arch/arm/mach-imx/devices.h | 29 -
arch/arm/mach-imx/dma-v1.c | 4 +-
arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 17 +-
.../eukrea_mbimxsd25-baseboard.c} | 10 +-
arch/arm/mach-imx/mach-cpuimx27.c | 21 +-
.../mach-eukrea_cpuimx25.c} | 19 +-
arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 12 +-
arch/arm/mach-imx/mach-imx27lite.c | 1 -
arch/arm/mach-imx/mach-mx1ads.c | 1 -
arch/arm/mach-imx/mach-mx21ads.c | 20 +-
arch/arm/{mach-mx25 => mach-imx}/mach-mx25_3ds.c | 34 +-
arch/arm/mach-imx/mach-mx27_3ds.c | 160 ++-
arch/arm/mach-imx/mach-mx27ads.c | 17 +-
arch/arm/mach-imx/mach-mxt_td60.c | 11 +-
arch/arm/mach-imx/mach-pca100.c | 33 +-
arch/arm/mach-imx/mach-pcm038.c | 12 +-
arch/arm/mach-imx/mach-scb9328.c | 1 -
arch/arm/mach-imx/mm-imx1.c | 7 +-
arch/arm/mach-imx/mm-imx21.c | 21 +-
arch/arm/{mach-mx25/mm.c => mach-imx/mm-imx25.c} | 27 +-
arch/arm/mach-imx/mm-imx27.c | 21 +-
arch/arm/mach-imx/pcm970-baseboard.c | 12 +-
arch/arm/mach-imx/pm-imx27.c | 3 +
arch/arm/mach-mx25/Kconfig | 34 -
arch/arm/mach-mx25/Makefile | 5 -
arch/arm/mach-mx25/Makefile.boot | 3 -
arch/arm/mach-mx25/devices-imx25.h | 54 -
arch/arm/mach-mx25/devices.c | 308 ----
arch/arm/mach-mx25/devices.h | 13 -
arch/arm/mach-mx3/Kconfig | 84 +-
arch/arm/mach-mx3/Makefile | 7 +-
arch/arm/mach-mx3/clock-imx31.c | 4 +-
arch/arm/mach-mx3/clock-imx35.c | 2 +-
arch/arm/mach-mx3/cpu.c | 31 +-
arch/arm/mach-mx3/devices-imx31.h | 27 +
arch/arm/mach-mx3/devices-imx35.h | 41 +-
arch/arm/mach-mx3/devices.c | 271 +---
arch/arm/mach-mx3/devices.h | 10 -
arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c | 4 +-
arch/arm/mach-mx3/mach-armadillo5x0.c | 14 +-
arch/arm/mach-mx3/mach-cpuimx35.c | 22 +-
arch/arm/mach-mx3/mach-kzm_arm11_01.c | 6 +-
arch/arm/mach-mx3/mach-mx31_3ds.c | 124 ++-
arch/arm/mach-mx3/mach-mx31lilly.c | 9 +-
arch/arm/mach-mx3/mach-mx31lite.c | 5 +-
arch/arm/mach-mx3/mach-mx31moboard.c | 20 +-
arch/arm/mach-mx3/mach-mx35_3ds.c | 40 +-
arch/arm/mach-mx3/mach-pcm037.c | 23 +-
arch/arm/mach-mx3/mach-pcm043.c | 48 +-
arch/arm/mach-mx3/mm.c | 84 +-
arch/arm/mach-mx3/mx31lilly-db.c | 5 +-
arch/arm/mach-mx3/mx31lite-db.c | 8 +-
arch/arm/mach-mx3/mx31moboard-devboard.c | 20 +-
arch/arm/mach-mx3/mx31moboard-marxbot.c | 21 +-
arch/arm/mach-mx3/mx31moboard-smartbot.c | 16 +-
arch/arm/mach-mx5/Kconfig | 63 +-
arch/arm/mach-mx5/Makefile | 5 +-
arch/arm/mach-mx5/Makefile.boot | 12 +-
arch/arm/mach-mx5/board-cpuimx51.c | 32 +-
arch/arm/mach-mx5/board-cpuimx51sd.c | 68 +-
arch/arm/mach-mx5/board-mx50_rdp.c | 197 ++
arch/arm/mach-mx5/board-mx51_3ds.c | 9 +-
arch/arm/mach-mx5/board-mx51_babbage.c | 101 +-
arch/arm/mach-mx5/board-mx51_efikamx.c | 247 +++-
arch/arm/mach-mx5/board-mx53_evk.c | 84 +
.../mach-mx5/{clock-mx51.c => clock-mx51-mx53.c} | 296 +++-
arch/arm/mach-mx5/cpu.c | 118 +-
arch/arm/mach-mx5/crm_regs.h | 10 +-
arch/arm/mach-mx5/devices-imx51.h | 11 +-
arch/arm/mach-mx5/devices-imx53.h | 13 +
arch/arm/mach-mx5/devices-mx50.h | 26 +
arch/arm/mach-mx5/devices.c | 51 +-
arch/arm/mach-mx5/devices.h | 2 +-
arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c | 26 +-
arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c | 17 +-
arch/arm/mach-mx5/mm-mx50.c | 59 +
arch/arm/mach-mx5/mm.c | 75 +-
arch/arm/mach-mxc91231/mm.c | 53 +-
arch/arm/mach-mxs/Kconfig | 34 +
arch/arm/mach-mxs/Makefile | 10 +
arch/arm/mach-mxs/Makefile.boot | 1 +
arch/arm/mach-mxs/clock-mx23.c | 526 ++++++
arch/arm/mach-mxs/clock-mx28.c | 734 ++++++++
arch/arm/mach-mxs/clock.c | 200 ++
arch/arm/mach-mxs/devices-mx23.h | 16 +
arch/arm/mach-mxs/devices-mx28.h | 20 +
arch/arm/mach-mxs/devices.c | 75 +
arch/arm/mach-mxs/devices/Kconfig | 5 +
arch/arm/mach-mxs/devices/Makefile | 2 +
arch/arm/mach-mxs/devices/platform-duart.c | 48 +
arch/arm/mach-mxs/devices/platform-fec.c | 50 +
arch/arm/mach-mxs/gpio.c | 325 ++++
arch/arm/mach-mxs/gpio.h | 34 +
arch/arm/mach-mxs/icoll.c | 81 +
arch/arm/mach-mxs/include/mach/clkdev.h | 7 +
arch/arm/mach-mxs/include/mach/clock.h | 64 +
arch/arm/mach-mxs/include/mach/common.h | 31 +
arch/arm/mach-mxs/include/mach/debug-macro.S | 38 +
arch/arm/mach-mxs/include/mach/devices-common.h | 46 +
arch/arm/mach-mxs/include/mach/entry-macro.S | 41 +
arch/arm/mach-mxs/include/mach/gpio.h | 35 +
arch/arm/mach-mxs/include/mach/hardware.h | 29 +
arch/arm/mach-mxs/include/mach/io.h | 22 +
arch/arm/mach-mxs/include/mach/iomux-mx23.h | 355 ++++
arch/arm/mach-mxs/include/mach/iomux-mx28.h | 537 ++++++
arch/arm/mach-mxs/include/mach/iomux.h | 165 ++
arch/arm/mach-mxs/include/mach/irqs.h | 32 +
arch/arm/mach-mxs/include/mach/memory.h | 24 +
arch/arm/mach-mxs/include/mach/mx23.h | 145 ++
arch/arm/mach-mxs/include/mach/mx28.h | 188 ++
arch/arm/mach-mxs/include/mach/mxs.h | 105 ++
arch/arm/mach-mxs/include/mach/system.h | 27 +
arch/arm/mach-mxs/include/mach/timex.h | 21 +
arch/arm/mach-mxs/include/mach/uncompress.h | 76 +
arch/arm/mach-mxs/include/mach/vmalloc.h | 22 +
arch/arm/mach-mxs/iomux.c | 101 ++
arch/arm/mach-mxs/mach-mx23evk.c | 57 +
arch/arm/mach-mxs/mach-mx28evk.c | 138 ++
arch/arm/mach-mxs/mm-mx23.c | 45 +
arch/arm/mach-mxs/mm-mx28.c | 45 +
arch/arm/mach-mxs/regs-clkctrl-mx23.h | 455 +++++
arch/arm/mach-mxs/regs-clkctrl-mx28.h | 663 +++++++
arch/arm/mach-mxs/system.c | 137 ++
arch/arm/mach-mxs/timer.c | 296 +++
arch/arm/plat-mxc/Kconfig | 15 +-
arch/arm/plat-mxc/Makefile | 5 +-
arch/arm/plat-mxc/audmux-v2.c | 4 +-
arch/arm/plat-mxc/{irq.c => avic.c} | 32 +-
arch/arm/plat-mxc/cpufreq.c | 1 -
arch/arm/plat-mxc/devices.c | 23 +-
arch/arm/plat-mxc/devices/Kconfig | 54 +-
arch/arm/plat-mxc/devices/Makefile | 16 +-
arch/arm/plat-mxc/devices/platform-esdhc.c | 71 -
arch/arm/plat-mxc/devices/platform-fec.c | 8 +-
arch/arm/plat-mxc/devices/platform-flexcan.c | 48 +-
arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c | 56 +
arch/arm/plat-mxc/devices/platform-imx-dma.c | 127 ++-
arch/arm/plat-mxc/devices/platform-imx-fb.c | 52 +
arch/arm/plat-mxc/devices/platform-imx-i2c.c | 16 +-
arch/arm/plat-mxc/devices/platform-imx-keypad.c | 62 +
arch/arm/plat-mxc/devices/platform-imx-ssi.c | 17 +-
arch/arm/plat-mxc/devices/platform-imx-uart.c | 38 +-
arch/arm/plat-mxc/devices/platform-imx2-wdt.c | 68 +
arch/arm/plat-mxc/devices/platform-imx21-hcd.c | 41 +
arch/arm/plat-mxc/devices/platform-imx_udc.c | 75 +
arch/arm/plat-mxc/devices/platform-imxdi_rtc.c | 41 +
arch/arm/plat-mxc/devices/platform-mx1-camera.c | 42 +
arch/arm/plat-mxc/devices/platform-mx2-camera.c | 64 +
arch/arm/plat-mxc/devices/platform-mxc-ehci.c | 69 +
arch/arm/plat-mxc/devices/platform-mxc-mmc.c | 72 +
arch/arm/plat-mxc/devices/platform-mxc_nand.c | 10 +-
arch/arm/plat-mxc/devices/platform-mxc_pwm.c | 60 +
arch/arm/plat-mxc/devices/platform-mxc_rnga.c | 56 +
arch/arm/plat-mxc/devices/platform-mxc_w1.c | 50 +
.../plat-mxc/devices/platform-sdhci-esdhc-imx.c | 74 +
arch/arm/plat-mxc/devices/platform-spi_imx.c | 16 +-
arch/arm/plat-mxc/ehci.c | 77 +-
arch/arm/plat-mxc/gpio.c | 114 ++-
arch/arm/plat-mxc/include/mach/common.h | 9 +-
arch/arm/plat-mxc/include/mach/debug-macro.S | 23 +-
arch/arm/plat-mxc/include/mach/devices-common.h | 174 ++-
arch/arm/plat-mxc/include/mach/entry-macro.S | 14 +-
arch/arm/plat-mxc/include/mach/gpio.h | 5 +
arch/arm/plat-mxc/include/mach/hardware.h | 94 +-
arch/arm/plat-mxc/include/mach/imxfb.h | 3 +
arch/arm/plat-mxc/include/mach/iomux-mx50.h | 977 ++++++++++
arch/arm/plat-mxc/include/mach/iomux-mx51.h | 1898 ++++++++++++++++----
arch/arm/plat-mxc/include/mach/iomux-mx53.h | 323 ++++
arch/arm/plat-mxc/include/mach/iomux-v3.h | 64 +-
arch/arm/plat-mxc/include/mach/irqs.h | 8 +-
arch/arm/plat-mxc/include/mach/memory.h | 8 +-
arch/arm/plat-mxc/include/mach/mx1.h | 155 +--
arch/arm/plat-mxc/include/mach/mx21.h | 50 +-
arch/arm/plat-mxc/include/mach/mx25.h | 46 +-
arch/arm/plat-mxc/include/mach/mx27.h | 105 +-
arch/arm/plat-mxc/include/mach/mx2x.h | 149 --
arch/arm/plat-mxc/include/mach/mx31.h | 87 +-
arch/arm/plat-mxc/include/mach/mx35.h | 51 +-
arch/arm/plat-mxc/include/mach/mx3x.h | 198 +--
arch/arm/plat-mxc/include/mach/mx50.h | 285 +++
arch/arm/plat-mxc/include/mach/mx51.h | 73 +-
arch/arm/plat-mxc/include/mach/mx53.h | 353 ++++
arch/arm/plat-mxc/include/mach/mxc.h | 42 +-
arch/arm/plat-mxc/include/mach/mxc91231.h | 23 +-
arch/arm/plat-mxc/include/mach/mxc_ehci.h | 1 +
arch/arm/plat-mxc/include/mach/sdma.h | 46 +
arch/arm/plat-mxc/include/mach/uncompress.h | 8 +
arch/arm/plat-mxc/iomux-v3.c | 31 +-
arch/arm/plat-mxc/irq-common.c | 60 +
arch/arm/plat-mxc/irq-common.h | 29 +
arch/arm/plat-mxc/system.c | 10 +-
arch/arm/plat-mxc/tzic.c | 46 +-
drivers/dma/imx-sdma.c | 174 +-
drivers/usb/gadget/fsl_mxc_udc.c | 4 +-
drivers/usb/host/ehci-mxc.c | 44 +-
drivers/watchdog/imx2_wdt.c | 2 +-
210 files changed, 14123 insertions(+), 3567 deletions(-)
rename arch/arm/{mach-mx25/clock.c => mach-imx/clock-imx25.c} (99%)
create mode 100644 arch/arm/mach-imx/devices-imx25.h
delete mode 100644 arch/arm/mach-imx/devices.c
delete mode 100644 arch/arm/mach-imx/devices.h
rename arch/arm/{mach-mx25/eukrea_mbimxsd-baseboard.c => mach-imx/eukrea_mbimxsd25-baseboard.c} (96%)
rename arch/arm/{mach-mx25/mach-cpuimx25.c => mach-imx/mach-eukrea_cpuimx25.c} (89%)
rename arch/arm/{mach-mx25 => mach-imx}/mach-mx25_3ds.c (86%)
rename arch/arm/{mach-mx25/mm.c => mach-imx/mm-imx25.c} (69%)
delete mode 100644 arch/arm/mach-mx25/Kconfig
delete mode 100644 arch/arm/mach-mx25/Makefile
delete mode 100644 arch/arm/mach-mx25/Makefile.boot
delete mode 100644 arch/arm/mach-mx25/devices-imx25.h
delete mode 100644 arch/arm/mach-mx25/devices.c
delete mode 100644 arch/arm/mach-mx25/devices.h
create mode 100644 arch/arm/mach-mx5/board-mx50_rdp.c
create mode 100644 arch/arm/mach-mx5/board-mx53_evk.c
rename arch/arm/mach-mx5/{clock-mx51.c => clock-mx51-mx53.c} (79%)
create mode 100644 arch/arm/mach-mx5/devices-imx53.h
create mode 100644 arch/arm/mach-mx5/devices-mx50.h
create mode 100644 arch/arm/mach-mx5/mm-mx50.c
create mode 100644 arch/arm/mach-mxs/Kconfig
create mode 100644 arch/arm/mach-mxs/Makefile
create mode 100644 arch/arm/mach-mxs/Makefile.boot
create mode 100644 arch/arm/mach-mxs/clock-mx23.c
create mode 100644 arch/arm/mach-mxs/clock-mx28.c
create mode 100644 arch/arm/mach-mxs/clock.c
create mode 100644 arch/arm/mach-mxs/devices-mx23.h
create mode 100644 arch/arm/mach-mxs/devices-mx28.h
create mode 100644 arch/arm/mach-mxs/devices.c
create mode 100644 arch/arm/mach-mxs/devices/Kconfig
create mode 100644 arch/arm/mach-mxs/devices/Makefile
create mode 100644 arch/arm/mach-mxs/devices/platform-duart.c
create mode 100644 arch/arm/mach-mxs/devices/platform-fec.c
create mode 100644 arch/arm/mach-mxs/gpio.c
create mode 100644 arch/arm/mach-mxs/gpio.h
create mode 100644 arch/arm/mach-mxs/icoll.c
create mode 100644 arch/arm/mach-mxs/include/mach/clkdev.h
create mode 100644 arch/arm/mach-mxs/include/mach/clock.h
create mode 100644 arch/arm/mach-mxs/include/mach/common.h
create mode 100644 arch/arm/mach-mxs/include/mach/debug-macro.S
create mode 100644 arch/arm/mach-mxs/include/mach/devices-common.h
create mode 100644 arch/arm/mach-mxs/include/mach/entry-macro.S
create mode 100644 arch/arm/mach-mxs/include/mach/gpio.h
create mode 100644 arch/arm/mach-mxs/include/mach/hardware.h
create mode 100644 arch/arm/mach-mxs/include/mach/io.h
create mode 100644 arch/arm/mach-mxs/include/mach/iomux-mx23.h
create mode 100644 arch/arm/mach-mxs/include/mach/iomux-mx28.h
create mode 100644 arch/arm/mach-mxs/include/mach/iomux.h
create mode 100644 arch/arm/mach-mxs/include/mach/irqs.h
create mode 100644 arch/arm/mach-mxs/include/mach/memory.h
create mode 100644 arch/arm/mach-mxs/include/mach/mx23.h
create mode 100644 arch/arm/mach-mxs/include/mach/mx28.h
create mode 100644 arch/arm/mach-mxs/include/mach/mxs.h
create mode 100644 arch/arm/mach-mxs/include/mach/system.h
create mode 100644 arch/arm/mach-mxs/include/mach/timex.h
create mode 100644 arch/arm/mach-mxs/include/mach/uncompress.h
create mode 100644 arch/arm/mach-mxs/include/mach/vmalloc.h
create mode 100644 arch/arm/mach-mxs/iomux.c
create mode 100644 arch/arm/mach-mxs/mach-mx23evk.c
create mode 100644 arch/arm/mach-mxs/mach-mx28evk.c
create mode 100644 arch/arm/mach-mxs/mm-mx23.c
create mode 100644 arch/arm/mach-mxs/mm-mx28.c
create mode 100644 arch/arm/mach-mxs/regs-clkctrl-mx23.h
create mode 100644 arch/arm/mach-mxs/regs-clkctrl-mx28.h
create mode 100644 arch/arm/mach-mxs/system.c
create mode 100644 arch/arm/mach-mxs/timer.c
rename arch/arm/plat-mxc/{irq.c => avic.c} (89%)
delete mode 100644 arch/arm/plat-mxc/devices/platform-esdhc.c
create mode 100644 arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
create mode 100644 arch/arm/plat-mxc/devices/platform-imx-fb.c
create mode 100644 arch/arm/plat-mxc/devices/platform-imx-keypad.c
create mode 100644 arch/arm/plat-mxc/devices/platform-imx2-wdt.c
create mode 100644 arch/arm/plat-mxc/devices/platform-imx21-hcd.c
create mode 100644 arch/arm/plat-mxc/devices/platform-imx_udc.c
create mode 100644 arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mx1-camera.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mx2-camera.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mxc-ehci.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mxc-mmc.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mxc_pwm.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mxc_rnga.c
create mode 100644 arch/arm/plat-mxc/devices/platform-mxc_w1.c
create mode 100644 arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
create mode 100644 arch/arm/plat-mxc/include/mach/iomux-mx50.h
create mode 100644 arch/arm/plat-mxc/include/mach/iomux-mx53.h
create mode 100644 arch/arm/plat-mxc/include/mach/mx50.h
create mode 100644 arch/arm/plat-mxc/include/mach/mx53.h
create mode 100644 arch/arm/plat-mxc/irq-common.c
create mode 100644 arch/arm/plat-mxc/irq-common.h
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH v5 1/3] ARM: add CPPI 4.1 DMA support
From: Sergei Shtylyov @ 2011-01-04 13:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110103204416.GA2240@legolas.emea.dhcp.ti.com>
Hello.
On 03-01-2011 23:44, Felipe Balbi wrote:
>>> > Moreover, even Felipe also seems to move other musb
>>> > DMAs (Inventra, CPPI3.0, TUSB) to drivers/dma.
>>> Frankly speaking, I doubt that drivers/dma/ will have place for the
>>> purely MUSB specific DMA engines such as the named ones (there's no TUSB
>>> DMA BTW it uses OMAP DMA).
>> I think we will get more clarity once we start on this activity.
> I agree, but I personally don't see that many limiting factors.
> dmaengine is just a generic API for doing DMA transfers. If it's not
> enough for us currently, we extend it.
Putting MUSB DMA enignes into drivers/dma/ is the same as taking *any*
chip capable of bus-mastering DMA, "separating" its bus mastering related code
from its driver and putting this code into drivers/dma/. This doesn't make
sense, in my opinion. drivers/dma/ is for the dedicated DMA controllers (which
can *optionally* serve the slave devices).
WBR, Sergei
^ permalink raw reply
* [PATCH v5] davinci: Support various speedgrades for MityDSP-L138 and MityARM-1808 SoMs
From: Michael Williamson @ 2011-01-04 12:50 UTC (permalink / raw)
To: linux-arm-kernel
For the MityDSP-L138/MityARM-1808 SoMs, the speed grade can be determined
from the part number string read from the factory configuration block on
the on-board I2C PROM. Configure the maximum CPU speed based on this
information.
This patch was tested using a MityDSP-L138 and MityARM-1808 at various
speedgrades. Also, for code coverage, a bogus configuration was tested
as well as a configuration having an unknown part number.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Michael Williamson <michael.williamson@criticallink.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
---
Changes since v4.
- Fixup indenting on if block per comments.
arch/arm/mach-davinci/board-mityomapl138.c | 83 +++++++++++++++++++++++++---
1 files changed, 75 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 0bb5f0c..0ea5932 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -44,38 +44,109 @@ struct factory_config {
static struct factory_config factory_config;
+struct part_no_info {
+ const char *part_no; /* part number string of interest */
+ int max_freq; /* khz */
+};
+
+static struct part_no_info mityomapl138_pn_info[] = {
+ {
+ .part_no = "L138-C",
+ .max_freq = 300000,
+ },
+ {
+ .part_no = "L138-D",
+ .max_freq = 375000,
+ },
+ {
+ .part_no = "L138-F",
+ .max_freq = 456000,
+ },
+ {
+ .part_no = "1808-C",
+ .max_freq = 300000,
+ },
+ {
+ .part_no = "1808-D",
+ .max_freq = 375000,
+ },
+ {
+ .part_no = "1808-F",
+ .max_freq = 456000,
+ },
+ {
+ .part_no = "1810-D",
+ .max_freq = 375000,
+ },
+};
+
+#ifdef CONFIG_CPU_FREQ
+static void mityomapl138_cpufreq_init(const char *partnum)
+{
+ int i, ret;
+
+ for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) {
+ /*
+ * the part number has additional characters beyond what is
+ * stored in the table. This information is not needed for
+ * determining the speed grade, and would require several
+ * more table entries. Only check the first N characters
+ * for a match.
+ */
+ if (!strncmp(partnum, mityomapl138_pn_info[i].part_no,
+ strlen(mityomapl138_pn_info[i].part_no))) {
+ da850_max_speed = mityomapl138_pn_info[i].max_freq;
+ break;
+ }
+ }
+
+ ret = da850_register_cpufreq("pll0_sysclk3");
+ if (ret)
+ pr_warning("cpufreq registration failed: %d\n", ret);
+}
+#else
+static void mityomapl138_cpufreq_init(const char *partnum) { }
+#endif
+
static void read_factory_config(struct memory_accessor *a, void *context)
{
int ret;
+ const char *partnum = NULL;
struct davinci_soc_info *soc_info = &davinci_soc_info;
ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
if (ret != sizeof(struct factory_config)) {
pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
ret);
- return;
+ goto bad_config;
}
if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
factory_config.magic);
- return;
+ goto bad_config;
}
if (factory_config.version != FACTORY_CONFIG_VERSION) {
pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
factory_config.version);
- return;
+ goto bad_config;
}
pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
- pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum);
if (is_valid_ether_addr(factory_config.mac))
memcpy(soc_info->emac_pdata->mac_addr,
factory_config.mac, ETH_ALEN);
else
pr_warning("MityOMAPL138: Invalid MAC found "
"in factory config block\n");
+
+ partnum = factory_config.partnum;
+ pr_info("MityOMAPL138: Part Number = %s\n", partnum);
+
+bad_config:
+ /* default maximum speed is valid for all platforms */
+ mityomapl138_cpufreq_init(partnum);
}
static struct at24_platform_data mityomapl138_fd_chip = {
@@ -383,10 +454,6 @@ static void __init mityomapl138_init(void)
if (ret)
pr_warning("rtc setup failed: %d\n", ret);
- ret = da850_register_cpufreq("pll0_sysclk3");
- if (ret)
- pr_warning("cpufreq registration failed: %d\n", ret);
-
ret = da8xx_register_cpuidle();
if (ret)
pr_warning("cpuidle registration failed: %d\n", ret);
--
1.7.0.4
^ permalink raw reply related
* [PATCH 2/4] ARM: make PHYS_OFFSET actually variable
From: Russell King - ARM Linux @ 2011-01-04 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294129208-15201-3-git-send-email-nico@fluxnic.net>
On Tue, Jan 04, 2011 at 03:20:06AM -0500, Nicolas Pitre wrote:
> diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
> index 336f14e..7502bc1 100644
> --- a/arch/arm/kernel/setup.c
> +++ b/arch/arm/kernel/setup.c
> @@ -703,8 +703,10 @@ static struct init_tags {
> } init_tags __initdata = {
> { tag_size(tag_core), ATAG_CORE },
> { 1, PAGE_SIZE, 0xff },
> +#ifndef CONFIG_ARM_PATCH_PHYS_VIRT
> { tag_size(tag_mem32), ATAG_MEM },
> { MEM_SIZE, PHYS_OFFSET },
> +#endif
Removing the definition is not really on - it's there as a fallback and
removing fallbacks is not a good idea unless you can prove beyond doubt
that it'll never be used.
As that depends on the boot loader, it's something that can never be
proven. So, arrange for it to be initialized at runtime, just like I
will be doing in my revised version I'm working on which I detailed in
a previous email.
^ permalink raw reply
* [PATCH v4] davinci: Support various speedgrades for MityDSP-L138 and MityARM-1808 SoMs
From: Michael Williamson @ 2011-01-04 12:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <B85A65D85D7EB246BE421B3FB0FBB593024816DB2A@dbde02.ent.ti.com>
On 1/4/2011 4:35 AM, Nori, Sekhar wrote:
> On Mon, Jan 03, 2011 at 18:51:45, Michael Williamson wrote:
>> For the MityDSP-L138/MityARM-1808 SoMs, the speed grade can be determined
>> from the part number string read from the factory configuration block on
>> the on-board I2C PROM. Configure the maximum CPU speed based on this
>> information.
>>
>> This patch was tested using a MityDSP-L138 and MityARM-1808 at various
>> speedgrades. Also, for code coverage, a bogus configuration was tested
>> as well as a configuration having an unknown part number.
>
> Thanks for the extensive testing. This looks good to me, except,
> a whitespace nit below. But otherwise:
>
> Reviewed-by: Sekhar Nori <nsekhar@ti.com>
>
>> +#ifdef CONFIG_CPU_FREQ
>> +static void mityomapl138_cpufreq_init(const char *partnum)
>> +{
>> + int i, ret;
>> +
>> + for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) {
>> + /*
>> + * the part number has additional characters beyond what is
>> + * stored in the table. This information is not needed for
>> + * determining the speed grade, and would require several
>> + * more table entries. Only check the first N characters
>> + * for a match.
>> + */
>> + if (!strncmp(partnum, mityomapl138_pn_info[i].part_no,
>> + strlen(mityomapl138_pn_info[i].part_no))) {
>> + da850_max_speed = mityomapl138_pn_info[i].max_freq;
>> + break;
>
> The indentation here makes it look like strlen is part of if()
> body. May be you can indent it substantially to the right. I will
> leave it to your judgment.
>
> Thanks,
> Sekhar
I will align the strlen up to the partnum argument above and resubmit.
Thanks for the review.
-Mike
^ permalink raw reply
* [PATCH v3 0/4] Introduce hardware spinlock framework
From: Ohad Ben-Cohen @ 2011-01-04 12:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20101218005311.GE5941@atomide.com>
Hi Andrew,
On Sat, Dec 18, 2010 at 2:53 AM, Tony Lindgren <tony@atomide.com> wrote:
> * Ohad Ben-Cohen <ohad@wizery.com> [101216 13:34]:
>> Tony, Andrew, can you please have a look ?
>>
>> Any comment or suggestion is appreciated.
>
> Looks sane to me from omap point of view and it seems the locks
> are now all timeout based:
>
> Acked-by: Tony Lindgren <tony@atomide.com>
Can you please have a look at this patch set (see link no. [1] below) ?
Short summary:
This hwspinlock framework adds support for hardware-based locking
devices, needed to accomplish synchronization and mutual exclusion
operations between remote processors that have no alternative
mechanism to do so.
This patch set adds a framework and an OMAP implementation. It had
circulated several times in the relevant mailing lists, and all
comments were addressed. The third version of this patch set [1] was
submitted about a month ago and so far there is no outstanding
comment.
Users for this framework that we are aware of:
1. OMAP4 and Davinci Netra (DM8168): both of these SoC have the same
hwspinlock module and will share the same host implementation.
2. Other platforms (such as omap3530 and omapl1xx) that have no such
hardware support, but would still need to achieve synchronization (to
communicate with their DSP).
The only way to achieve mutual exclusion on those platforms is by
using a shared-memory synchronization algorithm called Peterson's
Algorithm [2].
We would still need the same hwspinlock framework for that - the busy
looping, the timeout, the various locking schemes, the lock resource
allocation - are all still valid. The only difference would be the
actual lock implementation, therefore we will add another host
implementation
for these platforms.
3. The C6474, a multi-core DSP device [3], have Linux running on one
of its cores, and hardware support for synchronization (btw the C6474
has a richer hardware module that would need more than the hwspinlock
framework offer today - it also supports queuing, owner semantics and
interrupt notification to let a processor know when it acquires a
lock, so it wouldn't have to spin..). Disclaimer: it will probably
take some time until c6x support is merged upstream, but this is
something that is being actively worked on [4].
Any comment or suggestion is appreciated.
Thanks,
Ohad.
[1] http://www.mail-archive.com/linux-omap at vger.kernel.org/msg39833.html
[2] http://en.wikipedia.org/wiki/Peterson's_algorithm
[3] http://focus.ti.com/docs/prod/folders/print/tms320c6474.html
[4] http://www.linux-c6x.org/wiki/index.php/Main_Page
^ permalink raw reply
* [PATCH 4/4] arm: Kconfig: allow OMAP to use sparse IRQ numbering
From: Felipe Balbi @ 2011-01-04 12:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294142577-28772-1-git-send-email-balbi@ti.com>
Select HAVE_SPARSE_IRQ to allow OMAP to use
sparse IRQ numbering scheme. The main difference
is that irq_descs will be added to a radix tree
instead of a static array.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/Kconfig | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 106d9f6..2413aa6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -820,6 +820,7 @@ config ARCH_DAVINCI
config ARCH_OMAP
bool "TI OMAP"
select HAVE_CLK
+ select HAVE_SPARSE_IRQ
select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
--
1.7.3.4.598.g85356
^ permalink raw reply related
* [PATCH 3/4] arm: Kconfig: remove duplicated SPARSE_IRQ entry
From: Felipe Balbi @ 2011-01-04 12:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294142577-28772-1-git-send-email-balbi@ti.com>
SPARSE_IRQ is defined under kernel/irq/Kconfig so
it's safe to remove the duplicated entry.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/Kconfig | 13 ++-----------
1 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e6f0f8b..106d9f6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -504,7 +504,7 @@ config ARCH_MMP
select GENERIC_CLOCKEVENTS
select TICK_ONESHOT
select PLAT_PXA
- select SPARSE_IRQ
+ select HAVE_SPARSE_IRQ
help
Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
@@ -583,7 +583,7 @@ config ARCH_PXA
select GENERIC_CLOCKEVENTS
select TICK_ONESHOT
select PLAT_PXA
- select SPARSE_IRQ
+ select HAVE_SPARSE_IRQ
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
@@ -1392,15 +1392,6 @@ config HW_PERF_EVENTS
Enable hardware performance counter support for perf events. If
disabled, perf events will use software events only.
-config SPARSE_IRQ
- def_bool n
- help
- This enables support for sparse irqs. This is useful in general
- as most CPUs have a fairly sparse array of IRQ vectors, which
- the irq_desc then maps directly on to. Systems with a high
- number of off-chip IRQs will want to treat this as
- experimental until they have been independently verified.
-
source "mm/Kconfig"
config FORCE_MAX_ZONEORDER
--
1.7.3.4.598.g85356
^ permalink raw reply related
* [PATCH 2/4] arm: Kconfig: remove duplicated GENERIC_HARDIRQS entry
From: Felipe Balbi @ 2011-01-04 12:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294142577-28772-1-git-send-email-balbi@ti.com>
GENERIC_HARDIRQS is defined under kernel/irq/Kconfig,
so it's safe to drop the duplicated entry and simply
select HAVE_GENERIC_HARDIRQS.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/Kconfig | 8 +-------
1 files changed, 1 insertions(+), 7 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d56d21c0..e6f0f8b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -15,6 +15,7 @@ config ARM
select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
select HAVE_GENERIC_DMA_COHERENT
+ select HAVE_GENERIC_HARDIRQS
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZO
select HAVE_KERNEL_LZMA
@@ -88,10 +89,6 @@ config MCA
<file:Documentation/mca.txt> (and especially the web page given
there) before attempting to build an MCA bus kernel.
-config GENERIC_HARDIRQS
- bool
- default y
-
config STACKTRACE_SUPPORT
bool
default y
@@ -171,9 +168,6 @@ config FIQ
config ARCH_MTD_XIP
bool
-config GENERIC_HARDIRQS_NO__DO_IRQ
- def_bool y
-
config ARM_L1_CACHE_SHIFT_6
bool
help
--
1.7.3.4.598.g85356
^ permalink raw reply related
* [PATCH 1/4] arm: omap: gpio: don't access irq_desc array directly
From: Felipe Balbi @ 2011-01-04 12:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294142577-28772-1-git-send-email-balbi@ti.com>
Instead of accessing the irq_desc array directly
we can use irq_to_desc(irq). That will allow us to,
if wanted, select SPARSE_IRQ and irq_descs will be
added to a radix tree, instead of a array.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/plat-omap/gpio.c | 10 +++++++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index c05c653..c351758 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -905,8 +905,10 @@ static int gpio_irq_type(unsigned irq, unsigned type)
spin_lock_irqsave(&bank->lock, flags);
retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
if (retval == 0) {
- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
- irq_desc[irq].status |= type;
+ struct irq_desc *d = irq_to_desc(irq);
+
+ d->status &= ~IRQ_TYPE_SENSE_MASK;
+ d->status |= type;
}
spin_unlock_irqrestore(&bank->lock, flags);
@@ -1925,7 +1927,9 @@ static int __init _omap_gpio_init(void)
for (j = bank->virtual_irq_start;
j < bank->virtual_irq_start + gpio_count; j++) {
- lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
+ struct irq_desc *d = irq_to_desc(j);
+
+ lockdep_set_class(&d->lock, &gpio_lock_class);
set_irq_chip_data(j, bank);
if (bank_is_mpuio(bank))
set_irq_chip(j, &mpuio_irq_chip);
--
1.7.3.4.598.g85356
^ permalink raw reply related
* [PATCH 0/4] ARM IRQ Changes
From: Felipe Balbi @ 2011-01-04 12:02 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
a few patches to enable sparse IRQ numbering on OMAP.
Also a few cleanups to arch/arm/Kconfig.
for convenience patches are also available from [1]:
[1] git://gitorious.org/usb/usb.git irq
Felipe Balbi (4):
arm: omap: gpio: don't access irq_desc array directly
arm: Kconfig: remove duplicated GENERIC_HARDIRQS entry
arm: Kconfig: remove duplicated SPARSE_IRQ entry
arm: Kconfig: allow OMAP to use sparse IRQ numbering
arch/arm/Kconfig | 22 ++++------------------
arch/arm/plat-omap/gpio.c | 10 +++++++---
2 files changed, 11 insertions(+), 21 deletions(-)
--
1.7.3.4.598.g85356
^ permalink raw reply
* zaurus bluetooth regression
From: Yegor Yefremov @ 2011-01-04 11:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110103141727.GA1536@ucw.cz>
>> >> It seems this commit
>> >>
>> >> commit 7a56aa45982bb87bfca98a2832b5ae782c03364a
>> > ...
>> >> ...is responsible for my bluetooth problems on zaurus -- at least
>> >> bisect pointed to it, ?as I use 16C950-based bluetooth card, it seems
>> >> very logical. I'll try 2.6.37-rc8 with that patch reverted...
>> >>
>> >
>> > And yes, 37-rc8 with that reverted results in working bluetooth, so
>> > yrs, that patch is responsible.
>>
>> could you tell, what kind of problem you're encountering and if you
>> could tell, which flag UART_CAP_EFR or UART_CAP_SLEEP causes the
>> problem?
>
> Bluetooth will not work with 'tx command timeout', details should be
> in bugzilla.
>
> CAP_EFR seems to cause the problem.
Aside from sleep functions the only impact CAP_EFR makes is enabling
automatic CTS flow control. Below the cite from 16C950 data sheet:
"EFR[7]: Enable automatic CTS flow control.
logic 0 ? CTS flow control is disabled (default).
logic 1 ? CTS flow control is enabled in Enhanced mode
(i.e. EFR[4] = 1), where the data transmission is
prevented whenever the CTS# pin is held
inactive high. 650 and 950-mode drivers should
use this bit to enable CTS flow control. 750
mode drivers should use MCR[5].
When automatic CTS flow control is enabled and the CTS#
input becomes active, the UART will disable transmission
as soon as any current character transmission is complete.
Transmission is resumed whenever the CTS# input
becomes inactive. "
I've tested with such an UART and transmitted some chunk of data with
and without RTS/CTS flow control enabled at 460800 b/s. The test
showed that in enabled state all data was transmitted correctly.
Without RTS/CTS flow control enabled there was massive data loss, as
expected. So the flow control function seems to work correctly.
Regards,
Yegor
^ permalink raw reply
* [PATCH 2/2] arm: omap: select HAVE_SPARSE_IRQ
From: Felipe Balbi @ 2011-01-04 11:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110104114207.GA19293@n2100.arm.linux.org.uk>
Hi,
On Tue, Jan 04, 2011 at 11:42:07AM +0000, Russell King - ARM Linux wrote:
>On Tue, Jan 04, 2011 at 12:34:32PM +0200, Felipe Balbi wrote:
>> do you mean:
>
>Yes, but without the breakage caused by your mailer - posting patches
good, I'll re-send the series in a bit.
>with flowed formatting is a recipe for this kind of disaster:
>
>Content-Type: text/plain; charset=us-ascii; format=flowed
>
>You appear to be using mutt, so set:
>
>set text_flowed=no
>
>in your .muttrc to avoid this corruption.
sorry about that, fixed.
--
balbi
^ permalink raw reply
* [PATCH 2/2] arm: omap: select HAVE_SPARSE_IRQ
From: Russell King - ARM Linux @ 2011-01-04 11:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110104103432.GM2656@legolas.emea.dhcp.ti.com>
On Tue, Jan 04, 2011 at 12:34:32PM +0200, Felipe Balbi wrote:
> do you mean:
Yes, but without the breakage caused by your mailer - posting patches
with flowed formatting is a recipe for this kind of disaster:
Content-Type: text/plain; charset=us-ascii; format=flowed
You appear to be using mutt, so set:
set text_flowed=no
in your .muttrc to avoid this corruption.
^ permalink raw reply
* [PATCH 2/3] perf: add OMAP support for the new power events
From: jean.pihet at newoldbits.com @ 2011-01-04 10:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294136263-24020-1-git-send-email-j-pihet@ti.com>
From: Jean Pihet <j-pihet@ti.com>
The patch adds the new power management trace points for
the OMAP architecture.
The trace points are for:
- default idle handler. Since the cpuidle framework is
instrumented in the generic way there is no need to
add trace points in the OMAP specific cpuidle handler;
- cpufreq (DVFS),
- clocks changes (enable, disable, set_rate),
- change of power domains next power states.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
---
arch/arm/mach-omap2/pm34xx.c | 7 +++++++
arch/arm/mach-omap2/powerdomain.c | 3 +++
arch/arm/plat-omap/clock.c | 13 ++++++++++---
3 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0ec8a04..0ee0b0e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -29,6 +29,7 @@
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/console.h>
+#include <trace/events/power.h>
#include <plat/sram.h>
#include <plat/clockdomain.h>
@@ -506,8 +507,14 @@ static void omap3_pm_idle(void)
if (omap_irq_pending() || need_resched())
goto out;
+ trace_power_start(POWER_CSTATE, 1, smp_processor_id());
+ trace_cpu_idle(1, smp_processor_id());
+
omap_sram_idle();
+ trace_power_end(smp_processor_id());
+ trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
+
out:
local_fiq_enable();
local_irq_enable();
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 6527ec3..73cbe9a 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -23,6 +23,7 @@
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>
+#include <trace/events/power.h>
#include <asm/atomic.h>
@@ -440,6 +441,8 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
pr_debug("powerdomain: setting next powerstate for %s to %0x\n",
pwrdm->name, pwrst);
+ trace_power_domain_target(pwrdm->name, pwrst, smp_processor_id());
+
prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, pwrstctrl_reg_offs);
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index fc62fb5..7cbb09b 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -21,6 +21,7 @@
#include <linux/cpufreq.h>
#include <linux/debugfs.h>
#include <linux/io.h>
+#include <trace/events/power.h>
#include <plat/clock.h>
@@ -43,8 +44,10 @@ int clk_enable(struct clk *clk)
return -EINVAL;
spin_lock_irqsave(&clockfw_lock, flags);
- if (arch_clock->clk_enable)
+ if (arch_clock->clk_enable) {
+ trace_clock_enable(clk->name, 1, smp_processor_id());
ret = arch_clock->clk_enable(clk);
+ }
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
@@ -66,8 +69,10 @@ void clk_disable(struct clk *clk)
goto out;
}
- if (arch_clock->clk_disable)
+ if (arch_clock->clk_disable) {
+ trace_clock_disable(clk->name, 0, smp_processor_id());
arch_clock->clk_disable(clk);
+ }
out:
spin_unlock_irqrestore(&clockfw_lock, flags);
@@ -120,8 +125,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
return ret;
spin_lock_irqsave(&clockfw_lock, flags);
- if (arch_clock->clk_set_rate)
+ if (arch_clock->clk_set_rate) {
+ trace_clock_set_rate(clk->name, rate, smp_processor_id());
ret = arch_clock->clk_set_rate(clk, rate);
+ }
if (ret == 0) {
if (clk->recalc)
clk->rate = clk->recalc(clk);
--
1.7.2.3
^ permalink raw reply related
* [PATCH 06/13] DMAENGINE: driver for the ARM PL080/PL081 PrimeCells
From: Linus Walleij @ 2011-01-04 10:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110103151944.GA32508@n2100.arm.linux.org.uk>
2011/1/3 Russell King - ARM Linux <linux@arm.linux.org.uk>:
> Pausing an on-going transfer (which from what I read is a recent addition
> to the API)
Added by me to handle the PrimeCells actually, but also needed
especially for good audio streaming.
> The problem comes when the peripheral stops requesting data from the
> DMAC, and then you want to pause it. ?Current code sets the HALT bit,
> and then spins indefinitely for the BUSY bit to clear - which it will
> only ever do if the peripheral drains the FIFO. ?As a result of botched
> DMA signal selection code for the Realview EB, the DMA signals never
> went active, and on terminate_all() the CPU locked up solid (no
> interrupts) spinning on the DMAC to clear the busy bit.
Argh, how typical.
BTW it's great that you have the EB up, I think it's very close or
identical to PB11MPCore and PBA8/PBA9 in this regard.
> It may be worth specifying that a pause followed by a resume is
> expected to never lose data - and that drivers must check the result
> of a request to pause the channel.
Sounds reasonable.
> If DMA engine drivers are unable
> to pause the channel within a reasonable amount of time, they should
> return -ETIMEOUT, so they know that there may still be data that
> could still be transferred to the peripheral.
So the -ETIMEOUT needs to have the semantic meaning
"data is in flight". Doesn't -EBUSY fit better to describe that,
though it will be caused by a spin-loop timeout?
(OK maybe nitpicky, doesn't really matter as long as we specify
*something*, but see below for the better semantic meaning of
this when handling the error code.)
> One important note about this condition is that with the DMA channel
> marked BUSY+HALT and the channel being configured for M->P, the
> peripheral can still transfer data from the DMAC to itself, and this
> causes the transfer size value in the CNTL register to decrement (since
> reading the CNTL register returns the number of transfers _to_ the
> destination, not the number of transfers from the source.)
>
> I've changed the comment against pl08x_pause_phy_chan() to this:
>
> ?* Pause the channel by setting the HALT bit.
> ?*
> ?* For M->P transfers, pause the DMAC first and then stop the peripheral -
> ?* the FIFO can only drain if the peripheral is still requesting data.
> ?* (note: this can still timeout if the DMAC FIFO never drains of data.)
> ?*
> ?* For P->M transfers, disable the peripheral first to stop it filling
> ?* the DMAC FIFO, and then pause the DMAC.
This is exactly how it must work. Thanks Russell.
> I've not decided whether it should be possible to resume an ETIMEOUT'd
> pause request (in theory with pl08x, that's just a matter of clearing
> the HALT bit) or whether an ETIMEOUT'd pause request should restore
> the previous HALT bit setting (possibly re-enabling transfers on the
> channel.) ?Allowing it to be re-enabled in some way would be the safest
> thing in terms of data integrity for the reason mentioned in the
> "important note" above.
Hmhm. One part of me wants the DMAC to clear the state of that
channel completely if this timeout happens and you return
-ETIMEOUT and not allow resuming, but if you return -EBUSY
as per above, the pause has definately failed and there is
nothing to resume, we're still in flight and the only way to
really stop the transfer from that point is to TERMINATE_ALL.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 0/4] variable PHYS_OFFSET support
From: Russell King - ARM Linux @ 2011-01-04 10:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294129208-15201-1-git-send-email-nico@fluxnic.net>
On Tue, Jan 04, 2011 at 03:20:04AM -0500, Nicolas Pitre wrote:
> So here it is, in a form which I think should be ready for merging.
>
> ARM mode is well tested.
> Thumb2 mode is only compile tested at the moment.
I don't believe this is ready for merging - there's still work to be
done with the early assembly code using PHYS_OFFSET. That currently
doesn't _appear_ to be a problem because it still uses the old platform
specific setting of PHYS_OFFSET - and that needs careful thought as:
#if (PHYS_OFFSET & 0x001fffff)
#error "PHYS_OFFSET must be at an even 2MiB boundary!"
#endif
has been eroded from 16MB downwards to 2MB over time because of
platform setups - eg, MSM for example.
As we're having to store the p:v offset (it's cheaper to store it than
your way of making PHYS_OFFSET depend on the translation and PAGE_OFFSET)
then we might as well also store what we think is the physical offset
and use that for PHYS_OFFSET too once the assembly code issue has been
sorted.
So, what I suggest is a different patch ordering:
1. Fix the assembly code not to rely upon a fixed PHYS_OFFSET (is this
even possible with the 2MB requirement?)
2. Fix the initializers in platform code (ignoring MSM).
3. Rename PHYS_OFFSET to be PLAT_PHYS_OFFSET in platform memory.h files,
defining PHYS_OFFSET in asm/memory.h to be PLAT_PHYS_OFFSET. (We
could make PHYS_OFFSET at this point be a variable, which'd stop any
new initializers using PHYS_OFFSET - which I think would be beneficial
anyway.)
4. Introduce P2V patching _with_ the module support. With this patch
create __pv_phys_offset, and if P2V patching is enabled, redefine
PHYS_OFFSET to be this variable. Note that __pv_phys_offset would
need to be exported to modules.
So, I don't think it's ready for this coming merge window.
^ permalink raw reply
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