* [PATCH] ARM: aaec2000: remove support for mach-aaec2000
From: Jamie Iles @ 2011-01-07 20:00 UTC (permalink / raw)
To: linux-arm-kernel
mach-aaec2000 is no longer actively maintained and is only receiving
fixups to remain building with other kernel updates.
Cc: Bellido Nicolas <ml@acolin.be>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 11 -
arch/arm/Makefile | 1 -
arch/arm/mach-aaec2000/Kconfig | 11 -
arch/arm/mach-aaec2000/Makefile | 9 -
arch/arm/mach-aaec2000/Makefile.boot | 1 -
arch/arm/mach-aaec2000/aaed2000.c | 102 -------
arch/arm/mach-aaec2000/core.c | 298 ---------------------
arch/arm/mach-aaec2000/core.h | 28 --
arch/arm/mach-aaec2000/include/mach/aaec2000.h | 207 --------------
arch/arm/mach-aaec2000/include/mach/aaed2000.h | 40 ---
arch/arm/mach-aaec2000/include/mach/debug-macro.S | 35 ---
arch/arm/mach-aaec2000/include/mach/entry-macro.S | 40 ---
arch/arm/mach-aaec2000/include/mach/hardware.h | 50 ----
arch/arm/mach-aaec2000/include/mach/io.h | 18 --
arch/arm/mach-aaec2000/include/mach/irqs.h | 46 ----
arch/arm/mach-aaec2000/include/mach/memory.h | 17 --
arch/arm/mach-aaec2000/include/mach/system.h | 24 --
arch/arm/mach-aaec2000/include/mach/timex.h | 18 --
arch/arm/mach-aaec2000/include/mach/uncompress.h | 46 ----
arch/arm/mach-aaec2000/include/mach/vmalloc.h | 16 --
20 files changed, 0 insertions(+), 1018 deletions(-)
delete mode 100644 arch/arm/mach-aaec2000/Kconfig
delete mode 100644 arch/arm/mach-aaec2000/Makefile
delete mode 100644 arch/arm/mach-aaec2000/Makefile.boot
delete mode 100644 arch/arm/mach-aaec2000/aaed2000.c
delete mode 100644 arch/arm/mach-aaec2000/core.c
delete mode 100644 arch/arm/mach-aaec2000/core.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/aaec2000.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/aaed2000.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/debug-macro.S
delete mode 100644 arch/arm/mach-aaec2000/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-aaec2000/include/mach/hardware.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/io.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/irqs.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/memory.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/system.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/timex.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-aaec2000/include/mach/vmalloc.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e0b40ae..985f98d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -217,15 +217,6 @@ choice
prompt "ARM system type"
default ARCH_VERSATILE
-config ARCH_AAEC2000
- bool "Agilent AAEC-2000 based"
- select CPU_ARM920T
- select ARM_AMBA
- select HAVE_CLK
- select ARCH_USES_GETTIMEOFFSET
- help
- This enables support for systems based on the Agilent AAEC-2000
-
config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
select ARM_AMBA
@@ -886,8 +877,6 @@ endchoice
# Kconfigs may be included either alphabetically (according to the
# plat- suffix) or along side the corresponding mach-* source.
#
-source "arch/arm/mach-aaec2000/Kconfig"
-
source "arch/arm/mach-at91/Kconfig"
source "arch/arm/mach-bcmring/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c22c1ad..3920939 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -126,7 +126,6 @@ endif
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
-machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
machine-$(CONFIG_ARCH_AT91) := at91
machine-$(CONFIG_ARCH_BCMRING) := bcmring
machine-$(CONFIG_ARCH_CLPS711X) := clps711x
diff --git a/arch/arm/mach-aaec2000/Kconfig b/arch/arm/mach-aaec2000/Kconfig
deleted file mode 100644
index 5e4bef9..0000000
--- a/arch/arm/mach-aaec2000/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if ARCH_AAEC2000
-
-menu "Agilent AAEC-2000 Implementations"
-
-config MACH_AAED2000
- bool "Agilent AAED-2000 Development Platform"
- select CPU_ARM920T
-
-endmenu
-
-endif
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
deleted file mode 100644
index 20ec838..0000000
--- a/arch/arm/mach-aaec2000/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Common support (must be linked before board specific support)
-obj-y += core.o
-
-# Specific board support
-obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/Makefile.boot b/arch/arm/mach-aaec2000/Makefile.boot
deleted file mode 100644
index 8f5a8b7..0000000
--- a/arch/arm/mach-aaec2000/Makefile.boot
+++ /dev/null
@@ -1 +0,0 @@
- zreladdr-y := 0xf0008000
diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c
deleted file mode 100644
index 0eb3e3e..0000000
--- a/arch/arm/mach-aaec2000/aaed2000.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * linux/arch/arm/mach-aaec2000/aaed2000.c
- *
- * Support for the Agilent AAED-2000 Development Platform.
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/major.h>
-#include <linux/interrupt.h>
-
-#include <asm/setup.h>
-#include <asm/memory.h>
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/aaed2000.h>
-
-#include "core.h"
-
-static void aaed2000_clcd_disable(struct clcd_fb *fb)
-{
- AAED_EXT_GPIO &= ~AAED_EGPIO_LCD_PWR_EN;
-}
-
-static void aaed2000_clcd_enable(struct clcd_fb *fb)
-{
- AAED_EXT_GPIO |= AAED_EGPIO_LCD_PWR_EN;
-}
-
-struct aaec2000_clcd_info clcd_info = {
- .enable = aaed2000_clcd_enable,
- .disable = aaed2000_clcd_disable,
- .panel = {
- .mode = {
- .name = "Sharp",
- .refresh = 60,
- .xres = 640,
- .yres = 480,
- .pixclock = 39721,
- .left_margin = 20,
- .right_margin = 44,
- .upper_margin = 21,
- .lower_margin = 34,
- .hsync_len = 96,
- .vsync_len = 2,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED,
- },
- .width = -1,
- .height = -1,
- .tim2 = TIM2_IVS | TIM2_IHS,
- .cntl = CNTL_LCDTFT,
- .bpp = 16,
- },
-};
-
-static void __init aaed2000_init_irq(void)
-{
- aaec2000_init_irq();
-}
-
-static void __init aaed2000_init(void)
-{
- aaec2000_set_clcd_plat_data(&clcd_info);
-}
-
-static struct map_desc aaed2000_io_desc[] __initdata = {
- {
- .virtual = EXT_GPIO_VBASE,
- .pfn = __phys_to_pfn(EXT_GPIO_PBASE),
- .length = EXT_GPIO_LENGTH,
- .type = MT_DEVICE
- },
-};
-
-static void __init aaed2000_map_io(void)
-{
- aaec2000_map_io();
- iotable_init(aaed2000_io_desc, ARRAY_SIZE(aaed2000_io_desc));
-}
-
-MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
- /* Maintainer: Nicolas Bellido Y Ortega */
- .map_io = aaed2000_map_io,
- .init_irq = aaed2000_init_irq,
- .timer = &aaec2000_timer,
- .init_machine = aaed2000_init,
-MACHINE_END
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
deleted file mode 100644
index 3ef6833..0000000
--- a/arch/arm/mach-aaec2000/core.c
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * linux/arch/arm/mach-aaec2000/core.c
- *
- * Code common to all AAEC-2000 machines
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/dma-mapping.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/signal.h>
-#include <linux/clk.h>
-#include <linux/gfp.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <asm/sizes.h>
-
-#include <asm/mach/flash.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-#include "core.h"
-
-/*
- * Common I/O mapping:
- *
- * Static virtual address mappings are as follow:
- *
- * 0xf8000000-0xf8001ffff: Devices connected to APB bus
- * 0xf8002000-0xf8003ffff: Devices connected to AHB bus
- *
- * Below 0xe8000000 is reserved for vm allocation.
- *
- * The machine specific code must provide the extra mapping beside the
- * default mapping provided here.
- */
-static struct map_desc standard_io_desc[] __initdata = {
- {
- .virtual = VIO_APB_BASE,
- .pfn = __phys_to_pfn(PIO_APB_BASE),
- .length = IO_APB_LENGTH,
- .type = MT_DEVICE
- }, {
- .virtual = VIO_AHB_BASE,
- .pfn = __phys_to_pfn(PIO_AHB_BASE),
- .length = IO_AHB_LENGTH,
- .type = MT_DEVICE
- }
-};
-
-void __init aaec2000_map_io(void)
-{
- iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
-}
-
-/*
- * Interrupt handling routines
- */
-static void aaec2000_int_ack(unsigned int irq)
-{
- IRQ_INTSR = 1 << irq;
-}
-
-static void aaec2000_int_mask(unsigned int irq)
-{
- IRQ_INTENC |= (1 << irq);
-}
-
-static void aaec2000_int_unmask(unsigned int irq)
-{
- IRQ_INTENS |= (1 << irq);
-}
-
-static struct irq_chip aaec2000_irq_chip = {
- .ack = aaec2000_int_ack,
- .mask = aaec2000_int_mask,
- .unmask = aaec2000_int_unmask,
-};
-
-void __init aaec2000_init_irq(void)
-{
- unsigned int i;
-
- for (i = 0; i < NR_IRQS; i++) {
- set_irq_handler(i, handle_level_irq);
- set_irq_chip(i, &aaec2000_irq_chip);
- set_irq_flags(i, IRQF_VALID);
- }
-
- /* Disable all interrupts */
- IRQ_INTENC = 0xffffffff;
-
- /* Clear any pending interrupts */
- IRQ_INTSR = IRQ_INTSR;
-}
-
-/*
- * Time keeping
- */
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long aaec2000_gettimeoffset(void)
-{
- unsigned long ticks_to_match, elapsed, usec;
-
- /* Get ticks before next timer match */
- ticks_to_match = TIMER1_LOAD - TIMER1_VAL;
-
- /* We need elapsed ticks since last match */
- elapsed = LATCH - ticks_to_match;
-
- /* Now, convert them to usec */
- usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
- return usec;
-}
-
-/* We enter here with IRQs enabled */
-static irqreturn_t
-aaec2000_timer_interrupt(int irq, void *dev_id)
-{
- /* TODO: Check timer accuracy */
- timer_tick();
- TIMER1_CLEAR = 1;
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction aaec2000_timer_irq = {
- .name = "AAEC-2000 Timer Tick",
- .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = aaec2000_timer_interrupt,
-};
-
-static void __init aaec2000_timer_init(void)
-{
- /* Disable timer 1 */
- TIMER1_CTRL = 0;
-
- /* We have somehow to generate a 100Hz clock.
- * We then use the 508KHz timer in periodic mode.
- */
- TIMER1_LOAD = LATCH;
- TIMER1_CLEAR = 1; /* Clear interrupt */
-
- setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq);
-
- TIMER1_CTRL = TIMER_CTRL_ENABLE |
- TIMER_CTRL_PERIODIC |
- TIMER_CTRL_CLKSEL_508K;
-}
-
-struct sys_timer aaec2000_timer = {
- .init = aaec2000_timer_init,
- .offset = aaec2000_gettimeoffset,
-};
-
-static struct clcd_panel mach_clcd_panel;
-
-static int aaec2000_clcd_setup(struct clcd_fb *fb)
-{
- dma_addr_t dma;
-
- fb->panel = &mach_clcd_panel;
-
- fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
- &dma, GFP_KERNEL);
-
- if (!fb->fb.screen_base) {
- printk(KERN_ERR "CLCD: unable to map framebuffer\n");
- return -ENOMEM;
- }
-
- fb->fb.fix.smem_start = dma;
- fb->fb.fix.smem_len = SZ_1M;
-
- return 0;
-}
-
-static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
-{
- return dma_mmap_writecombine(&fb->dev->dev, vma,
- fb->fb.screen_base,
- fb->fb.fix.smem_start,
- fb->fb.fix.smem_len);
-}
-
-static void aaec2000_clcd_remove(struct clcd_fb *fb)
-{
- dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
- fb->fb.screen_base, fb->fb.fix.smem_start);
-}
-
-static struct clcd_board clcd_plat_data = {
- .name = "AAEC-2000",
- .check = clcdfb_check,
- .decode = clcdfb_decode,
- .setup = aaec2000_clcd_setup,
- .mmap = aaec2000_clcd_mmap,
- .remove = aaec2000_clcd_remove,
-};
-
-static struct amba_device clcd_device = {
- .dev = {
- .init_name = "mb:16",
- .coherent_dma_mask = ~0,
- .platform_data = &clcd_plat_data,
- },
- .res = {
- .start = AAEC_CLCD_PHYS,
- .end = AAEC_CLCD_PHYS + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .irq = { INT_LCD, NO_IRQ },
- .periphid = 0x41110,
-};
-
-static struct amba_device *amba_devs[] __initdata = {
- &clcd_device,
-};
-
-void clk_disable(struct clk *clk)
-{
-}
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
- return 0;
-}
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- return dev && strcmp(dev_name(dev), "mb:16") == 0 ? NULL : ERR_PTR(-ENOENT);
-}
-
-void clk_put(struct clk *clk)
-{
-}
-
-void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
-{
- clcd_plat_data.enable = clcd->enable;
- clcd_plat_data.disable = clcd->disable;
- memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
-}
-
-static struct flash_platform_data aaec2000_flash_data = {
- .map_name = "cfi_probe",
- .width = 4,
-};
-
-static struct resource aaec2000_flash_resource = {
- .start = AAEC_FLASH_BASE,
- .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device aaec2000_flash_device = {
- .name = "armflash",
- .id = 0,
- .dev = {
- .platform_data = &aaec2000_flash_data,
- },
- .num_resources = 1,
- .resource = &aaec2000_flash_resource,
-};
-
-static int __init aaec2000_init(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
- struct amba_device *d = amba_devs[i];
- amba_device_register(d, &iomem_resource);
- }
-
- platform_device_register(&aaec2000_flash_device);
-
- return 0;
-};
-arch_initcall(aaec2000_init);
-
diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h
deleted file mode 100644
index 59501b5..0000000
--- a/arch/arm/mach-aaec2000/core.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * linux/arch/arm/mach-aaec2000/core.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/amba/bus.h>
-#include <linux/amba/clcd.h>
-
-struct sys_timer;
-
-extern struct sys_timer aaec2000_timer;
-extern void __init aaec2000_map_io(void);
-extern void __init aaec2000_init_irq(void);
-
-struct aaec2000_clcd_info {
- struct clcd_panel panel;
- void (*disable)(struct clcd_fb *);
- void (*enable)(struct clcd_fb *);
-};
-
-extern void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *);
-
diff --git a/arch/arm/mach-aaec2000/include/mach/aaec2000.h b/arch/arm/mach-aaec2000/include/mach/aaec2000.h
deleted file mode 100644
index bc729c4..0000000
--- a/arch/arm/mach-aaec2000/include/mach/aaec2000.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/aaec2000.h
- *
- * AAEC-2000 registers definition
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_AAEC2000_H
-#define __ASM_ARCH_AAEC2000_H
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error You must include hardware.h not this file
-#endif /* __ASM_ARCH_HARDWARE_H */
-
-/* Chip selects */
-#define AAEC_CS0 0x00000000
-#define AAEC_CS1 0x10000000
-#define AAEC_CS2 0x20000000
-#define AAEC_CS3 0x30000000
-
-/* Flash */
-#define AAEC_FLASH_BASE AAEC_CS0
-#define AAEC_FLASH_SIZE SZ_64M
-
-/* Interrupt controller */
-#define IRQ_BASE __REG(0x80000500)
-#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
-#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */
-#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */
-#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */
-
-/* UART 1 */
-#define UART1_BASE __REG(0x80000600)
-#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */
-#define UART1_LCR __REG(0x80000604) /* Link Control Register */
-#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */
-#define UART1_CR __REG(0x8000060c) /* Control Register */
-#define UART1_SR __REG(0x80000610) /* Status Register */
-#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */
-#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */
-#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */
-
-/* UART 2 */
-#define UART2_BASE __REG(0x80000700)
-#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */
-#define UART2_LCR __REG(0x80000704) /* Link Control Register */
-#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */
-#define UART2_CR __REG(0x8000070c) /* Control Register */
-#define UART2_SR __REG(0x80000710) /* Status Register */
-#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */
-#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */
-#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */
-
-/* UART 3 */
-#define UART3_BASE __REG(0x80000800)
-#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */
-#define UART3_LCR __REG(0x80000804) /* Link Control Register */
-#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */
-#define UART3_CR __REG(0x8000080c) /* Control Register */
-#define UART3_SR __REG(0x80000810) /* Status Register */
-#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */
-#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */
-#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */
-
-/* These are used in some places */
-#define _UART1_BASE __PREG(UART1_BASE)
-#define _UART2_BASE __PREG(UART2_BASE)
-#define _UART3_BASE __PREG(UART3_BASE)
-
-/* UART Registers Offsets */
-#define UART_DR 0x00
-#define UART_LCR 0x04
-#define UART_BRCR 0x08
-#define UART_CR 0x0c
-#define UART_SR 0x10
-#define UART_INT 0x14
-#define UART_INTM 0x18
-#define UART_INTRES 0x1c
-
-/* UART_LCR Bitmask */
-#define UART_LCR_BRK (1 << 0) /* Send Break */
-#define UART_LCR_PEN (1 << 1) /* Parity Enable */
-#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */
-#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */
-#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */
-#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */
-#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */
-#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */
-#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */
-
-/* UART_CR Bitmask */
-#define UART_CR_EN (1 << 0) /* UART Enable */
-#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */
-#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */
-#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */
-#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */
-#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */
-#define UART_CR_LOOP (1 << 6) /* Loopback Mode */
-
-/* UART_SR Bitmask */
-#define UART_SR_CTS (1 << 0) /* Clear To Send Status */
-#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */
-#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */
-#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */
-#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */
-#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */
-#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */
-#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */
-
-/* UART_INT Bitmask */
-#define UART_INT_RIS (1 << 0) /* Rx Interrupt */
-#define UART_INT_TIS (1 << 1) /* Tx Interrupt */
-#define UART_INT_MIS (1 << 2) /* Modem Interrupt */
-#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */
-
-/* Timer 1 */
-#define TIMER1_BASE __REG(0x80000c00)
-#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */
-#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */
-#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */
-#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */
-
-/* Timer 2 */
-#define TIMER2_BASE __REG(0x80000d00)
-#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */
-#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */
-#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */
-#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */
-
-/* Timer 3 */
-#define TIMER3_BASE __REG(0x80000e00)
-#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */
-#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */
-#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */
-#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */
-
-/* Timer Control register bits */
-#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start Timer) */
-#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */
-#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */
-#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */
-#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2) */
-
-/* Power and State Control */
-#define POWER_BASE __REG(0x80000400)
-#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */
-#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */
-#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */
-#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */
-#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */
-#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */
-#define POWER_TEOI __REG(0x80000418) /* Tick EoI */
-#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
-#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
-
-/* GPIO Registers */
-#define AAEC_GPIO_PHYS 0x80000e00
-
-#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00)
-#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04)
-#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08)
-#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c)
-#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10)
-#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14)
-#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18)
-#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c)
-#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20)
-#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24)
-#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28)
-#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c)
-#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30)
-#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34)
-#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38)
-#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c)
-#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40)
-#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44)
-#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48)
-#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c)
-#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50)
-#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54)
-#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58)
-#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c)
-#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60)
-#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64)
-#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68)
-#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c)
-#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70)
-#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74)
-#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78)
-#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c)
-#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80)
-#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84)
-
-#define AAEC_GPIO_PINMUX_PE0CON (1 << 0)
-#define AAEC_GPIO_PINMUX_PD0CON (1 << 1)
-#define AAEC_GPIO_PINMUX_CODECON (1 << 2)
-#define AAEC_GPIO_PINMUX_UART3CON (1 << 3)
-
-/* LCD Controller */
-#define AAEC_CLCD_PHYS 0x80003000
-
-#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/aaed2000.h b/arch/arm/mach-aaec2000/include/mach/aaed2000.h
deleted file mode 100644
index f821295..0000000
--- a/arch/arm/mach-aaec2000/include/mach/aaed2000.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/aaed2000.h
- *
- * AAED-2000 specific bits definition
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_AAED2000_H
-#define __ASM_ARCH_AAED2000_H
-
-/* External GPIOs. */
-
-#define EXT_GPIO_PBASE AAEC_CS3
-#define EXT_GPIO_VBASE 0xf8100000
-#define EXT_GPIO_LENGTH 0x00001000
-
-#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE)
-#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE)
-
-#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x)))
-#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x)))
-
-#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE)
-
-#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */
-#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */
-#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */
-#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */
-#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */
-#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */
-#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */
-#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */
-
-
-#endif /* __ARM_ARCH_AAED2000_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/debug-macro.S b/arch/arm/mach-aaec2000/include/mach/debug-macro.S
deleted file mode 100644
index bc7ad55..0000000
--- a/arch/arm/mach-aaec2000/include/mach/debug-macro.S
+++ /dev/null
@@ -1,35 +0,0 @@
-/* arch/arm/mach-aaec2000/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include "hardware.h"
- .macro addruart, rp, rv
- mov \rp, 0x00000800
- orr \rv, \rp, #io_p2v(0x80000000) @ virtual
- orr \rp, \rp, #0x80000000 @ physical
- .endm
-
- .macro senduart,rd,rx
- str \rd, [\rx, #0]
- .endm
-
- .macro busyuart,rd,rx
-1002: ldr \rd, [\rx, #0x10]
- tst \rd, #(1 << 7)
- beq 1002b
- .endm
-
- .macro waituart,rd,rx
-#if 0
-1001: ldr \rd, [\rx, #0x10]
- tst \rd, #(1 << 5)
- beq 1001b
-#endif
- .endm
diff --git a/arch/arm/mach-aaec2000/include/mach/entry-macro.S b/arch/arm/mach-aaec2000/include/mach/entry-macro.S
deleted file mode 100644
index c8fb344..0000000
--- a/arch/arm/mach-aaec2000/include/mach/entry-macro.S
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/entry-macro.S
- *
- * Low-level IRQ helper for aaec-2000 based platforms
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <mach/irqs.h>
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_preamble, base, tmp
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov r4, #0xf8000000
- add r4, r4, #0x00000500
- mov \base, r4
- ldr \irqstat, [\base, #0]
- cmp \irqstat, #0
- bne 1001f
- ldr \irqnr, =NR_IRQS+1
- b 1003f
-1001: mov \irqnr, #0
-1002: ands \tmp, \irqstat, #1
- mov \irqstat, \irqstat, LSR #1
- add \irqnr, \irqnr, #1
- beq 1002b
- sub \irqnr, \irqnr, #1
-1003:
- .endm
diff --git a/arch/arm/mach-aaec2000/include/mach/hardware.h b/arch/arm/mach-aaec2000/include/mach/hardware.h
deleted file mode 100644
index 965a6f6..0000000
--- a/arch/arm/mach-aaec2000/include/mach/hardware.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/hardware.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <asm/sizes.h>
-#include <mach/aaec2000.h>
-
-/* The kernel is loaded at physical address 0xf8000000.
- * We map the IO space a bit after
- */
-#define PIO_APB_BASE 0x80000000
-#define VIO_APB_BASE 0xf8000000
-#define IO_APB_LENGTH 0x2000
-#define PIO_AHB_BASE 0x80002000
-#define VIO_AHB_BASE 0xf8002000
-#define IO_AHB_LENGTH 0x2000
-
-#define VIO_BASE VIO_APB_BASE
-#define PIO_BASE PIO_APB_BASE
-
-#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE )
-#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE )
-
-#ifndef __ASSEMBLY__
-
-#include <asm/types.h>
-
-/* FIXME: Is it needed to optimize this a la pxa ?? */
-#define __REG(x) (*((volatile u32 *)io_p2v(x)))
-#define __PREG(x) (io_v2p((u32)&(x)))
-
-#else /* __ASSEMBLY__ */
-
-#define __REG(x) io_p2v(x)
-#define __PREG(x) io_v2p(x)
-
-#endif
-
-#include "aaec2000.h"
-
-#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/io.h b/arch/arm/mach-aaec2000/include/mach/io.h
deleted file mode 100644
index ab4fe5d..0000000
--- a/arch/arm/mach-aaec2000/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/io.h
- *
- * Copied from asm/arch/sa1100/io.h
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a) __typesafe_io(a)
-#define __mem_pci(a) (a)
-
-#endif
diff --git a/arch/arm/mach-aaec2000/include/mach/irqs.h b/arch/arm/mach-aaec2000/include/mach/irqs.h
deleted file mode 100644
index bf45c6d..0000000
--- a/arch/arm/mach-aaec2000/include/mach/irqs.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/irqs.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-
-#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
-#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
-#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
-#define INT_MV_FIQ 3 /* Media Changed Interrupt */
-#define INT_SC 4 /* Sound Codec Interrupt */
-#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
-#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
-#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
-#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
-#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
-#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
-#define INT_TICK 11 /* 64Hz Tick Interrupt */
-#define INT_UART1 12 /* UART1 Interrupt */
-#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
-#define INT_LCD 14 /* LCD Interrupt */
-#define INT_SSI 15 /* SSI End of Transfer Interrupt */
-#define INT_UART3 16 /* UART3 Interrupt */
-#define INT_SCI 17 /* SCI Interrupt */
-#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
-#define INT_MMC 19 /* MMC Interrupt */
-#define INT_USB 20 /* USB Interrupt */
-#define INT_DMA 21 /* DMA Interrupt */
-#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
-#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
-#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
-#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
-#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
-#define INT_BMI 27 /* BMI Interrupt */
-
-#define NR_IRQS (INT_BMI + 1)
-
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/memory.h b/arch/arm/mach-aaec2000/include/mach/memory.h
deleted file mode 100644
index 4f93c56..0000000
--- a/arch/arm/mach-aaec2000/include/mach/memory.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/memory.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-
-#define PHYS_OFFSET UL(0xf0000000)
-
-#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/system.h b/arch/arm/mach-aaec2000/include/mach/system.h
deleted file mode 100644
index fe08ca1..0000000
--- a/arch/arm/mach-aaec2000/include/mach/system.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-aaed2000/include/mach/system.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
- cpu_do_idle();
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
- cpu_reset(0);
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/timex.h b/arch/arm/mach-aaec2000/include/mach/timex.h
deleted file mode 100644
index 6c8edf4..0000000
--- a/arch/arm/mach-aaec2000/include/mach/timex.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/timex.h
- *
- * AAEC-2000 Architecture timex specification
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_TIMEX_H
-#define __ASM_ARCH_TIMEX_H
-
-#define CLOCK_TICK_RATE 508000
-
-#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/uncompress.h b/arch/arm/mach-aaec2000/include/mach/uncompress.h
deleted file mode 100644
index 381ecad..0000000
--- a/arch/arm/mach-aaec2000/include/mach/uncompress.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/uncompress.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-
-#include "hardware.h"
-
-#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
-
-static void putc(int c)
-{
- unsigned long serial_port;
- do {
- serial_port = _UART3_BASE;
- if (UART(UART_CR) & UART_CR_EN) break;
- serial_port = _UART1_BASE;
- if (UART(UART_CR) & UART_CR_EN) break;
- serial_port = _UART2_BASE;
- if (UART(UART_CR) & UART_CR_EN) break;
- return;
- } while (0);
-
- /* wait for space in the UART's transmitter */
- while ((UART(UART_SR) & UART_SR_TxFF))
- barrier();
-
- /* send the character out. */
- UART(UART_DR) = c;
-}
-
-static inline void flush(void)
-{
-}
-
-#define arch_decomp_setup()
-#define arch_decomp_wdog()
-
-#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/vmalloc.h b/arch/arm/mach-aaec2000/include/mach/vmalloc.h
deleted file mode 100644
index a6299e8..0000000
--- a/arch/arm/mach-aaec2000/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-aaec2000/include/mach/vmalloc.h
- *
- * Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END 0xd0000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
--
1.7.3.4
^ permalink raw reply related
* [PATCH 2/2] mach-mmp: PXA910 Drive Strength FAST using wrong value
From: Philip Rakity @ 2011-01-07 19:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <DE4BADCB-9705-427A-B80E-BB45B8678ACB@marvell.com>
Drive strength for PXA910 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers. (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).
Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register. 8 does not work.
Signed-off-by: Philip Rakity <prakity@marvell.com>
---
arch/arm/mach-mmp/include/mach/mfp-pxa910.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index 7e8a80f..fbd7ee8 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -6,7 +6,7 @@
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* UART2 */
#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
--
1.7.0.4
^ permalink raw reply related
* [PATCH 1/2] mach-mmp: MMP2 Drive Strength FAST using wrong value
From: Philip Rakity @ 2011-01-07 19:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201101071851.54872.arnd@arndb.de>
Drive strength for MMP2 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers. (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).
Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register. 8 does not work.
Signed-off-by: Philip Rakity <prakity@marvell.com>
Tested-by: John Watlington <wad@laptop.org>
---
arch/arm/mach-mmp/include/mach/mfp-mmp2.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 117e303..4ad3862 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -6,7 +6,7 @@
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* GPIO */
#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)
--
1.7.0.4
^ permalink raw reply related
* still nfs problems [Was: Linux 2.6.37-rc8]
From: Trond Myklebust @ 2011-01-07 19:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107190229.GX31708@n2100.arm.linux.org.uk>
On Fri, 2011-01-07 at 19:02 +0000, Russell King - ARM Linux wrote:
> On Fri, Jan 07, 2011 at 01:53:25PM -0500, Trond Myklebust wrote:
> > I'd still like to keep the existing code for those architectures that
> > don't have problems, since that allows us to send 32k READDIR requests
> > instead of being limited to 4k. For large directories, that is a clear
> > win.
> > For the NOMMU case we will just go back to using a single page for
> > storage (and 4k READDIR requests only). Should I just do the same for
> > architectures like ARM and PARISC?
>
> I think you said that readdir reads via the vmalloc mapping of the
> group of pages, but XDR writes to the individual pages.
>
> As I understand NFS, you receive a packet, you then have to use XDR
> to unpack the data, which you presumably write into the set of
> struct page *'s using kmap?
No. The socket or RDMA layers place the data directly into the struct
pages. We then unpack them in the XDR layer using the vmalloc mapping
and place the resulting processed readdir data into the page cache.
> Isn't a solution to have XDR write directly into the vmalloc mapping
> rather than using struct page * and kmap?
Unfortunately that isn't possible. :-(
--
Trond Myklebust
Linux NFS client maintainer
NetApp
Trond.Myklebust at netapp.com
www.netapp.com
^ permalink raw reply
* still nfs problems [Was: Linux 2.6.37-rc8]
From: James Bottomley @ 2011-01-07 19:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107190229.GX31708@n2100.arm.linux.org.uk>
On Fri, 2011-01-07 at 19:02 +0000, Russell King - ARM Linux wrote:
> On Fri, Jan 07, 2011 at 01:53:25PM -0500, Trond Myklebust wrote:
> > I'd still like to keep the existing code for those architectures that
> > don't have problems, since that allows us to send 32k READDIR requests
> > instead of being limited to 4k. For large directories, that is a clear
> > win.
> > For the NOMMU case we will just go back to using a single page for
> > storage (and 4k READDIR requests only). Should I just do the same for
> > architectures like ARM and PARISC?
>
> I think you said that readdir reads via the vmalloc mapping of the
> group of pages, but XDR writes to the individual pages.
Actually it's the other way around, but the point still stands.
> As I understand NFS, you receive a packet, you then have to use XDR
> to unpack the data, which you presumably write into the set of
> struct page *'s using kmap?
>
> Isn't a solution to have XDR write directly into the vmalloc mapping
> rather than using struct page * and kmap?
So, unfortuantely, I looked at doing this and we can't. the ->readdir()
call takes an array of pages, not a kernel virtual address of the pages,
so there's no way to tell it to use a different mapping from the usual
kernel one on them.
On the other hand, the xdr routines, since they take the pages anyway,
could use a scatterlist approach to writing through the kernel mapping
instead of using vmap ... we have all the machinery for this in
lib/scatterlist.c ... it's not designed for this case, since it's
designed to allow arbitrary linear reads and writes on a block
scatterlist, but the principle is the same ... it looks like it would be
rather a big patch, though ...
James
^ permalink raw reply
* still nfs problems [Was: Linux 2.6.37-rc8]
From: James Bottomley @ 2011-01-07 19:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294426405.2929.23.camel@heimdal.trondhjem.org>
On Fri, 2011-01-07 at 13:53 -0500, Trond Myklebust wrote:
> There is already code in the SUNRPC layer that calls flush_dcache_page()
> after writing (although as Russell pointed out earlier, that is
> apparently a no-op for non-page cache pages such as these).
Actually (and possibly fortunately) none of our flush_dcache_page()
implementations do this (check for an actual non page cache page and nop
if they find one). Although, they may according to the docs which say
that flush_dcache_page() is only called on page cache pages.
But it's definitely using the API outside its documented scope. We have
lots of places in the VFS where we don't call flush_dcache_page() even
after altering a kernel page (even in the page cache) if we know the
page will never be mapped to userspace. The assumption here is that the
kernel never sets up non-user aliases of these pages, so not doing the
flushing is an optimisation since we only access them through the kernel
address space. Of course, setting up vmap areas of these pages within
the kernel violates this assumption.
> > This is why you really really really generally don't want to have
> > aliasing. Purely virtual caches are pure crap. Really.
>
> Well, it looks as if NOMMU is giving us problems due to the lack of a
> vm_map_ram() (see https://bugzilla.kernel.org/show_bug.cgi?id=26262).
>
> I'd still like to keep the existing code for those architectures that
> don't have problems, since that allows us to send 32k READDIR requests
> instead of being limited to 4k. For large directories, that is a clear
> win.
> For the NOMMU case we will just go back to using a single page for
> storage (and 4k READDIR requests only). Should I just do the same for
> architectures like ARM and PARISC?
Well, that would include any VI architecture (like SPARC and others) as
well. However, I think we can just make the
invalidate_kernel_vmap_range() work.
James
^ permalink raw reply
* still nfs problems [Was: Linux 2.6.37-rc8]
From: Russell King - ARM Linux @ 2011-01-07 19:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294426405.2929.23.camel@heimdal.trondhjem.org>
On Fri, Jan 07, 2011 at 01:53:25PM -0500, Trond Myklebust wrote:
> I'd still like to keep the existing code for those architectures that
> don't have problems, since that allows us to send 32k READDIR requests
> instead of being limited to 4k. For large directories, that is a clear
> win.
> For the NOMMU case we will just go back to using a single page for
> storage (and 4k READDIR requests only). Should I just do the same for
> architectures like ARM and PARISC?
I think you said that readdir reads via the vmalloc mapping of the
group of pages, but XDR writes to the individual pages.
As I understand NFS, you receive a packet, you then have to use XDR
to unpack the data, which you presumably write into the set of
struct page *'s using kmap?
Isn't a solution to have XDR write directly into the vmalloc mapping
rather than using struct page * and kmap?
^ permalink raw reply
* still nfs problems [Was: Linux 2.6.37-rc8]
From: Trond Myklebust @ 2011-01-07 18:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTimusF4KCJ4vHPn+T1dUiKxapXaT0QTtFvh8Ykdd@mail.gmail.com>
On Thu, 2011-01-06 at 09:55 -0800, Linus Torvalds wrote:
> On Thu, Jan 6, 2011 at 9:47 AM, Trond Myklebust
> <Trond.Myklebust@netapp.com> wrote:
> >
> > Why is this line needed? We're not writing through the virtual mapping.
>
> I haven't looked at the sequence of accesses, but you need to be
> _very_ aware that "write-through" is absolutely NOT sufficient for
> cache coherency.
>
> In cache coherency, you have three options:
>
> - true coherency (eg physically indexed/tagged caches)
>
> - exclusion (eg virtual caches, but with an exclusion guarantee that
> guarantees that aliases cannot happen: either by using physical
> tagging or by not allowing cases that could cause virtual aliases)
>
> - write-through AND non-cached reads (ie "no caching at all").
>
> You seem to be forgetting the "no cached reads" part. It's not
> sufficient to flush after a write - you need to make sure that you
> also don't have a cached copy of the alias for the read.
>
> So "We're not writing through the virtual mapping" is NOT a sufficient
> excuse. If you're reading through the virtual mapping, you need to
> make sure that the virtual mapping is flushed _after_ any writes
> through any other mapping and _before_ any reads through the virtual
> one.
I'm aware of that. That part should be taken care of by the call to
invalidate_kernel_vmap_range() which was in both James and my patch.
There is already code in the SUNRPC layer that calls flush_dcache_page()
after writing (although as Russell pointed out earlier, that is
apparently a no-op for non-page cache pages such as these).
> This is why you really really really generally don't want to have
> aliasing. Purely virtual caches are pure crap. Really.
Well, it looks as if NOMMU is giving us problems due to the lack of a
vm_map_ram() (see https://bugzilla.kernel.org/show_bug.cgi?id=26262).
I'd still like to keep the existing code for those architectures that
don't have problems, since that allows us to send 32k READDIR requests
instead of being limited to 4k. For large directories, that is a clear
win.
For the NOMMU case we will just go back to using a single page for
storage (and 4k READDIR requests only). Should I just do the same for
architectures like ARM and PARISC?
--
Trond Myklebust
Linux NFS client maintainer
NetApp
Trond.Myklebust at netapp.com
www.netapp.com
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: Jamie Iles @ 2011-01-07 18:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107180924.GV31708@n2100.arm.linux.org.uk>
On Fri, Jan 07, 2011 at 06:09:24PM +0000, Russell King - ARM Linux wrote:
> Probably, though I don't think aaec2000 is maintained anymore (I think it
> was a dump-and-run thing) so should probably be deleted from the kernel
> tree.
>
> netx - since December 2008, it's only received updates when other stuff
> has changed (eg, on my clocksource sweep, or when I've noticed it no
> longer building.) So I think that's also a candidate for deletion
> unless someone speaks up.
>
> Wonder if anyone wants to volunteer to delete them... ;)
I'm happy to do that for aaec2000, patch to follow. I'm willing to do
the same for netx too or would you like to give people chance to shout
first?
Jamie
^ permalink raw reply
* [PATCH V2] ST SPEAr: PCIE gadget suppport
From: Greg KH @ 2011-01-07 18:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D26D55D.4010600@st.com>
On Fri, Jan 07, 2011 at 02:27:01PM +0530, pratyush wrote:
> On 1/7/2011 12:18 AM, Greg KH wrote:
> > On Thu, Jan 06, 2011 at 05:29:10PM +0530, Viresh Kumar wrote:
> >> From: Pratyush Anand <pratyush.anand@st.com>
> >>
> >> This is a configurable gadget. can be configured by sysfs interface. Any
> >> IP available at PCIE bus can be programmed to be used by host
> >> controller.It supoorts both INTX and MSI.
> >> By default, gadget is configured for INTX and SYSRAM1 is mapped to BAR0
> >> with size 0x1000
> >>
> >> Changes since V1:
> >> - __iomem added for register addresses
> >> - kerneldoc comment removed whereever not required.
> >> - help node moved from sysfs to documentation/misc-devices
> >> - strict_strtoul used instead of sscanf
> >>
> >> Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
> >> Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
> >> ---
> >> Documentation/misc-devices/spear-pcie-gadget.txt | 125 ++++
> >
> > New sysfs entries require updates to the Documentation/ABI/ directory
> > for them.
> >
> > Please rework the patch to include these entries.
> >
>
> Ok..will send [Patch V3] with these modifications.
> But, are these rework needed if I move this interface to configfs
> as you have suggested below.
> Or is there some different directory where documentation for configfs
> node can be mentioned?
Nope, same directory, you are still creating a user/kernel ABI by using
configfs right? It needs to be documented just as well.
thanks,
greg k-h
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: Russell King - ARM Linux @ 2011-01-07 18:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107175613.GH2844@pulham.picochip.com>
On Fri, Jan 07, 2011 at 05:56:13PM +0000, Jamie Iles wrote:
> On Fri, Jan 07, 2011 at 04:52:50PM +0000, Russell King - ARM Linux wrote:
> > On Fri, Jan 07, 2011 at 10:13:50PM +0530, viresh kumar wrote:
> > > > +
> > > > + ? ? ? dw_wdt.clk = clk_get(&pdev->dev, NULL);
> > > > + ? ? ? if (IS_ERR_OR_NULL(dw_wdt.clk))
> > > > + ? ? ? ? ? ? ? return -ENODEV;
> > >
> > > should release mem_region and free ioremaped space.
> > > Also, may be we can continue here in case of error too.
> > > Some platforms might nor support clock framework. You can enable and
> > > disable clk's
> > > if dw_wdt.clk is !NULL
> >
> > And some platforms have been known to return NULL for clk_get() as they
> > don't support more than one clock.
> >
> > arch/arm/mach-aaec2000/core.c:struct clk *clk_get(struct device *dev, const char *id)
> > arch/arm/mach-aaec2000/core.c-{
> > arch/arm/mach-aaec2000/core.c- return dev && strcmp(dev_name(dev), "mb:16") ==
> > 0 ? NULL : ERR_PTR(-ENOENT);
> > --
> > arch/arm/mach-at91/at91x40.c:struct clk *clk_get(struct device *dev, const char
> > *id)
> > arch/arm/mach-at91/at91x40.c-{
> > arch/arm/mach-at91/at91x40.c- return NULL;
> > --
> > arch/arm/mach-netx/fb.c:struct clk *clk_get(struct device *dev, const char *id)
> > arch/arm/mach-netx/fb.c-{
> > arch/arm/mach-netx/fb.c- return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT);
> >
> > Please stick to the conventions of the API in the driver. IS_ERR() values
> > mean we failed. Anything else must be considered success. Don't assume
> > NULL means we failed.
>
> Ok, so I'll change the driver to get the clock rate of the watchdog
> through platform data for those that don't provide a struct clk and
> clk_get_rate() returns 0.
>
> Looking at mach-aaec2000 and mach-netx they don't provide a
> clk_get_rate() which from linux/clk.h doesn't look like it's optional.
> Should these platforms have some kind of stub clk_get_rate()?
Probably, though I don't think aaec2000 is maintained anymore (I think it
was a dump-and-run thing) so should probably be deleted from the kernel
tree.
netx - since December 2008, it's only received updates when other stuff
has changed (eg, on my clocksource sweep, or when I've noticed it no
longer building.) So I think that's also a candidate for deletion
unless someone speaks up.
Wonder if anyone wants to volunteer to delete them... ;)
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: Jamie Iles @ 2011-01-07 17:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107165250.GU31708@n2100.arm.linux.org.uk>
On Fri, Jan 07, 2011 at 04:52:50PM +0000, Russell King - ARM Linux wrote:
> On Fri, Jan 07, 2011 at 10:13:50PM +0530, viresh kumar wrote:
> > > +
> > > + ? ? ? dw_wdt.clk = clk_get(&pdev->dev, NULL);
> > > + ? ? ? if (IS_ERR_OR_NULL(dw_wdt.clk))
> > > + ? ? ? ? ? ? ? return -ENODEV;
> >
> > should release mem_region and free ioremaped space.
> > Also, may be we can continue here in case of error too.
> > Some platforms might nor support clock framework. You can enable and
> > disable clk's
> > if dw_wdt.clk is !NULL
>
> And some platforms have been known to return NULL for clk_get() as they
> don't support more than one clock.
>
> arch/arm/mach-aaec2000/core.c:struct clk *clk_get(struct device *dev, const char *id)
> arch/arm/mach-aaec2000/core.c-{
> arch/arm/mach-aaec2000/core.c- return dev && strcmp(dev_name(dev), "mb:16") ==
> 0 ? NULL : ERR_PTR(-ENOENT);
> --
> arch/arm/mach-at91/at91x40.c:struct clk *clk_get(struct device *dev, const char
> *id)
> arch/arm/mach-at91/at91x40.c-{
> arch/arm/mach-at91/at91x40.c- return NULL;
> --
> arch/arm/mach-netx/fb.c:struct clk *clk_get(struct device *dev, const char *id)
> arch/arm/mach-netx/fb.c-{
> arch/arm/mach-netx/fb.c- return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT);
>
> Please stick to the conventions of the API in the driver. IS_ERR() values
> mean we failed. Anything else must be considered success. Don't assume
> NULL means we failed.
Ok, so I'll change the driver to get the clock rate of the watchdog
through platform data for those that don't provide a struct clk and
clk_get_rate() returns 0.
Looking at mach-aaec2000 and mach-netx they don't provide a
clk_get_rate() which from linux/clk.h doesn't look like it's optional.
Should these platforms have some kind of stub clk_get_rate()?
Jamie
^ permalink raw reply
* [PATCH 15/23] Alternative mmc structure to support pxa168, pxa910, mmp2 family SD
From: Arnd Bergmann @ 2011-01-07 17:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ABCC071A-5598-48AA-9545-2712FA0BB624@marvell.com>
On Friday 07 January 2011, Philip Rakity wrote:
> Thanks for the suggestion. Let me see if I can implement this.
>
> A couple of points first
>
> a) current implementation once PXA168/910 is selected will no longer show MMP2 boards so it is also broken. Play around and you will see the issues
I didn't see it on the version I'm looking at now, but if it's inconsistent or
allows you to select combinationst that cannot be built, then it should be fixed.
> My proposed patch did the following
> a) ARCH_MMP is set when PXA168, PXA910 or MMP2 are selected (from arch/arm)
> b) Board selection uses the PXA168/PXA910/MMP2 to show correct board.
Yes, that is what I thought, but it is inconsistent with how other platforms do this.
Usually, the top-level selection chooses one source directory, and anything specific
to that platform is handled by that Kconfig.
> If I understand what you are suggesting is the following
> a) leave ARCH_MMP is system selection alone --
> b) move speciific CPU selection to where board selection is now (cpu/arch/mach-mmp)
Right.
> c) what do with development boards ? select all of them for the CPU Type ?
>
> Point me to a Kconfig that does what you are suggesting as an example and I can try out the suggestion.
Just put it below the CPU selection.
OMAP does something like this -- you first select either OMAP1 or OMAP2/3/4, then
the families in the latter case, and finally the boards.
You can do the same by first giving the choice between ARMv6 and PXA168/910, and
then showing the boards below the CPU. There are multiple ways of doing this
that lead to the same result.
Arnd
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: viresh kumar @ 2011-01-07 17:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107170808.GG2844@pulham.picochip.com>
On Fri, Jan 7, 2011 at 10:38 PM, Jamie Iles <jamie@jamieiles.com> wrote:
>> > +static int dw_wdt_open(struct inode *inode, struct file *filp)
>> > +{
>> > + ? ? ? /* Make sure we don't get unloaded. */
>> > + ? ? ? __module_get(THIS_MODULE);
>> > +
>> > + ? ? ? spin_lock(&dw_wdt.lock);
>> > + ? ? ? if (!dw_wdt_is_enabled()) {
>> > + ? ? ? ? ? ? ? /*
>> > + ? ? ? ? ? ? ? ?* The watchdog is not currently enabled. Set the timeout to
>> > + ? ? ? ? ? ? ? ?* the maximum and then start it.
>> > + ? ? ? ? ? ? ? ?*/
>> > + ? ? ? ? ? ? ? dw_wdt_set_top(DW_WDT_MAX_TOP);
>>
>> shouldn't we check return value here??
>
> No, dw_wdt_set_top() can't fail, it just returns the timeout period that
> it set in seconds. ?We use this when the user changes the timeout period
> as we may not be able to select the exact timeout period they chose, but
> here we just select the maximum timeout.
Sorry, I missed that.
>> > +static int __devinit dw_wdt_drv_probe(struct platform_device *pdev)
>> > +{
>> > + ? ? ? int ret;
>> > + ? ? ? struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> > +
>> > + ? ? ? if (!mem)
>> > + ? ? ? ? ? ? ? return -EINVAL;
>> > +
>> > + ? ? ? if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem),
>> > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"iomem"))
>> > + ? ? ? ? ? ? ? return -ENOMEM;
>> > +
>> > + ? ? ? dw_wdt.regs = devm_ioremap(&pdev->dev, mem->start,
>> > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?resource_size(mem));
>> > + ? ? ? if (!dw_wdt.regs)
>> > + ? ? ? ? ? ? ? return -ENOMEM;
>>
>> should release mem_region in case of error.
>>
>> > +
>> > + ? ? ? dw_wdt.clk = clk_get(&pdev->dev, NULL);
>> > + ? ? ? if (IS_ERR_OR_NULL(dw_wdt.clk))
>> > + ? ? ? ? ? ? ? return -ENODEV;
>>
>> should release mem_region and free ioremaped space.
>
> We're using devres for the ioremap and region request so that takes care
> of the cleanup for us. ?This also means we don't need to iounmap and
> release in the release method.
ok
>
>> Also, may be we can continue here in case of error too.
>> Some platforms might nor support clock framework. You can enable and
>> disable clk's if dw_wdt.clk is !NULL
>
> The DesignWare watchdog has 16 timeout periods and these are derived
> from the clock frequency input to the WDT. ?If we don't have a clk then
> we don't know how long the timeout periods. ?The only alternative would
> be to have a 'struct dw_wdt_platform_data' that includes the input clock
> frequency which we use if we can't get a clk and get the rate.
That will be fine.
--
viresh
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: Jamie Iles @ 2011-01-07 17:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTi=s4Wuj1YyALL7f1AK-MQjvPre8mvviLhw5TdPH@mail.gmail.com>
Hi Viresh,
Thanks for the feedback, comments inline.
Jamie
On Fri, Jan 07, 2011 at 10:13:50PM +0530, viresh kumar wrote:
> On Fri, Jan 7, 2011 at 5:33 PM, Jamie Iles <jamie@jamieiles.com> wrote:
>
> (...)
>
> > diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> > new file mode 100644
> > index 0000000..e0d0e377
> > --- /dev/null
> > +++ b/drivers/watchdog/dw_wdt.c
> > @@ -0,0 +1,300 @@
>
> (...)
>
> > +static inline int dw_wdt_is_enabled(void)
> > +{
> > +#define WDOG_CONTROL_REG_WDT_EN_MASK ? ? ? ? ? 0x01
>
> can be moved to top, with other macros.
>
> > + ? ? ? return readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET) &
> > + ? ? ? ? ? ? ? WDOG_CONTROL_REG_WDT_EN_MASK;
> > +}
> > +
>
> (...)
>
> > +static void dw_wdt_keepalive(void)
> > +{
> > +#define WDOG_COUNTER_RESTART_KICK_VALUE ? ? ? ? ? ?0x76
>
> ditto...
Ok, agreed.
> > + ? ? ? writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs +
> > + ? ? ? ? ? ? ?WDOG_COUNTER_RESTART_REG_OFFSET);
> > +}
> > +
> > +static int dw_wdt_open(struct inode *inode, struct file *filp)
> > +{
> > + ? ? ? /* Make sure we don't get unloaded. */
> > + ? ? ? __module_get(THIS_MODULE);
> > +
> > + ? ? ? spin_lock(&dw_wdt.lock);
> > + ? ? ? if (!dw_wdt_is_enabled()) {
> > + ? ? ? ? ? ? ? /*
> > + ? ? ? ? ? ? ? ?* The watchdog is not currently enabled. Set the timeout to
> > + ? ? ? ? ? ? ? ?* the maximum and then start it.
> > + ? ? ? ? ? ? ? ?*/
> > + ? ? ? ? ? ? ? dw_wdt_set_top(DW_WDT_MAX_TOP);
>
> shouldn't we check return value here??
No, dw_wdt_set_top() can't fail, it just returns the timeout period that
it set in seconds. We use this when the user changes the timeout period
as we may not be able to select the exact timeout period they chose, but
here we just select the maximum timeout.
> > + ? ? ? ? ? ? ? writel(WDOG_CONTROL_REG_WDT_EN_MASK,
> > + ? ? ? ? ? ? ? ? ? ? ?dw_wdt.regs + WDOG_CONTROL_REG_OFFSET);
> > + ? ? ? }
> > + ? ? ? spin_unlock(&dw_wdt.lock);
> > +
> > + ? ? ? return nonseekable_open(inode, filp);
> > +}
> > +
>
> (...)
>
> > +static const struct dev_pm_ops dw_wdt_pm_ops = {
> > + ? ? ? .suspend ? ? ? ?= dw_wdt_suspend,
> > + ? ? ? .resume ? ? ? ? = dw_wdt_resume,
> > +};
> > +
> > +#define DW_WDT_PM_OPS ?(&dw_wdt_pm_ops)
> > +#else /* CONFIG_PM */
> > +#define DW_WDT_PM_OPS ?NULL
> > +#endif /* CONFIG_PM */
>
> This can be rewritten as:
> static struct platform_driver dw_wdt_driver = {
> ...
> +#ifdef CONFIG_PM
> ? ? ? ? ? ? ? .pm ? ? = dw_wdt_pm_ops,
> #endif
> }
Ok, that's clearer.
> > +static int __devinit dw_wdt_drv_probe(struct platform_device *pdev)
> > +{
> > + ? ? ? int ret;
> > + ? ? ? struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +
> > + ? ? ? if (!mem)
> > + ? ? ? ? ? ? ? return -EINVAL;
> > +
> > + ? ? ? if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem),
> > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"iomem"))
> > + ? ? ? ? ? ? ? return -ENOMEM;
> > +
> > + ? ? ? dw_wdt.regs = devm_ioremap(&pdev->dev, mem->start,
> > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?resource_size(mem));
> > + ? ? ? if (!dw_wdt.regs)
> > + ? ? ? ? ? ? ? return -ENOMEM;
>
> should release mem_region in case of error.
>
> > +
> > + ? ? ? dw_wdt.clk = clk_get(&pdev->dev, NULL);
> > + ? ? ? if (IS_ERR_OR_NULL(dw_wdt.clk))
> > + ? ? ? ? ? ? ? return -ENODEV;
>
> should release mem_region and free ioremaped space.
We're using devres for the ioremap and region request so that takes care
of the cleanup for us. This also means we don't need to iounmap and
release in the release method.
> Also, may be we can continue here in case of error too.
> Some platforms might nor support clock framework. You can enable and
> disable clk's if dw_wdt.clk is !NULL
The DesignWare watchdog has 16 timeout periods and these are derived
from the clock frequency input to the WDT. If we don't have a clk then
we don't know how long the timeout periods. The only alternative would
be to have a 'struct dw_wdt_platform_data' that includes the input clock
frequency which we use if we can't get a clk and get the rate.
> > + ? ? ? clk_enable(dw_wdt.clk);
> > +
> > + ? ? ? ret = misc_register(&dw_wdt_miscdev);
> > + ? ? ? if (ret)
> > + ? ? ? ? ? ? ? goto register_failed;
> > +
> > + ? ? ? return 0;
> > +
> > +register_failed:
> > + ? ? ? clk_disable(dw_wdt.clk);
> > + ? ? ? clk_put(dw_wdt.clk);
>
> also iounmap and release_mem_region...
>
> > +
> > + ? ? ? return ret;
> > +}
> > +
> > +static int __devexit dw_wdt_drv_remove(struct platform_device *pdev)
> > +{
> > + ? ? ? clk_disable(dw_wdt.clk);
> > + ? ? ? clk_put(dw_wdt.clk);
> > +
> > + ? ? ? misc_deregister(&dw_wdt_miscdev);
>
> also iounmap and release_mem_region...
>
> > +
> > + ? ? ? return 0;
> > +}
> > +
> > +static struct platform_driver dw_wdt_driver = {
> > + ? ? ? .probe ? ? ? ? ?= dw_wdt_drv_probe,
> > + ? ? ? .remove ? ? ? ? = __devexit_p(dw_wdt_drv_remove),
> > + ? ? ? .driver ? ? ? ? = {
> > + ? ? ? ? ? ? ? .name ? = "dw_wdt",
> > + ? ? ? ? ? ? ? .owner ?= THIS_MODULE,
> > + ? ? ? ? ? ? ? .pm ? ? = DW_WDT_PM_OPS,
> > + ? ? ? },
> > +};
> > +
> > +static int __init dw_wdt_watchdog_init(void)
> > +{
> > + ? ? ? spin_lock_init(&dw_wdt.lock);
>
> This can be moved to probe. spin_lock_init should be only called when we have
> some device for this driver.
Agreed.
> > +
> > + ? ? ? return platform_driver_register(&dw_wdt_driver);
> > +}
> > +
> > +static void __exit dw_wdt_watchdog_exit(void)
> > +{
> > + ? ? ? platform_driver_unregister(&dw_wdt_driver);
> > +}
> > +
> > +module_init(dw_wdt_watchdog_init);
> > +module_exit(dw_wdt_watchdog_exit);
>
> should be moved after init & exit routines without any blank lines.
Ok, thanks.
^ permalink raw reply
* [PATCH 3/3] ARM: S5PV210: Change framebuffer window 0 size on GONI
From: Sylwester Nawrocki @ 2011-01-07 16:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294419468-13700-1-git-send-email-s.nawrocki@samsung.com>
Increase virtual size of the frambuffer window 0
for the display panning support.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/mach-goni.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 2051cee..ed06f20 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -108,6 +108,8 @@ static struct s3c_fb_pd_win goni_fb_win0 = {
},
.max_bpp = 32,
.default_bpp = 16,
+ .virtual_x = 480,
+ .virtual_y = 2 * 800,
};
static struct s3c_fb_platdata goni_lcd_pdata __initdata = {
--
1.7.3.5
^ permalink raw reply related
* [PATCH 2/3] ARM: S5PV210: Add supplies for CIF camera on GONI board
From: Sylwester Nawrocki @ 2011-01-07 16:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294419468-13700-1-git-send-email-s.nawrocki@samsung.com>
Add regulator supplies required for NOON010PC30 CIF sensor.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/mach-goni.c | 24 +++++++++++++++++++++---
1 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index fc34575..2051cee 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -273,6 +273,18 @@ static struct regulator_consumer_supply goni_ldo5_consumers[] = {
REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
};
+static struct regulator_consumer_supply goni_ldo11_consumers[] = {
+ REGULATOR_SUPPLY("vddio", "0-0030"), /* "CAM_IO_2.8V" */
+};
+
+static struct regulator_consumer_supply goni_ldo13_consumers[] = {
+ REGULATOR_SUPPLY("vdda", "0-0030"), /* "CAM_A_2.8V" */
+};
+
+static struct regulator_consumer_supply goni_ldo14_consumers[] = {
+ REGULATOR_SUPPLY("vdd_core", "0-0030"), /* "CAM_CIF_1.8V" */
+};
+
static struct regulator_init_data goni_ldo2_data = {
.constraints = {
.name = "VALIVE_1.1V",
@@ -371,8 +383,10 @@ static struct regulator_init_data goni_ldo11_data = {
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = 1,
- .always_on = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
+ .num_consumer_supplies = ARRAY_SIZE(goni_ldo11_consumers),
+ .consumer_supplies = goni_ldo11_consumers,
};
static struct regulator_init_data goni_ldo12_data = {
@@ -391,8 +405,10 @@ static struct regulator_init_data goni_ldo13_data = {
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = 1,
- .always_on = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
+ .num_consumer_supplies = ARRAY_SIZE(goni_ldo13_consumers),
+ .consumer_supplies = goni_ldo13_consumers,
};
static struct regulator_init_data goni_ldo14_data = {
@@ -401,8 +417,10 @@ static struct regulator_init_data goni_ldo14_data = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = 1,
- .always_on = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
+ .num_consumer_supplies = ARRAY_SIZE(goni_ldo14_consumers),
+ .consumer_supplies = goni_ldo14_consumers,
};
static struct regulator_init_data goni_ldo15_data = {
--
1.7.3.5
^ permalink raw reply related
* [PATCH 1/3] ARM: S5PV210: Enable I2C0 bus on GONI board
From: Sylwester Nawrocki @ 2011-01-07 16:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294419468-13700-1-git-send-email-s.nawrocki@samsung.com>
Add I2C0 bus platform device for camera sensors.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/Kconfig | 1 +
arch/arm/mach-s5pv210/mach-goni.c | 4 ++++
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 53aabef..b0aa462 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -75,6 +75,7 @@ config MACH_GONI
bool "GONI"
select CPU_S5PV210
select S5P_GPIO_INT
+ select S3C_DEV_I2C0
select S3C_DEV_FB
select S5P_DEV_FIMC0
select S5P_DEV_FIMC1
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index e22d511..fc34575 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -800,6 +800,7 @@ static struct platform_device *goni_devices[] __initdata = {
&s5pv210_device_iis0,
&s3c_device_usb_hsotg,
&samsung_device_keypad,
+ &s3c_device_i2c0,
&s3c_device_i2c1,
&s3c_device_i2c2,
&wm8994_fixed_voltage0,
@@ -827,6 +828,9 @@ static void __init goni_machine_init(void)
/* Radio: call before I2C 1 registeration */
goni_radio_init();
+ /* I2C0 */
+ s3c_i2c0_set_platdata(NULL);
+
/* I2C1 */
s3c_i2c1_set_platdata(NULL);
i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
--
1.7.3.5
^ permalink raw reply related
* [PATCH] ARM: S5PV210: Add GONI board setup for CIF camera support
From: Sylwester Nawrocki @ 2011-01-07 16:57 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
the following patch series introduces changes in GONI board setup file
required for the CIF camera sensor driver.
The first patch adds the I2C0 bus driver, the second one adds the regulator
supply definitions and the third one just increases virtual size
of the framebuffer window 0 for preview double buffering.
The patch series contains:
[PATCH 1/3] ARM: S5PV210: Enable I2C0 bus on GONI board
[PATCH 2/3] ARM: S5PV210: Add supplies for CIF camera on GONI board
[PATCH 3/3] ARM: S5PV210: Change framebuffer window 0 size on GONI
Created against kgene-for-next branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
Regards,
Sylwester
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply
* [patch 1/1] mx51: add support for pwm
From: Fabio Estevam @ 2011-01-07 16:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110107095839.GD25121@pengutronix.de>
Arnaud,
2011/1/7 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
...
>> Why not follow the arch/arm/plat-mxc/devices/platform-imx-xxx to add
>> devices support?
> good question. ?Note that arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> already exists in Sascha's tree. ?(Maybe now even Linus'.)
I have submitted the following patch for dynamically registering the
PWM on MX51:
http://www.spinics.net/lists/arm-kernel/msg105828.html
I got an ack from Uwe, so it should hit Sascha?s tree soon.
Regards,
Fabio Estevam
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: Russell King - ARM Linux @ 2011-01-07 16:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTi=s4Wuj1YyALL7f1AK-MQjvPre8mvviLhw5TdPH@mail.gmail.com>
On Fri, Jan 07, 2011 at 10:13:50PM +0530, viresh kumar wrote:
> > +
> > + ? ? ? dw_wdt.clk = clk_get(&pdev->dev, NULL);
> > + ? ? ? if (IS_ERR_OR_NULL(dw_wdt.clk))
> > + ? ? ? ? ? ? ? return -ENODEV;
>
> should release mem_region and free ioremaped space.
> Also, may be we can continue here in case of error too.
> Some platforms might nor support clock framework. You can enable and
> disable clk's
> if dw_wdt.clk is !NULL
And some platforms have been known to return NULL for clk_get() as they
don't support more than one clock.
arch/arm/mach-aaec2000/core.c:struct clk *clk_get(struct device *dev, const char *id)
arch/arm/mach-aaec2000/core.c-{
arch/arm/mach-aaec2000/core.c- return dev && strcmp(dev_name(dev), "mb:16") ==
0 ? NULL : ERR_PTR(-ENOENT);
--
arch/arm/mach-at91/at91x40.c:struct clk *clk_get(struct device *dev, const char
*id)
arch/arm/mach-at91/at91x40.c-{
arch/arm/mach-at91/at91x40.c- return NULL;
--
arch/arm/mach-netx/fb.c:struct clk *clk_get(struct device *dev, const char *id)
arch/arm/mach-netx/fb.c-{
arch/arm/mach-netx/fb.c- return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT);
Please stick to the conventions of the API in the driver. IS_ERR() values
mean we failed. Anything else must be considered success. Don't assume
NULL means we failed.
^ permalink raw reply
* [PATCH 15/23] Alternative mmc structure to support pxa168, pxa910, mmp2 family SD
From: Philip Rakity @ 2011-01-07 16:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201101062029.45604.arnd@arndb.de>
On Jan 6, 2011, at 11:29 AM, Arnd Bergmann wrote:
> On Friday 31 December 2010, Philip Rakity wrote:
>> The patch selects ARCH-MMP (as now) but adds the ability
>> to also know which specific SoC was chosen. (This is sort of done by choosing the development board today).
>
> On a larger scale, we try to go in the opposite direction: make it possible to
> have kernels run on as many boards as possible by decreasing the code differences
> between SoCs and even SoC families.
>
>>> Your patches will make them mess.
>>
>> suggest a solution.
>>
>> The current mechanism of having the development board select the CPU does not seem right.
>> One can select a development board for MMP2 and PXA168 and yet the arch files to support each CPU
>> are different and not compatible. (for example cache handling).
>
> The optimal solution would be to make sure that working support for both CPUs can be built into
> a single kernel. There is a lot of infrastructure in arch/arm/mm/* that tries to do this, but
> I don't know of that actually works for the combination of CPU_MOHAWK and CPU_V6. It does
> work for some other combinations of CPU cores though, so it's certainly possible.
> For instance, arch/arm/include/asm/cacheflush.h has abstractions to select the cache handling
> at boot time.
>
> To go even further, it might make sense to combine the PXA and MMP platforms, since they already
> share some code through the plat-pxa directory.
>
> Getting it running for MMP with mohawk and v6 cores could be a significant amount of work if
> nobody has tries this in that platform, so for now, I would recommend you just keep ARCH_MMP as
> a global option in arch/arm/Kconfig for now and add another 'choice' statement in
> arch/arm/mach-mmp/Kconfig to select the CPU core, with the board selection depending on that.
>
Thanks for the suggestion. Let me see if I can implement this.
A couple of points first
a) current implementation once PXA168/910 is selected will no longer show MMP2 boards so it is also broken. Play around and you will see the issues
My proposed patch did the following
a) ARCH_MMP is set when PXA168, PXA910 or MMP2 are selected (from arch/arm)
b) Board selection uses the PXA168/PXA910/MMP2 to show correct board.
If I understand what you are suggesting is the following
a) leave ARCH_MMP is system selection alone --
b) move speciific CPU selection to where board selection is now (cpu/arch/mach-mmp)
c) what do with development boards ? select all of them for the CPU Type ?
Point me to a Kconfig that does what you are suggesting as an example and I can try out the suggestion.
> Arnd
>
^ permalink raw reply
* [PATCHv3] watchdog: add support for the Synopsys DesignWare WDT
From: viresh kumar @ 2011-01-07 16:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294401797-24158-1-git-send-email-jamie@jamieiles.com>
On Fri, Jan 7, 2011 at 5:33 PM, Jamie Iles <jamie@jamieiles.com> wrote:
(...)
> diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> new file mode 100644
> index 0000000..e0d0e377
> --- /dev/null
> +++ b/drivers/watchdog/dw_wdt.c
> @@ -0,0 +1,300 @@
(...)
> +static inline int dw_wdt_is_enabled(void)
> +{
> +#define WDOG_CONTROL_REG_WDT_EN_MASK ? ? ? ? ? 0x01
can be moved to top, with other macros.
> + ? ? ? return readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET) &
> + ? ? ? ? ? ? ? WDOG_CONTROL_REG_WDT_EN_MASK;
> +}
> +
(...)
> +static void dw_wdt_keepalive(void)
> +{
> +#define WDOG_COUNTER_RESTART_KICK_VALUE ? ? ? ? ? ?0x76
ditto...
> + ? ? ? writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs +
> + ? ? ? ? ? ? ?WDOG_COUNTER_RESTART_REG_OFFSET);
> +}
> +
> +static int dw_wdt_open(struct inode *inode, struct file *filp)
> +{
> + ? ? ? /* Make sure we don't get unloaded. */
> + ? ? ? __module_get(THIS_MODULE);
> +
> + ? ? ? spin_lock(&dw_wdt.lock);
> + ? ? ? if (!dw_wdt_is_enabled()) {
> + ? ? ? ? ? ? ? /*
> + ? ? ? ? ? ? ? ?* The watchdog is not currently enabled. Set the timeout to
> + ? ? ? ? ? ? ? ?* the maximum and then start it.
> + ? ? ? ? ? ? ? ?*/
> + ? ? ? ? ? ? ? dw_wdt_set_top(DW_WDT_MAX_TOP);
shouldn't we check return value here??
> + ? ? ? ? ? ? ? writel(WDOG_CONTROL_REG_WDT_EN_MASK,
> + ? ? ? ? ? ? ? ? ? ? ?dw_wdt.regs + WDOG_CONTROL_REG_OFFSET);
> + ? ? ? }
> + ? ? ? spin_unlock(&dw_wdt.lock);
> +
> + ? ? ? return nonseekable_open(inode, filp);
> +}
> +
(...)
> +static const struct dev_pm_ops dw_wdt_pm_ops = {
> + ? ? ? .suspend ? ? ? ?= dw_wdt_suspend,
> + ? ? ? .resume ? ? ? ? = dw_wdt_resume,
> +};
> +
> +#define DW_WDT_PM_OPS ?(&dw_wdt_pm_ops)
> +#else /* CONFIG_PM */
> +#define DW_WDT_PM_OPS ?NULL
> +#endif /* CONFIG_PM */
This can be rewritten as:
static struct platform_driver dw_wdt_driver = {
...
+#ifdef CONFIG_PM
? ? ? ? ? ? ? .pm ? ? = dw_wdt_pm_ops,
#endif
}
> +static int __devinit dw_wdt_drv_probe(struct platform_device *pdev)
> +{
> + ? ? ? int ret;
> + ? ? ? struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +
> + ? ? ? if (!mem)
> + ? ? ? ? ? ? ? return -EINVAL;
> +
> + ? ? ? if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"iomem"))
> + ? ? ? ? ? ? ? return -ENOMEM;
> +
> + ? ? ? dw_wdt.regs = devm_ioremap(&pdev->dev, mem->start,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?resource_size(mem));
> + ? ? ? if (!dw_wdt.regs)
> + ? ? ? ? ? ? ? return -ENOMEM;
should release mem_region in case of error.
> +
> + ? ? ? dw_wdt.clk = clk_get(&pdev->dev, NULL);
> + ? ? ? if (IS_ERR_OR_NULL(dw_wdt.clk))
> + ? ? ? ? ? ? ? return -ENODEV;
should release mem_region and free ioremaped space.
Also, may be we can continue here in case of error too.
Some platforms might nor support clock framework. You can enable and
disable clk's
if dw_wdt.clk is !NULL
> + ? ? ? clk_enable(dw_wdt.clk);
> +
> + ? ? ? ret = misc_register(&dw_wdt_miscdev);
> + ? ? ? if (ret)
> + ? ? ? ? ? ? ? goto register_failed;
> +
> + ? ? ? return 0;
> +
> +register_failed:
> + ? ? ? clk_disable(dw_wdt.clk);
> + ? ? ? clk_put(dw_wdt.clk);
also iounmap and release_mem_region...
> +
> + ? ? ? return ret;
> +}
> +
> +static int __devexit dw_wdt_drv_remove(struct platform_device *pdev)
> +{
> + ? ? ? clk_disable(dw_wdt.clk);
> + ? ? ? clk_put(dw_wdt.clk);
> +
> + ? ? ? misc_deregister(&dw_wdt_miscdev);
also iounmap and release_mem_region...
> +
> + ? ? ? return 0;
> +}
> +
> +static struct platform_driver dw_wdt_driver = {
> + ? ? ? .probe ? ? ? ? ?= dw_wdt_drv_probe,
> + ? ? ? .remove ? ? ? ? = __devexit_p(dw_wdt_drv_remove),
> + ? ? ? .driver ? ? ? ? = {
> + ? ? ? ? ? ? ? .name ? = "dw_wdt",
> + ? ? ? ? ? ? ? .owner ?= THIS_MODULE,
> + ? ? ? ? ? ? ? .pm ? ? = DW_WDT_PM_OPS,
> + ? ? ? },
> +};
> +
> +static int __init dw_wdt_watchdog_init(void)
> +{
> + ? ? ? spin_lock_init(&dw_wdt.lock);
This can be moved to probe. spin_lock_init should be only called when we have
some device for this driver.
> +
> + ? ? ? return platform_driver_register(&dw_wdt_driver);
> +}
> +
> +static void __exit dw_wdt_watchdog_exit(void)
> +{
> + ? ? ? platform_driver_unregister(&dw_wdt_driver);
> +}
> +
> +module_init(dw_wdt_watchdog_init);
> +module_exit(dw_wdt_watchdog_exit);
should be moved after init & exit routines without any blank lines.
--
viresh
ST Microelectronics
^ permalink raw reply
* [PATCH] ARM i.MX27 3ds: Fix mc13783 regulator names
From: Sascha Hauer @ 2011-01-07 16:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1294416684-7100-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/mach-mx27_3ds.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 6fd0f8f..83f8e2b 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -215,10 +215,10 @@ static struct regulator_init_data vgen_init = {
static struct mc13783_regulator_init_data mx27_3ds_regulators[] = {
{
- .id = MC13783_REGU_VMMC1,
+ .id = MC13783_REG_VMMC1,
.init_data = &vmmc1_init,
}, {
- .id = MC13783_REGU_VGEN,
+ .id = MC13783_REG_VGEN,
.init_data = &vgen_init,
},
};
--
1.7.2.3
^ permalink raw reply related
* fix regulator support for the i.MX27 3ds
From: Sascha Hauer @ 2011-01-07 16:11 UTC (permalink / raw)
To: linux-arm-kernel
The mc13783 regulator names have been changed. Currently the 3ds board
is broken in -next.
Sascha
^ permalink raw reply
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