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* [PATCH 2/3] msm: iommu: Generalize platform data for multiple targets
From: Daniel Walker @ 2011-02-11 23:35 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <8ya1v3ekvqg.fsf@huya.qualcomm.com>

On Fri, 2011-02-11 at 15:16 -0800, David Brown wrote:
> On Fri, Feb 11 2011, Daniel Walker wrote:
> 
> > On Fri, 2011-02-11 at 14:37 -0800, David Brown wrote:
> 
> >> It is functionality that will be shared across multiple socs.  Putting
> >> the name of a specific soc would just be misleading.  Currently, it's
> >> our only iommu.  Support for another family that uses a different iommu
> >> could perhaps call it iommu2.
> >
> > Your missing my point. I'm saying it doesn't look flexible enough to
> > allow support for multiple SoCs .. Is everything going to be identical
> > across all the supported socs ?
> 
> It wouldn't help, though.  If the addresses differ across targets, we
> don't want defines that are conditionally defined, so we would need
> multiple tables, giving the address for specific targets.  Still no
> reason to have an indirection on the names.

I'm talking about the whole deal here, this whole patch series. It
doesn't seem like this has been thought out too well. 

Daniel

-- 
Sent by an consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
Forum.

^ permalink raw reply

* [PATCH] PM: Allow pm_runtime_suspend() to succeed during system suspend
From: Kevin Hilman @ 2011-02-11 23:45 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <201102112225.54140.rjw@sisk.pl>

"Rafael J. Wysocki" <rjw@sisk.pl> writes:

> On Friday, February 11, 2011, Kevin Hilman wrote:
>> "Rafael J. Wysocki" <rjw@sisk.pl> writes:
>> 
>> > On Monday, January 31, 2011, Rafael J. Wysocki wrote:
>> >> On Monday, January 31, 2011, Alan Stern wrote:
>> >> > On Mon, 31 Jan 2011, Kevin Hilman wrote:
>> >> > 
>> >> > > I understand how this works, but frankly I'm still a bit fuzzy on why.
>> >> > > 
>> >> > > I guess I'm still missing a good understanding of what "interfering with a
>> >> > > system power transition" means, and why a runtime suspend qualifies as
>> >> > > interfering but not a runtime resume.
>> >> > 
>> >> > These are good questions.  Rafael implemented this design originally; 
>> >> > my contribution was only to warn him of the potential for problems.  
>> >> > Therefore he should explain the rationale for the design.
>> >> 
>> >> The reason why runtime resume is allowed during system power transitions is
>> >> because in some cases during system suspend we simply have to resume devices
>> >> that were previously runtime-suspended (for example, the PCI bus type does
>> >> that).
>> >> 
>> >> The reason why runtime suspend is not allowed during system power transitions
>> >> if the following race:
>> >> 
>> >> - A device has been suspended via a system suspend callback.
>> >> - The runtime PM framework executes a (scheduled) suspend on that device,
>> >>   not knowing that it's already been suspended, which potentially results in
>> >>   accessing the device's registers in a low-power state.
>> >> 
>> >> Now, it can be avoided if every driver does the right thing and checks whether
>> >> the device is already suspended in its runtime suspend callback, but that would
>> >> kind of defeat the purpose of the runtime PM framework, at least partially.
>> >
>> > In fact, I've just realized that the above race cannot really occur, because
>> > pm_wq is freezable, so I'm proposing the following change.
>> >
>> > Of course, it still doesn't prevent user space from disabling the runtime PM
>> > framework's helpers via /sys/devices/.../power/control.
>> >
>> > Thanks,
>> > Rafael
>> >
>> >
>> > ---
>> > From: Rafael J. Wysocki <rjw@sisk.pl>
>> > Subject: PM: Allow pm_runtime_suspend() to succeed during system suspend
>> >
>> > The dpm_prepare() function increments the runtime PM reference
>> > counters of all devices to prevent pm_runtime_suspend() from
>> > executing subsystem-level callbacks.  However, this was supposed to
>> > guard against a specific race condition that cannot happen, because
>> > the power management workqueue is freezable, so pm_runtime_suspend()
>> > can only be called synchronously during system suspend and we can
>> > rely on subsystems and device drivers to avoid doing that
>> > unnecessarily.
>> >
>> > Make dpm_prepare() drop the runtime PM reference to each device
>> > after making sure that runtime resume is not pending for it.
>> >
>> > Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
>> > ---
>> 
>> Yes!
>> 
>> Acked-by: Kevin Hilman <khilman@ti.com>
>
> Well, I hope you realize that it doesn't help you a lot?
>

If you mean that because we still have to implement system PM methods
because of /sys/devices/.../power/control, I agree.

If something else, please explain.

But to me it is still very helpful in terms of consistency and what
driver writers would expect to happen if they used pm_runtime_suspend()
in their system suspend method.

Thanks,

Kevin

^ permalink raw reply

* [PATCH 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Shawn Guo @ 2011-02-11 23:48 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <19797.19780.128209.60173@ipc1.ka-ro>

On Fri, Feb 11, 2011 at 03:52:52PM +0100, Lothar Wa?mann wrote:
> Hi,
> 
> Shawn Guo writes:
> > Hi Lothar,
> > 
> > On Wed, Feb 09, 2011 at 08:46:18AM +0100, Lothar Wa?mann wrote:
> > > Hi Shawn,
> > > 
> > > Shawn Guo writes:
> > > > This adds the mmc host driver for Freescale MXS-based SoC i.MX23/28.
> > > > The driver calls into mxs-dma via generic dmaengine api for both pio
> > > > and data transfer.
> > > > 
> > > > Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
> > > > ---
> > > >  arch/arm/mach-mxs/include/mach/mmc.h |   15 +
> > > >  drivers/mmc/host/Kconfig             |    9 +
> > > >  drivers/mmc/host/Makefile            |    1 +
> > > >  drivers/mmc/host/mxs-mmc.c           |  884 ++++++++++++++++++++++++++++++++++
> > > >  4 files changed, 909 insertions(+), 0 deletions(-)
> > > >  create mode 100644 arch/arm/mach-mxs/include/mach/mmc.h
> > > >  create mode 100644 drivers/mmc/host/mxs-mmc.c
> > > > 
> > > I've run the mmc-test kernel module with this driver on our TX28
> > > module which fails in the following tests:
> > > |mmc0: Test case 15. Correct xfer_size at write (start failure)...
> > > |mmc0: Result: ERROR (-110)
> > > |mmc0: Test case 16. Correct xfer_size at read (start failure)...
> > > |mmc0: Result: ERROR (-110)
> > > |mmc0: Test case 17. Correct xfer_size at write (midway failure)...
> > > |mmc0: Result: ERROR (-110)
> > > |mmc0: Test case 18. Correct xfer_size at read (midway failure)...
> > > |mmc0: Result: ERROR (-110)
> > > 
> > > Could you try the test on your hardware?
> > > 
> > I'm new to this test.  I enabled MMC_TEST but did not see "test"
> > under /sys for mmc.  Can you please elaborate how to launch this
> > test?  Thanks.
> > 
> You need debugfs mounted and the mmc-test module loaded.
> An inserted card will normally be grabbed by the mmc-block driver. You
> can 'unbind' the driver and 'bind' it to the mmc-test driver using the
> corresponding entries in sysfs. The mmc-test driver can be controlled
> via debugfs.
> 
> The following script steals an inserted card from the mmc-block driver
> and performs all mmc-test testcases (TRASHING THE CONTENTS OF THE
> CARD!).
> <--------
> #!/bin/bash
> drv_path=/sys/bus/mmc/drivers
> dbg_path=/sys/kernel/debug
> testdrv=mmc_test
> 
> shopt -s nullglob
> card=""
> 
> cleanup() {
>     if [ -n "$card" -a -n "$driver" -a "$driver" != "$testdrv" ];then
> 	echo "Restoring driver $driver"
> 	echo "$card" > "$drv_path/$testdrv/unbind"
> 	echo "$card" > "$drv_path/$driver/bind"
>     fi
> }
> 
> trap cleanup 0
> set -e
> cd "$drv_path"
> for d in *;do
>     for l in "$d/"*;do
> 	[ -h "$l" ] || continue
> 	card="$(basename "$l")"
> 	driver="$(dirname "$l")"
> 	break
>     done
>     [ -n "$card" ] && break
> done
> if [ -z "$card" ];then
>     echo "No MMC/SD card found"
>     exit 1
> fi
> if [ "$driver" != "$testdrv" ];then
>     echo "Trying to claim card $card from driver $driver"
>     echo "$card" > "$drv_path/$driver/unbind"
>     echo "$card" > "$drv_path/$testdrv/bind"
> fi
> echo "WARNING: Card $card will be overwritten!"
> echo "Hit <ENTER> to continue; <CTRL-C> to abort"
> read
> # perform all testcases (> 0 for individual tests)
> echo 0 > "$dbg_path/${card%:*}/$card/test"
> >--------
> 
Thanks a lot for the test script.  Yes, I'm seeing the same problem
here.  I will try to get it fixed in v2.

Regards,
Shawn

^ permalink raw reply

* [PATCH] PM: Allow pm_runtime_suspend() to succeed during system suspend
From: Rafael J. Wysocki @ 2011-02-12  0:00 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <87aai26sq4.fsf@ti.com>

On Saturday, February 12, 2011, Kevin Hilman wrote:
> "Rafael J. Wysocki" <rjw@sisk.pl> writes:
> 
> > On Friday, February 11, 2011, Kevin Hilman wrote:
> >> "Rafael J. Wysocki" <rjw@sisk.pl> writes:
> >> 
> >> > On Monday, January 31, 2011, Rafael J. Wysocki wrote:
> >> >> On Monday, January 31, 2011, Alan Stern wrote:
> >> >> > On Mon, 31 Jan 2011, Kevin Hilman wrote:
> >> >> > 
> >> >> > > I understand how this works, but frankly I'm still a bit fuzzy on why.
> >> >> > > 
> >> >> > > I guess I'm still missing a good understanding of what "interfering with a
> >> >> > > system power transition" means, and why a runtime suspend qualifies as
> >> >> > > interfering but not a runtime resume.
> >> >> > 
> >> >> > These are good questions.  Rafael implemented this design originally; 
> >> >> > my contribution was only to warn him of the potential for problems.  
> >> >> > Therefore he should explain the rationale for the design.
> >> >> 
> >> >> The reason why runtime resume is allowed during system power transitions is
> >> >> because in some cases during system suspend we simply have to resume devices
> >> >> that were previously runtime-suspended (for example, the PCI bus type does
> >> >> that).
> >> >> 
> >> >> The reason why runtime suspend is not allowed during system power transitions
> >> >> if the following race:
> >> >> 
> >> >> - A device has been suspended via a system suspend callback.
> >> >> - The runtime PM framework executes a (scheduled) suspend on that device,
> >> >>   not knowing that it's already been suspended, which potentially results in
> >> >>   accessing the device's registers in a low-power state.
> >> >> 
> >> >> Now, it can be avoided if every driver does the right thing and checks whether
> >> >> the device is already suspended in its runtime suspend callback, but that would
> >> >> kind of defeat the purpose of the runtime PM framework, at least partially.
> >> >
> >> > In fact, I've just realized that the above race cannot really occur, because
> >> > pm_wq is freezable, so I'm proposing the following change.
> >> >
> >> > Of course, it still doesn't prevent user space from disabling the runtime PM
> >> > framework's helpers via /sys/devices/.../power/control.
> >> >
> >> > Thanks,
> >> > Rafael
> >> >
> >> >
> >> > ---
> >> > From: Rafael J. Wysocki <rjw@sisk.pl>
> >> > Subject: PM: Allow pm_runtime_suspend() to succeed during system suspend
> >> >
> >> > The dpm_prepare() function increments the runtime PM reference
> >> > counters of all devices to prevent pm_runtime_suspend() from
> >> > executing subsystem-level callbacks.  However, this was supposed to
> >> > guard against a specific race condition that cannot happen, because
> >> > the power management workqueue is freezable, so pm_runtime_suspend()
> >> > can only be called synchronously during system suspend and we can
> >> > rely on subsystems and device drivers to avoid doing that
> >> > unnecessarily.
> >> >
> >> > Make dpm_prepare() drop the runtime PM reference to each device
> >> > after making sure that runtime resume is not pending for it.
> >> >
> >> > Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
> >> > ---
> >> 
> >> Yes!
> >> 
> >> Acked-by: Kevin Hilman <khilman@ti.com>
> >
> > Well, I hope you realize that it doesn't help you a lot?
> >
> 
> If you mean that because we still have to implement system PM methods
> because of /sys/devices/.../power/control, I agree.

Yes, I meant that.
 
> If something else, please explain.
>
> But to me it is still very helpful in terms of consistency and what
> driver writers would expect to happen if they used pm_runtime_suspend()
> in their system suspend method.

OK

Thanks,
Rafael

^ permalink raw reply

* [PATCH] OMAP1: PM: fix omap1 build
From: Kevin Hilman @ 2011-02-12  0:13 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1297081358-8294-1-git-send-email-manjugk@ti.com>

Hi Manju,

"G, Manjunath Kondaiah" <manjugk@ti.com> writes:

> The omap1_defconfig build on pm branch throughs below build error:
>
>   CC      drivers/i2c/busses/i2c-omap.o
> drivers/i2c/busses/i2c-omap.c:1173: error: lvalue required as unary '&' operand
> make[3]: *** [drivers/i2c/busses/i2c-omap.o] Error 1
> make[2]: *** [drivers/i2c/busses] Error 2
> make[1]: *** [drivers/i2c] Error 2
> make: *** [drivers] Error 2
>
> Fix above build error. Boot tested on omap1710(h3) board.
>
> Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> ---
>  drivers/i2c/busses/i2c-omap.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 0541df9..8db456f 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -1170,7 +1170,7 @@ static struct platform_driver omap_i2c_driver = {
>  	.driver		= {
>  		.name	= "omap_i2c",
>  		.owner	= THIS_MODULE,
> -		.pm     = &omap_i2c_pm_ops,
> +		.pm     = omap_i2c_pm_ops,
>  	},
>  };

This might fix the compile on OMAP1, but it then breaks the build for
OMAP2+ when CONFIG_PM is enabled.

This isn't really an OMAP1 issue, rather it's a !CONFIG_PM issue.

The right fix will be to make the #else clause of the #ifdef CONFIG_PM
correct for all OMAPs.

Also, please Cc Ben Dooks and the linux-i2c list on I2C driver patches
(MAINTAINERS entry below.)

Thanks,

Kevin




I2C SUBSYSTEM
M:	"Jean Delvare (PC drivers, core)" <khali@linux-fr.org>
M:	"Ben Dooks (embedded platforms)" <ben-linux@fluff.org>
L:	linux-i2c at vger.kernel.org
W:	http://i2c.wiki.kernel.org/
T:	quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/
T:	git git://git.fluff.org/bjdooks/linux.git
S:	Maintained
F:	Documentation/i2c/
F:	drivers/i2c/
F:	include/linux/i2c.h
F:	include/linux/i2c-*.h

^ permalink raw reply

* [PATCH 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Shawn Guo @ 2011-02-12  0:55 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <201102111651.35530.arnd@arndb.de>

On Fri, Feb 11, 2011 at 04:51:35PM +0100, Arnd Bergmann wrote:
> On Saturday 12 February 2011, Shawn Guo wrote:
> > On Thu, Feb 10, 2011 at 06:17:41PM +0100, Arnd Bergmann wrote:
> > > On Friday 11 February 2011, Shawn Guo wrote:
> > > > 
> > > > > > +	struct mxs_dma_data		dma_data;
> > > > > 
> > > > > Why do you need host specific DMA structures? Please stick to
> > > > > the generic dma-engine API if possible.
> > > > > 
> > > > I'm sticking to the generic dmaengine api.  The mxs dma hardware
> > > > has separate irq line for every single dma channel, which needs to
> > > > be told by client driver.
> > > 
> > > I'm not convinced, it still sounds like a layering violation to
> > > have specific information about the DMA controller in the
> > > platform data of a driver using the dma engine API.
> > > 
> > It sounds like something about the dma controller, but it really
> > belongs to dma client device e.g. ssp here.  Every single dma client
> > device has two dma related resources, dma channel and dma irq, which
> > should be defined in client device data.
> 
> That is true for the DMA controller you use, but it doesn't have
> to be that way for all other DMA controllers, right? My point is
> that the MMC driver should not make any assumptions about what
> DMA controller is used, because a future SoC might combine it
> with a different DMA controller, e.g. one that just just a single
> interrupt for all channels.
> 
Your thought is right.  But the fact is, from hw design point of
view, all client peripherals are coupled with mxs dma.  As a real
example, gpmi (mxs nand controller) is one mxs dma client device.
When gpmi is integrated into i.MX50 to replace nfc (original i.mx
nand controller), dma-aphb has to be brought into mx50 together,
though mx50 already gets sdma there.

I tried hard to decouple client driver from mxs dmaengine driver, but
it can not be that thorough. As dma peripheral only trigger error irq,
mxs dma "pio" mode and dma irq need to be handled by client and dma
driver in a coupled way.

> > > Why can't you put the interrupt number into the platform data of
> > > the dma engine device? Your filter function already identifies
> > > the number of the DMA channel.
> > > 
> > We have 16 channels for dma-apbh and dma-apbx respectively.  And each
> > channel has fixed peripheral device and irq.  You think we can define
> > 2 x 16 x (channel number + channel irq) in dma engine driver?  I'm
> > afraid not.  The channel number can be identified in filter function
> > because dmaengine core code and mxs dma hw are indexing the channel
> > in the same way, so that the sw channel id can be used to address hw
> > channel, otherwise we have to pass hw channel id to dma driver just
> > like what we do with irq.
> 
> I don't understand. The sw channel id should be something that is
> defined in an arbitrary way for each machine, and it should be the
> only thing that a driver needs, right?
> 
Yes, the sw channel id can be defined in an arbitrary way by
dmaengine, but in that case dmaegine can not use sw channel id to
access hw channel, because each mxs dma client device gets a specific
hw channel.  Of course, we can give device an arbitrary channel with
a fixed hw channel id attached on, and use hw id to access hw channel.
But in that case, we have one more info in device data to pass besides
irq.


> I have not looked much at other dmaengine drivers, but I'd be
> surprised if they require the device driver to be written
> for a specific implementation. If that was the case, you would
> not even need a dmaengine API but could just as well write
> to the DMA controller registers from the device driver directly.
> 
We need a specific implementation, but it's not so specific that we
have to access dma controller directly.  Even it is, we still need
an API/interface, as there are so many client devices need to do the
same thing, right? ;)

> > > What I meant is that you take care to avoid getting into the
> > > interrupt handler while holding the spinlock, but in the handler,
> > > you don't check if the lock is held. It can't be correct to
> > > serialize just half the cases.
> > > 
> > Thanks for the explanation.  Please help review the fix below to see
> > if I understand the comment correctly.
> > 
> >         if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN)) {
> >                 spin_lock_irqsave(&host->lock, flags);
> >                 mmc_signal_sdio_irq(host->mmc);
> >                 spin_unlock_irqrestore(&host->lock, flags);
> >         }
> 
> This is still wrong for two reasons:
> 
> * You now don't hold the lock while reading the 'stat' variable. The point of the
>   lock is to make sure that sdio doesn't get turned off after reading stat but
>   before signaling the sdio, so you have to hold it across both.
> * In an interrupt controller, you should not disable interrupts again.
>   It's harmless, but slow and confusing to the reader.
> 
Sorry for the dumb.  So it should be something like the following?

        spin_lock(&host->lock);

        stat = readl(host->base + HW_SSP_CTRL1);
        writel(stat & MXS_MMC_IRQ_BITS,
                host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);

	[...]

        if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
                mmc_signal_sdio_irq(host->mmc);

        spin_unlock(&host->lock);

Regards,
Shawn

^ permalink raw reply

* [PATCH 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Shawn Guo @ 2011-02-12  1:08 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <19797.19042.257018.636040@ipc1.ka-ro>

On Fri, Feb 11, 2011 at 03:40:34PM +0100, Lothar Wa?mann wrote:
> Shawn Guo writes:
> > Hi Lothar,
> > 
> > On Tue, Feb 08, 2011 at 12:41:20PM +0100, Lothar Wa?mann wrote:
> > > Hi,
> > > 
> > > Shawn Guo writes:
> > > [...]
> > > > +static int mxs_mmc_remove(struct platform_device *pdev)
> > > > +{
> > > > +	struct mmc_host *mmc = platform_get_drvdata(pdev);
> > > > +	struct mxs_mmc_host *host = mmc_priv(mmc);
> > > > +
> > > > +	platform_set_drvdata(pdev, NULL);
> > > > +
> > > > +	mmc_remove_host(mmc);
> > > > +
> > > > +	del_timer(&host->timer);
> > > > +
> > > > +	free_irq(host->irq, host);
> > > > +
> > > > +	if (host->dmach)
> > > > +		dma_release_channel(host->dmach);
> > > > +
> > > > +	clk_disable(host->clk);
> > > > +	clk_put(host->clk);
> > > > +
> > > > +	iounmap(host->base);
> > > > +
> > > > +	mmc_free_host(mmc);
> > > > +
> > > > +	release_mem_region(host->res->start, resource_size(host->res));
> > > >
> > > When compiled with CONFIG_PAGE_POISON this leads to:
> > > |mmc0: card cdef removed
> > > |Unable to handle kernel paging request at virtual address 6b6b6b6b
> > > |pgd = c6ea4000
> > > |[6b6b6b6b] *pgd=00000000
> > > |Internal error: Oops: 1 [#1] PREEMPT
> > > |last sysfs file: /sys/module/mxs_mmc/refcnt
> > > |Modules linked in: mxs_mmc(-) evdev nand nand_ids nand_ecc tsc2007 pca953x
> > > |CPU: 0    Not tainted  (2.6.37-karo+ #100)
> > > |PC is at mxs_mmc_remove+0x78/0x94 [mxs_mmc]
> > > |LR is at mark_held_locks+0x5c/0x84
> > > |pc : [<bf03310c>]    lr : [<c0071da0>]    psr: 20000013
> > > |sp : c6e33ef8  ip : 6b6b6b6b  fp : be825a38
> > > |r10: 00000000  r9 : c6e32000  r8 : c0037888
> > > |r7 : 00591700  r6 : c78d24bc  r5 : c6c6ea80  r4 : c6c6ed60
> > > |r3 : 6b6b6b6b  r2 : 00000040  r1 : c6d833d0  r0 : c043af18
> > > |Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
> > > |Control: 0005317f  Table: 46ea4000  DAC: 00000015
> > > |Process modprobe (pid: 1217, stack limit = 0xc6e32270)
> > > |Stack: (0xc6e33ef8 to 0xc6e34000)
> > > |3ee0:                                                       c78d2488 bf034100
> > > |3f00: c78d24bc c0237034 c78d2488 c0235e68 c78d2488 bf034100 c78d24bc c0235f34
> > > |3f20: bf034100 00000080 c045c3e8 c02351c4 bf034138 00000080 c6e33f44 c007de4c
> > > |3f40: be82599c 5f73786d 00636d6d 00000000 c01efdf0 c6d830c0 c6d830c0 c03195ec
> > > |3f60: 00000001 c6dddbd8 c6e33f7c c0045fc4 c6d830c0 c00377d8 00000001 00000081
> > > |3f80: 60000010 c00720d4 be825a2c 00000000 00000001 be825a2c 005916b0 00000001
> > > |3fa0: 00000081 c00376c0 be825a2c 005916b0 00591700 00000080 be825994 00000000
> > > |3fc0: be825a2c 005916b0 00000001 00000081 00591700 0000c69c 005916bc be825a38
> > > |3fe0: 00591520 be8259a0 0000a42c 402aee3c 60000010 00591700 aaaaaaaa aaaaaaaa
> > > |[<bf03310c>] (mxs_mmc_remove+0x78/0x94 [mxs_mmc]) from [<c0237034>] (platform_drv_remove+0x18/0x1c)
> > > |[<c0237034>] (platform_drv_remove+0x18/0x1c) from [<c0235e68>] (__device_release_driver+0x64/0xa4)
> > > |[<c0235e68>] (__device_release_driver+0x64/0xa4) from [<c0235f34>] (driver_detach+0x8c/0xb4)
> > > |[<c0235f34>] (driver_detach+0x8c/0xb4) from [<c02351c4>] (bus_remove_driver+0x8c/0xb4)
> > > |[<c02351c4>] (bus_remove_driver+0x8c/0xb4) from [<c007de4c>] (sys_delete_module+0x1f4/0x260)
> > > |[<c007de4c>] (sys_delete_module+0x1f4/0x260) from [<c00376c0>] (ret_fast_syscall+0x0/0x38)
> > > |Code: e1a00005 eb48cd47 e5943008 e59f0014 (e8930006) 
> > > |---[ end trace bb06175839554c3b ]---
> > > indicating a use_after_free BUG!
> > 
> > Thanks for catching this.
> > 
> > > The struct mxs_mmc_host has been already freed here by the
> > > preceding mmc_free_host() call. This should be:
> > > 	struct resource *res = host->res;
> > > ...
> > > 	mmc_free_host(mmc);
> > > 	release_mem_region(res->start, resource_size(res));
> > > 
> > How about fixing it like below?
> > 
> > 	release_mem_region(host->res->start, resource_size(host->res));
> > 	mmc_free_host(mmc);
> > 
> It's also OK. Although I prefer to do the release_mem_region() as the
> last action, because the corresponding request_mem_region() is the
> first action of the driver.
> 
OK, will respect the comment.

> I still have some more comments:
> |static int mxs_mmc_remove(struct platform_device *pdev)
> |{
> |	struct mmc_host *mmc = platform_get_drvdata(pdev);
> |	struct mxs_mmc_host *host = mmc_priv(mmc);
> |
> |	platform_set_drvdata(pdev, NULL);
> This should be done after the driver has been quiesced (i.e. after
> free_irq). It's not relevant in this case right now, but cleaner
> anyway since some timer or IRQ handler might still be triggered and
> call platform_get_drvdata().

OK.

> If you always care to do the actions in the remove() function in the
> opposite order as the corresponding actions in the probe() function
> things will usually be in the right order automatically.
> 
I do care the action order in remove() vs. probe(), and that's why
I firstly call platform_set_drvdata(pdev, NULL) in remove() ;)  So
should I move platform_set_drvdata(pdev, mmc) in probe() ahead of
request_irq()?

> |static int mxs_mmc_suspend(struct device *dev)
> |{
> |	struct mmc_host *mmc = dev_get_drvdata(dev);
> |	struct mxs_mmc_host *host = mmc_priv(mmc);
> |	int ret = 0;
> |
> |	if (mmc)
> 'mmc' cannot be NULL here. And as it has already been dereferenced
> by mmc_priv(mmc) above, it makes even less sense to check it here.
> 
OK.

> |static int mxs_mmc_resume(struct device *dev)
> |{
> |	struct mmc_host *mmc = dev_get_drvdata(dev);
> |	struct mxs_mmc_host *host = mmc_priv(mmc);
> |	int ret = 0;
> |
> |	clk_enable(host->clk);
> |
> |	if (mmc)
> same as above.
> 
OK.

Regards,
Shawn

^ permalink raw reply

* [PATCH 04/17] ab3550: mfd_cell is now implicitly available to drivers
From: Andres Salomon @ 2011-02-12  2:04 UTC (permalink / raw)
  To: linux-arm-kernel


No clients (in mainline kernel, I'm told that drivers exist in external
trees that are planned for mainline inclusion) make use of this, nor
do they make use of platform_data, so nothing really had to change here.

The .data_size field is unused, so its usage gets removed.

Signed-off-by: Andres Salomon <dilinger@queued.net>
---
 drivers/mfd/ab3550-core.c  |    4 +---
 include/linux/mfd/abx500.h |    1 -
 2 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/drivers/mfd/ab3550-core.c b/drivers/mfd/ab3550-core.c
index 5fbca34..d849087 100644
--- a/drivers/mfd/ab3550-core.c
+++ b/drivers/mfd/ab3550-core.c
@@ -1320,10 +1320,8 @@ static int __init ab3550_probe(struct i2c_client *client,
 		goto exit_no_ops;
 
 	/* Set up and register the platform devices. */
-	for (i = 0; i < AB3550_NUM_DEVICES; i++) {
+	for (i = 0; i < AB3550_NUM_DEVICES; i++)
 		ab3550_devs[i].platform_data = ab3550_plf_data->dev_data[i];
-		ab3550_devs[i].data_size = ab3550_plf_data->dev_data_sz[i];
-	}
 
 	err = mfd_add_devices(&client->dev, 0, ab3550_devs,
 		ARRAY_SIZE(ab3550_devs), NULL,
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h
index 67bd6f7..7d9b6ae 100644
--- a/include/linux/mfd/abx500.h
+++ b/include/linux/mfd/abx500.h
@@ -186,7 +186,6 @@ struct abx500_init_settings {
 struct ab3550_platform_data {
 	struct {unsigned int base; unsigned int count; } irq;
 	void *dev_data[AB3550_NUM_DEVICES];
-	size_t dev_data_sz[AB3550_NUM_DEVICES];
 	struct abx500_init_settings *init_settings;
 	unsigned int init_settings_sz;
 };
-- 
1.7.2.3

^ permalink raw reply related

* [PATCH 05/17] ab3100: mfd_cell is now implicitly available to drivers
From: Andres Salomon @ 2011-02-12  2:05 UTC (permalink / raw)
  To: linux-arm-kernel


The cell's platform_data is now accessed with a helper function;
change clients to use that, and remove the now-unused data_size.

Signed-off-by: Andres Salomon <dilinger@queued.net>
---
 drivers/mfd/ab3100-core.c  |    4 +---
 drivers/regulator/ab3100.c |    2 +-
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/mfd/ab3100-core.c b/drivers/mfd/ab3100-core.c
index 4193af5..b44c3d9 100644
--- a/drivers/mfd/ab3100-core.c
+++ b/drivers/mfd/ab3100-core.c
@@ -949,10 +949,8 @@ static int __devinit ab3100_probe(struct i2c_client *client,
 		goto exit_no_ops;
 
 	/* Set up and register the platform devices. */
-	for (i = 0; i < ARRAY_SIZE(ab3100_devs); i++) {
+	for (i = 0; i < ARRAY_SIZE(ab3100_devs); i++)
 		ab3100_devs[i].platform_data = ab3100_plf_data;
-		ab3100_devs[i].data_size = sizeof(struct ab3100_platform_data);
-	}
 
 	err = mfd_add_devices(&client->dev, 0, ab3100_devs,
 		ARRAY_SIZE(ab3100_devs), NULL, 0);
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c
index ed6feaf..c204f6b 100644
--- a/drivers/regulator/ab3100.c
+++ b/drivers/regulator/ab3100.c
@@ -576,7 +576,7 @@ ab3100_regulator_desc[AB3100_NUM_REGULATORS] = {
 
 static int __devinit ab3100_regulators_probe(struct platform_device *pdev)
 {
-	struct ab3100_platform_data *plfdata = pdev->dev.platform_data;
+	struct ab3100_platform_data *plfdata = mfd_get_data(pdev);
 	int err = 0;
 	u8 data;
 	int i;
-- 
1.7.2.3

^ permalink raw reply related

* [PATCH 16/17] mc13xxx: mfd_cell is now implicitly available to drivers
From: Andres Salomon @ 2011-02-12  2:19 UTC (permalink / raw)
  To: linux-arm-kernel


The cell's platform_data is now accessed with a helper function;
change clients to use that, and remove the now-unused data_size.

Note that mfd-core no longer makes a copy of platform_data, but the
mc13xxx-core driver creates the pdata structures on the stack.  In
order to get around that, the various ARM mach types that set the
pdata have been changed to hold the variable in static (global) memory.
Also note that __initdata references in aforementioned pdata structs
have been dropped.

Signed-off-by: Andres Salomon <dilinger@queued.net>
---
 arch/arm/mach-imx/mach-mx27_3ds.c     |    6 +++++-
 arch/arm/mach-imx/mach-pcm038.c       |    6 +++++-
 arch/arm/mach-mx3/mach-mx31_3ds.c     |    6 +++++-
 arch/arm/mach-mx3/mach-mx31moboard.c  |    6 +++++-
 drivers/leds/leds-mc13783.c           |    6 +++---
 drivers/mfd/mc13xxx-core.c            |   18 +++++-------------
 drivers/regulator/mc13783-regulator.c |    6 ++----
 drivers/regulator/mc13892-regulator.c |    6 ++----
 include/linux/mfd/mc13xxx.h           |    3 +--
 9 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 1643315..f223371 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -227,9 +227,13 @@ static struct mc13783_regulator_init_data mx27_3ds_regulators[] = {
 };
 
 /* MC13783 */
-static struct mc13783_platform_data mc13783_pdata __initdata = {
+static struct mc13783_regulator_platform_data mx27_3ds_regs = {
 	.regulators = mx27_3ds_regulators,
 	.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
+};
+
+static struct mc13783_platform_data mc13783_pdata = {
+	.regulators = &mx27_3ds_regs,
 	.flags  = MC13783_USE_REGULATOR,
 };
 
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 5056148..4b37494 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -262,9 +262,13 @@ static struct mc13783_regulator_init_data pcm038_regulators[] = {
 	},
 };
 
-static struct mc13783_platform_data pcm038_pmic = {
+static struct mc13783_regulator_platform_data pcm038_pmic_regs = {
 	.regulators = pcm038_regulators,
 	.num_regulators = ARRAY_SIZE(pcm038_regulators),
+};
+
+static struct mc13783_platform_data pcm038_pmic = {
+	.regulators = &pcm038_pmic_regs,
 	.flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
 		 MC13783_USE_TOUCHSCREEN,
 };
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 0d65db8..8005788 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -156,9 +156,13 @@ static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
 };
 
 /* MC13783 */
-static struct mc13783_platform_data mc13783_pdata __initdata = {
+static struct mc13783_regulator_platform_data mx31_3ds_regs = {
 	.regulators = mx31_3ds_regulators,
 	.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
+};
+
+static struct mc13783_platform_data mc13783_pdata = {
+	.regulators = &mx31_3ds_regs,
 	.flags  = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN,
 };
 
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index 1aa8d65..e824d2e 100644
--- a/arch/arm/mach-mx3/mach-mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -267,9 +267,13 @@ static struct mc13783_leds_platform_data moboard_leds = {
 	.tc2_period = MC13783_LED_PERIOD_10MS,
 };
 
-static struct mc13783_platform_data moboard_pmic = {
+static struct mc13783_regulator_platform_data moboard_pmic_regs = {
 	.regulators = moboard_regulators,
 	.num_regulators = ARRAY_SIZE(moboard_regulators),
+};
+
+static struct mc13783_platform_data moboard_pmic = {
+	.regulators = &moboard_pmic_regs,
 	.leds = &moboard_leds,
 	.flags = MC13783_USE_REGULATOR | MC13783_USE_RTC |
 		MC13783_USE_ADC | MC13783_USE_LED,
diff --git a/drivers/leds/leds-mc13783.c b/drivers/leds/leds-mc13783.c
index f05bb08..0d87477 100644
--- a/drivers/leds/leds-mc13783.c
+++ b/drivers/leds/leds-mc13783.c
@@ -183,7 +183,7 @@ static int __devinit mc13783_led_setup(struct mc13783_led *led, int max_current)
 
 static int __devinit mc13783_leds_prepare(struct platform_device *pdev)
 {
-	struct mc13783_leds_platform_data *pdata = dev_get_platdata(&pdev->dev);
+	struct mc13783_leds_platform_data *pdata = mfd_get_data(pdev);
 	struct mc13783 *dev = dev_get_drvdata(pdev->dev.parent);
 	int ret = 0;
 	int reg = 0;
@@ -264,7 +264,7 @@ out:
 
 static int __devinit mc13783_led_probe(struct platform_device *pdev)
 {
-	struct mc13783_leds_platform_data *pdata = dev_get_platdata(&pdev->dev);
+	struct mc13783_leds_platform_data *pdata = mfd_get_data(pdev);
 	struct mc13783_led_platform_data *led_cur;
 	struct mc13783_led *led, *led_dat;
 	int ret, i;
@@ -351,7 +351,7 @@ err_free:
 
 static int __devexit mc13783_led_remove(struct platform_device *pdev)
 {
-	struct mc13783_leds_platform_data *pdata = dev_get_platdata(&pdev->dev);
+	struct mc13783_leds_platform_data *pdata = mfd_get_data(pdev);
 	struct mc13783_led *led = platform_get_drvdata(pdev);
 	struct mc13783 *dev = dev_get_drvdata(pdev->dev.parent);
 	int i;
diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
index b9fcaf0..00c5490 100644
--- a/drivers/mfd/mc13xxx-core.c
+++ b/drivers/mfd/mc13xxx-core.c
@@ -683,14 +683,13 @@ out:
 EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion);
 
 static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
-		const char *format, void *pdata, size_t pdata_size)
+		const char *format, void *pdata)
 {
 	char buf[30];
 	const char *name = mc13xxx_get_chipname(mc13xxx);
 
 	struct mfd_cell cell = {
 		.platform_data = pdata,
-		.data_size = pdata_size,
 	};
 
 	/* there is no asnprintf in the kernel :-( */
@@ -706,7 +705,7 @@ static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
 
 static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)
 {
-	return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
+	return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL);
 }
 
 static int mc13xxx_probe(struct spi_device *spi)
@@ -764,13 +763,8 @@ err_revision:
 		mc13xxx_add_subdevice(mc13xxx, "%s-codec");
 
 	if (pdata->flags & MC13XXX_USE_REGULATOR) {
-		struct mc13xxx_regulator_platform_data regulator_pdata = {
-			.num_regulators = pdata->num_regulators,
-			.regulators = pdata->regulators,
-		};
-
 		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
-				&regulator_pdata, sizeof(regulator_pdata));
+				pdata->regulators);
 	}
 
 	if (pdata->flags & MC13XXX_USE_RTC)
@@ -779,10 +773,8 @@ err_revision:
 	if (pdata->flags & MC13XXX_USE_TOUCHSCREEN)
 		mc13xxx_add_subdevice(mc13xxx, "%s-ts");
 
-	if (pdata->flags & MC13XXX_USE_LED) {
-		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
-					pdata->leds, sizeof(*pdata->leds));
-	}
+	if (pdata->flags & MC13XXX_USE_LED)
+		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led", pdata->leds);
 
 	return 0;
 }
diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c
index 3e5d0c3..1b7cc16 100644
--- a/drivers/regulator/mc13783-regulator.c
+++ b/drivers/regulator/mc13783-regulator.c
@@ -336,8 +336,7 @@ static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
 {
 	struct mc13xxx_regulator_priv *priv;
 	struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
-	struct mc13783_regulator_platform_data *pdata =
-		dev_get_platdata(&pdev->dev);
+	struct mc13783_regulator_platform_data *pdata = mfd_get_data(pdev);
 	struct mc13783_regulator_init_data *init_data;
 	int i, ret;
 
@@ -381,8 +380,7 @@ err:
 static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
 {
 	struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
-	struct mc13783_regulator_platform_data *pdata =
-		dev_get_platdata(&pdev->dev);
+	struct mc13783_regulator_platform_data *pdata = mfd_get_data(pdev);
 	int i;
 
 	platform_set_drvdata(pdev, NULL);
diff --git a/drivers/regulator/mc13892-regulator.c b/drivers/regulator/mc13892-regulator.c
index 1b8f739..e23578a 100644
--- a/drivers/regulator/mc13892-regulator.c
+++ b/drivers/regulator/mc13892-regulator.c
@@ -520,8 +520,7 @@ static int __devinit mc13892_regulator_probe(struct platform_device *pdev)
 {
 	struct mc13xxx_regulator_priv *priv;
 	struct mc13xxx *mc13892 = dev_get_drvdata(pdev->dev.parent);
-	struct mc13xxx_regulator_platform_data *pdata =
-		dev_get_platdata(&pdev->dev);
+	struct mc13xxx_regulator_platform_data *pdata = mfd_get_data(pdev);
 	struct mc13xxx_regulator_init_data *init_data;
 	int i, ret;
 	u32 val;
@@ -595,8 +594,7 @@ err_free:
 static int __devexit mc13892_regulator_remove(struct platform_device *pdev)
 {
 	struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
-	struct mc13xxx_regulator_platform_data *pdata =
-		dev_get_platdata(&pdev->dev);
+	struct mc13xxx_regulator_platform_data *pdata = mfd_get_data(pdev);
 	int i;
 
 	platform_set_drvdata(pdev, NULL);
diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h
index a1d391b..052b133 100644
--- a/include/linux/mfd/mc13xxx.h
+++ b/include/linux/mfd/mc13xxx.h
@@ -146,8 +146,7 @@ struct mc13xxx_platform_data {
 #define MC13XXX_USE_LED		(1 << 5)
 	unsigned int flags;
 
-	int num_regulators;
-	struct mc13xxx_regulator_init_data *regulators;
+	struct mc13xxx_regulator_platform_data *regulators;
 	struct mc13xxx_leds_platform_data *leds;
 };
 
-- 
1.7.2.3

^ permalink raw reply related

* [PATCH 2/6] ARM: pm: add generic CPU suspend/resume support
From: Colin Cross @ 2011-02-12  2:50 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <E1Pnvgw-0002yZ-M0@rmk-PC.arm.linux.org.uk>

On Fri, Feb 11, 2011 at 8:17 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> This adds core support for saving and restoring CPU coprocessor
> registers for suspend/resume support. ?This contains support for suspend
> with ARM920, ARM926, SA11x0, PXA25x, PXA27x, PXA3xx, V6 and V7 CPUs.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> ?arch/arm/include/asm/glue-proc.h | ? ?3 +
> ?arch/arm/include/asm/proc-fns.h ?| ? ?7 ++
> ?arch/arm/kernel/Makefile ? ? ? ? | ? ?1 +
> ?arch/arm/kernel/asm-offsets.c ? ?| ? ?9 +++
> ?arch/arm/kernel/sleep.S ? ? ? ? ?| ?110 ++++++++++++++++++++++++++++++++++++
> ?arch/arm/mm/proc-arm1020.S ? ? ? | ? ?3 +
> ?arch/arm/mm/proc-arm1020e.S ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm1022.S ? ? ? | ? ?3 +
> ?arch/arm/mm/proc-arm1026.S ? ? ? | ? ?3 +
> ?arch/arm/mm/proc-arm6_7.S ? ? ? ?| ? ?6 ++
> ?arch/arm/mm/proc-arm720.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm740.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm7tdmi.S ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm920.S ? ? ? ?| ? 37 ++++++++++++
> ?arch/arm/mm/proc-arm922.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm925.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm926.S ? ? ? ?| ? 37 ++++++++++++
> ?arch/arm/mm/proc-arm940.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm946.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-arm9tdmi.S ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-fa526.S ? ? ? ? | ? ?3 +
> ?arch/arm/mm/proc-feroceon.S ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-mohawk.S ? ? ? ?| ? ?3 +
> ?arch/arm/mm/proc-sa110.S ? ? ? ? | ? ?3 +
> ?arch/arm/mm/proc-sa1100.S ? ? ? ?| ? 39 +++++++++++++
> ?arch/arm/mm/proc-v6.S ? ? ? ? ? ?| ? 50 ++++++++++++++++
> ?arch/arm/mm/proc-v7.S ? ? ? ? ? ?| ?116 ++++++++++++++++++++++++++++----------
> ?arch/arm/mm/proc-xsc3.S ? ? ? ? ?| ? 48 +++++++++++++++-
> ?arch/arm/mm/proc-xscale.S ? ? ? ?| ? 45 ++++++++++++++-
> ?29 files changed, 523 insertions(+), 33 deletions(-)
> ?create mode 100644 arch/arm/kernel/sleep.S
>
> diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h
> index e3bf443..6469521 100644
> --- a/arch/arm/include/asm/glue-proc.h
> +++ b/arch/arm/include/asm/glue-proc.h
> @@ -256,6 +256,9 @@
> ?#define cpu_dcache_clean_area ? ? ? ? ?__glue(CPU_NAME,_dcache_clean_area)
> ?#define cpu_do_switch_mm ? ? ? ? ? ? ? __glue(CPU_NAME,_switch_mm)
> ?#define cpu_set_pte_ext ? ? ? ? ? ? ? ? ? ? ? ?__glue(CPU_NAME,_set_pte_ext)
> +#define cpu_suspend_size ? ? ? ? ? ? ? __glue(CPU_NAME,_suspend_size)
> +#define cpu_do_suspend ? ? ? ? ? ? ? ? __glue(CPU_NAME,_do_suspend)
> +#define cpu_do_resume ? ? ? ? ? ? ? ? ?__glue(CPU_NAME,_do_resume)
> ?#endif
>
> ?#endif
> diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
> index 6980215..8ec535e 100644
> --- a/arch/arm/include/asm/proc-fns.h
> +++ b/arch/arm/include/asm/proc-fns.h
> @@ -66,6 +66,11 @@ extern struct processor {
> ? ? ? ? * ignore 'ext'.
> ? ? ? ? */
> ? ? ? ?void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
> +
> + ? ? ? /* Suspend/resume */
> + ? ? ? unsigned int suspend_size;
> + ? ? ? void (*do_suspend)(void *);
> + ? ? ? void (*do_resume)(void *);
> ?} processor;
>
> ?#ifndef MULTI_CPU
> @@ -86,6 +91,8 @@ extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
> ?#define cpu_do_switch_mm(pgd,mm) ? ? ? processor.switch_mm(pgd,mm)
> ?#endif
>
> +extern void cpu_resume(void);
> +
> ?#include <asm/memory.h>
>
> ?#ifdef CONFIG_MMU
> diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
> index 185ee82..74554f1 100644
> --- a/arch/arm/kernel/Makefile
> +++ b/arch/arm/kernel/Makefile
> @@ -29,6 +29,7 @@ obj-$(CONFIG_MODULES) ? ? ? ? += armksyms.o module.o
> ?obj-$(CONFIG_ARTHUR) ? ? ? ? ? += arthur.o
> ?obj-$(CONFIG_ISA_DMA) ? ? ? ? ?+= dma-isa.o
> ?obj-$(CONFIG_PCI) ? ? ? ? ? ? ?+= bios32.o isa.o
> +obj-$(CONFIG_PM) ? ? ? ? ? ? ? += sleep.o
> ?obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o
> ?obj-$(CONFIG_SMP) ? ? ? ? ? ? ?+= smp.o smp_tlb.o
> ?obj-$(CONFIG_HAVE_ARM_SCU) ? ? += smp_scu.o
> diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
> index 5302a91..927522c 100644
> --- a/arch/arm/kernel/asm-offsets.c
> +++ b/arch/arm/kernel/asm-offsets.c
> @@ -13,6 +13,7 @@
> ?#include <linux/sched.h>
> ?#include <linux/mm.h>
> ?#include <linux/dma-mapping.h>
> +#include <asm/cacheflush.h>
> ?#include <asm/glue-df.h>
> ?#include <asm/glue-pf.h>
> ?#include <asm/mach/arch.h>
> @@ -116,6 +117,14 @@ int main(void)
> ?#ifdef MULTI_PABORT
> ? DEFINE(PROCESSOR_PABT_FUNC, ?offsetof(struct processor, _prefetch_abort));
> ?#endif
> +#ifdef MULTI_CPU
> + ?DEFINE(CPU_SLEEP_SIZE, ? ? ? offsetof(struct processor, suspend_size));
> + ?DEFINE(CPU_DO_SUSPEND, ? ? ? offsetof(struct processor, do_suspend));
> + ?DEFINE(CPU_DO_RESUME, ? ? ? ? ? ? ? ?offsetof(struct processor, do_resume));
> +#endif
> +#ifdef MULTI_CACHE
> + ?DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
> +#endif
> ? BLANK();
> ? DEFINE(DMA_BIDIRECTIONAL, ? ?DMA_BIDIRECTIONAL);
> ? DEFINE(DMA_TO_DEVICE, ? ? ? ? ? ? ? ?DMA_TO_DEVICE);
> diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
> new file mode 100644
> index 0000000..9f106fa
> --- /dev/null
> +++ b/arch/arm/kernel/sleep.S
> @@ -0,0 +1,110 @@
> +#include <linux/linkage.h>
> +#include <asm/asm-offsets.h>
> +#include <asm/assembler.h>
> +#include <asm/glue-cache.h>
> +#include <asm/glue-proc.h>
> + ? ? ? .text
> +
> +/*
> + * Save CPU state for a suspend
> + * ?r1 = v:p offset
> + * ?r3 = virtual return function
> + * Note: sp is decremented to allocate space for CPU state on stack
> + * r0-r3,r9,r10,lr corrupted
> + */
> +ENTRY(cpu_suspend)
> + ? ? ? mov ? ? r9, lr
> +#ifdef MULTI_CPU
> + ? ? ? ldr ? ? r10, =processor
> + ? ? ? mov ? ? r2, sp ? ? ? ? ? ? ? ? ?@ current virtual SP
> + ? ? ? ldr ? ? r0, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
> + ? ? ? ldr ? ? ip, [r10, #CPU_DO_RESUME] @ virtual resume function
> + ? ? ? sub ? ? sp, sp, r0 ? ? ? ? ? ? ?@ allocate CPU state on stack
> + ? ? ? mov ? ? r0, sp ? ? ? ? ? ? ? ? ?@ save pointer
> + ? ? ? add ? ? ip, ip, r1 ? ? ? ? ? ? ?@ convert resume fn to phys
> + ? ? ? stmfd ? sp!, {r1, r2, r3, ip} ? @ save v:p, virt SP, retfn, phys resume fn
> + ? ? ? ldr ? ? r3, =sleep_save_sp
> + ? ? ? add ? ? r2, sp, r1 ? ? ? ? ? ? ?@ convert SP to phys
> + ? ? ? str ? ? r2, [r3] ? ? ? ? ? ? ? ?@ save phys SP
> + ? ? ? mov ? ? lr, pc
> + ? ? ? ldr ? ? pc, [r10, #CPU_DO_SUSPEND] @ save CPU state
> +#else
> + ? ? ? mov ? ? r2, sp ? ? ? ? ? ? ? ? ?@ current virtual SP
> + ? ? ? ldr ? ? r0, =cpu_suspend_size
> + ? ? ? sub ? ? sp, sp, r0 ? ? ? ? ? ? ?@ allocate CPU state on stack
> + ? ? ? mov ? ? r0, sp ? ? ? ? ? ? ? ? ?@ save pointer
> + ? ? ? stmfd ? sp!, {r1, r2, r3} ? ? ? @ save v:p, virt SP, return fn
> + ? ? ? ldr ? ? r3, =sleep_save_sp
> + ? ? ? add ? ? r2, sp, r1 ? ? ? ? ? ? ?@ convert SP to phys
> + ? ? ? str ? ? r2, [r3] ? ? ? ? ? ? ? ?@ save phys SP
> + ? ? ? bl ? ? ?cpu_do_suspend
> +#endif
> +
> + ? ? ? @ flush data cache
> +#ifdef MULTI_CACHE
> + ? ? ? ldr ? ? r10, =cpu_cache
> + ? ? ? mov ? ? lr, r9
> + ? ? ? ldr ? ? pc, [r10, #CACHE_FLUSH_KERN_ALL]
> +#else
> + ? ? ? mov ? ? lr, r9
> + ? ? ? b ? ? ? __cpuc_flush_kern_all
> +#endif
> +ENDPROC(cpu_suspend)
> + ? ? ? .ltorg
> +
> +/*
> + * r0 = control register value
> + * r1 = v:p offset (preserved by cpu_do_resume)
> + * r2 = phys page table base
> + * r3 = L1 section flags
> + */
> +ENTRY(cpu_resume_mmu)
> + ? ? ? adr ? ? r4, cpu_resume_turn_mmu_on
> + ? ? ? mov ? ? r4, r4, lsr #20
> + ? ? ? orr ? ? r3, r3, r4, lsl #20
> + ? ? ? ldr ? ? r5, [r2, r4, lsl #2] ? ?@ save old mapping
> + ? ? ? str ? ? r3, [r2, r4, lsl #2] ? ?@ setup 1:1 mapping for mmu code
> + ? ? ? sub ? ? r2, r2, r1
> + ? ? ? ldr ? ? r3, =cpu_resume_after_mmu
> + ? ? ? b ? ? ? cpu_resume_turn_mmu_on
> +ENDPROC(cpu_resume_mmu)
> + ? ? ? .ltorg
> + ? ? ? .align ?5
> +cpu_resume_turn_mmu_on:
> + ? ? ? mcr ? ? p15, 0, r0, c1, c0, 0 ? @ turn on MMU, caches, etc
> + ? ? ? mrc ? ? p15, 0, r0, c0, c0, 0 ? @ read id reg
> + ? ? ? mov ? ? r0, r0
> + ? ? ? mov ? ? r0, r0
> + ? ? ? mov ? ? pc, r3 ? ? ? ? ? ? ? ? ?@ jump to virtual address
> +ENDPROC(cpu_resume_turn_mmu_on)
> +cpu_resume_after_mmu:
> + ? ? ? str ? ? r5, [r2, r4, lsl #2] ? ?@ restore old mapping
> +#ifdef MULTI_CACHE
> + ? ? ? ldr ? ? r10, =cpu_cache
> + ? ? ? ldr ? ? pc, [r10, #CACHE_FLUSH_KERN_ALL]
> +#else
> + ? ? ? b ? ? ? __cpuc_flush_kern_all
> +#endif
> +
> +/*
> + * Note: Yes, part of the following code is located into the .data section.
> + * ? ? ? This is to allow sleep_save_sp to be accessed with a relative load
> + * ? ? ? while we can't rely on any MMU translation. ?We could have put
> + * ? ? ? sleep_save_sp in the .text section as well, but some setups might
> + * ? ? ? insist on it to be truly read-only.
> + */
> + ? ? ? .data
> + ? ? ? .align
> +ENTRY(cpu_resume)
> + ? ? ? ldr ? ? r0, sleep_save_sp ? ? ? @ stack phys addr
> + ? ? ? msr ? ? cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
> +#ifdef MULTI_CPU
> + ? ? ? ldmia ? r0!, {r1, sp, lr, pc} ? @ load v:p, stack, return fn, resume fn
> +#else
> + ? ? ? ldmia ? r0!, {r1, sp, lr} ? ? ? @ load v:p, stack, return fn
> + ? ? ? b ? ? ? cpu_do_resume
> +#endif
> +ENDPROC(cpu_resume)
> +
> +sleep_save_sp:
> + ? ? ? .word ? 0 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ preserve stack phys ptr here
> diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
> index bcf748d..226e3d8 100644
> --- a/arch/arm/mm/proc-arm1020.S
> +++ b/arch/arm/mm/proc-arm1020.S
> @@ -493,6 +493,9 @@ arm1020_processor_functions:
> ? ? ? ?.word ? cpu_arm1020_dcache_clean_area
> ? ? ? ?.word ? cpu_arm1020_switch_mm
> ? ? ? ?.word ? cpu_arm1020_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm1020_processor_functions, . - arm1020_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
> index ab7ec26..86d9c2c 100644
> --- a/arch/arm/mm/proc-arm1020e.S
> +++ b/arch/arm/mm/proc-arm1020e.S
> @@ -474,6 +474,9 @@ arm1020e_processor_functions:
> ? ? ? ?.word ? cpu_arm1020e_dcache_clean_area
> ? ? ? ?.word ? cpu_arm1020e_switch_mm
> ? ? ? ?.word ? cpu_arm1020e_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm1020e_processor_functions, . - arm1020e_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
> index 831c5e5..83d3dd3 100644
> --- a/arch/arm/mm/proc-arm1022.S
> +++ b/arch/arm/mm/proc-arm1022.S
> @@ -457,6 +457,9 @@ arm1022_processor_functions:
> ? ? ? ?.word ? cpu_arm1022_dcache_clean_area
> ? ? ? ?.word ? cpu_arm1022_switch_mm
> ? ? ? ?.word ? cpu_arm1022_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm1022_processor_functions, . - arm1022_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
> index e3f7e9a..686043e 100644
> --- a/arch/arm/mm/proc-arm1026.S
> +++ b/arch/arm/mm/proc-arm1026.S
> @@ -452,6 +452,9 @@ arm1026_processor_functions:
> ? ? ? ?.word ? cpu_arm1026_dcache_clean_area
> ? ? ? ?.word ? cpu_arm1026_switch_mm
> ? ? ? ?.word ? cpu_arm1026_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm1026_processor_functions, . - arm1026_processor_functions
>
> ? ? ? ?.section .rodata
> diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
> index 6a7be18..5f79dc4 100644
> --- a/arch/arm/mm/proc-arm6_7.S
> +++ b/arch/arm/mm/proc-arm6_7.S
> @@ -284,6 +284,9 @@ ENTRY(arm6_processor_functions)
> ? ? ? ? ? ? ? ?.word ? cpu_arm6_dcache_clean_area
> ? ? ? ? ? ? ? ?.word ? cpu_arm6_switch_mm
> ? ? ? ? ? ? ? ?.word ? cpu_arm6_set_pte_ext
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> ? ? ? ? ? ? ? ?.size ? arm6_processor_functions, . - arm6_processor_functions
>
> ?/*
> @@ -301,6 +304,9 @@ ENTRY(arm7_processor_functions)
> ? ? ? ? ? ? ? ?.word ? cpu_arm7_dcache_clean_area
> ? ? ? ? ? ? ? ?.word ? cpu_arm7_switch_mm
> ? ? ? ? ? ? ? ?.word ? cpu_arm7_set_pte_ext
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> ? ? ? ? ? ? ? ?.size ? arm7_processor_functions, . - arm7_processor_functions
>
> ? ? ? ? ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
> index c285395..665266d 100644
> --- a/arch/arm/mm/proc-arm720.S
> +++ b/arch/arm/mm/proc-arm720.S
> @@ -185,6 +185,9 @@ ENTRY(arm720_processor_functions)
> ? ? ? ? ? ? ? ?.word ? cpu_arm720_dcache_clean_area
> ? ? ? ? ? ? ? ?.word ? cpu_arm720_switch_mm
> ? ? ? ? ? ? ? ?.word ? cpu_arm720_set_pte_ext
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> ? ? ? ? ? ? ? ?.size ? arm720_processor_functions, . - arm720_processor_functions
>
> ? ? ? ? ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
> index 38b27dc..6f9d12e 100644
> --- a/arch/arm/mm/proc-arm740.S
> +++ b/arch/arm/mm/proc-arm740.S
> @@ -130,6 +130,9 @@ ENTRY(arm740_processor_functions)
> ? ? ? ?.word ? cpu_arm740_dcache_clean_area
> ? ? ? ?.word ? cpu_arm740_switch_mm
> ? ? ? ?.word ? 0 ? ? ? ? ? ? ? ? ? ? ? @ cpu_*_set_pte
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm740_processor_functions, . - arm740_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
> index 0c9786d..e4c165c 100644
> --- a/arch/arm/mm/proc-arm7tdmi.S
> +++ b/arch/arm/mm/proc-arm7tdmi.S
> @@ -70,6 +70,9 @@ ENTRY(arm7tdmi_processor_functions)
> ? ? ? ? ? ? ? ?.word ? cpu_arm7tdmi_dcache_clean_area
> ? ? ? ? ? ? ? ?.word ? cpu_arm7tdmi_switch_mm
> ? ? ? ? ? ? ? ?.word ? 0 ? ? ? ? ? ? ? @ cpu_*_set_pte
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> ? ? ? ? ? ? ? ?.size ? arm7tdmi_processor_functions, . - arm7tdmi_processor_functions
>
> ? ? ? ? ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
> index 6109f27..b2705de 100644
> --- a/arch/arm/mm/proc-arm920.S
> +++ b/arch/arm/mm/proc-arm920.S
> @@ -387,6 +387,40 @@ ENTRY(cpu_arm920_set_pte_ext)
> ?#endif
> ? ? ? ?mov ? ? pc, lr
>
> +/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
> +.globl arm920_suspend_size
> +.equ ? arm920_suspend_size, 4 * 3
> +#ifdef CONFIG_PM
> +ENTRY(arm920_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r7, lr}
> + ? ? ? mrc ? ? p15, 0, r4, c13, c0, 0 ?@ PID
> + ? ? ? mrc ? ? p15, 0, r5, c3, c0, 0 ? @ Domain ID
> + ? ? ? mrc ? ? p15, 0, r6, c2, c0, 0 ? @ TTB address
> + ? ? ? mrc ? ? p15, 0, r7, c1, c0, 0 ? @ Control register
> + ? ? ? stmia ? r0, {r4 - r7}
> + ? ? ? ldmfd ? sp!, {r4 - r7, pc}
> +ENDPROC(arm920_do_suspend)
> +
> +ENTRY(arm920_do_resume)
> + ? ? ? mov ? ? ip, #0
> + ? ? ? mcr ? ? p15, 0, ip, c8, c7, 0 ? @ invalidate I+D TLBs
> + ? ? ? mcr ? ? p15, 0, ip, c7, c7, 0 ? @ invalidate I+D caches
> + ? ? ? ldmia ? r0, {r4 - r7}
> + ? ? ? mcr ? ? p15, 0, r4, c13, c0, 0 ?@ PID
> + ? ? ? mcr ? ? p15, 0, r5, c3, c0, 0 ? @ Domain ID
> + ? ? ? mcr ? ? p15, 0, r6, c2, c0, 0 ? @ TTB address
> + ? ? ? mov ? ? r0, r7 ? ? ? ? ? ? ? ? ?@ control register
> + ? ? ? mov ? ? r2, r6, lsr #14 ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \
> + ? ? ? ? ? ? ? ? ? ?PMD_SECT_CACHEABLE | PMD_BIT4 | PMD_SECT_AP_WRITE
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(arm920_do_resume)
> +#else
> +#define arm920_do_suspend ? ? ?0
> +#define arm920_do_resume ? ? ? 0
> +#endif
> +
> ? ? ? ?__CPUINIT
>
> ? ? ? ?.type ? __arm920_setup, #function
> @@ -432,6 +466,9 @@ arm920_processor_functions:
> ? ? ? ?.word ? cpu_arm920_dcache_clean_area
> ? ? ? ?.word ? cpu_arm920_switch_mm
> ? ? ? ?.word ? cpu_arm920_set_pte_ext
> + ? ? ? .word ? arm920_suspend_size
> + ? ? ? .word ? arm920_do_suspend
> + ? ? ? .word ? arm920_do_resume
> ? ? ? ?.size ? arm920_processor_functions, . - arm920_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
> index bb2f0f4..36154b1 100644
> --- a/arch/arm/mm/proc-arm922.S
> +++ b/arch/arm/mm/proc-arm922.S
> @@ -436,6 +436,9 @@ arm922_processor_functions:
> ? ? ? ?.word ? cpu_arm922_dcache_clean_area
> ? ? ? ?.word ? cpu_arm922_switch_mm
> ? ? ? ?.word ? cpu_arm922_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm922_processor_functions, . - arm922_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
> index c13e01a..89c5e00 100644
> --- a/arch/arm/mm/proc-arm925.S
> +++ b/arch/arm/mm/proc-arm925.S
> @@ -503,6 +503,9 @@ arm925_processor_functions:
> ? ? ? ?.word ? cpu_arm925_dcache_clean_area
> ? ? ? ?.word ? cpu_arm925_switch_mm
> ? ? ? ?.word ? cpu_arm925_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm925_processor_functions, . - arm925_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
> index 42eb431..3beb784 100644
> --- a/arch/arm/mm/proc-arm926.S
> +++ b/arch/arm/mm/proc-arm926.S
> @@ -401,6 +401,40 @@ ENTRY(cpu_arm926_set_pte_ext)
> ?#endif
> ? ? ? ?mov ? ? pc, lr
>
> +/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
> +.globl arm926_suspend_size
> +.equ ? arm926_suspend_size, 4 * 3
> +#ifdef CONFIG_PM
> +ENTRY(arm926_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r7, lr}
> + ? ? ? mrc ? ? p15, 0, r4, c13, c0, 0 ?@ PID
> + ? ? ? mrc ? ? p15, 0, r5, c3, c0, 0 ? @ Domain ID
> + ? ? ? mrc ? ? p15, 0, r6, c2, c0, 0 ? @ TTB address
> + ? ? ? mrc ? ? p15, 0, r7, c1, c0, 0 ? @ Control register
> + ? ? ? stmia ? r0, {r4 - r7}
> + ? ? ? ldmfd ? sp!, {r4 - r7, pc}
> +ENDPROC(arm926_do_suspend)
> +
> +ENTRY(arm926_do_resume)
> + ? ? ? mov ? ? ip, #0
> + ? ? ? mcr ? ? p15, 0, ip, c8, c7, 0 ? @ invalidate I+D TLBs
> + ? ? ? mcr ? ? p15, 0, ip, c7, c7, 0 ? @ invalidate I+D caches
> + ? ? ? ldmia ? r0, {r4 - r7}
> + ? ? ? mcr ? ? p15, 0, r4, c13, c0, 0 ?@ PID
> + ? ? ? mcr ? ? p15, 0, r5, c3, c0, 0 ? @ Domain ID
> + ? ? ? mcr ? ? p15, 0, r6, c2, c0, 0 ? @ TTB address
> + ? ? ? mov ? ? r0, r7 ? ? ? ? ? ? ? ? ?@ control register
> + ? ? ? mov ? ? r2, r6, lsr #14 ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \
> + ? ? ? ? ? ? ? ? ? ?PMD_SECT_CACHEABLE | PMD_BIT4 | PMD_SECT_AP_WRITE
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(arm926_do_resume)
> +#else
> +#define arm926_do_suspend ? ? ?0
> +#define arm926_do_resume ? ? ? 0
> +#endif
> +
> ? ? ? ?__CPUINIT
>
> ? ? ? ?.type ? __arm926_setup, #function
> @@ -456,6 +490,9 @@ arm926_processor_functions:
> ? ? ? ?.word ? cpu_arm926_dcache_clean_area
> ? ? ? ?.word ? cpu_arm926_switch_mm
> ? ? ? ?.word ? cpu_arm926_set_pte_ext
> + ? ? ? .word ? arm926_suspend_size
> + ? ? ? .word ? arm926_do_suspend
> + ? ? ? .word ? arm926_do_resume
> ? ? ? ?.size ? arm926_processor_functions, . - arm926_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
> index 7b11cdb..26aea3f 100644
> --- a/arch/arm/mm/proc-arm940.S
> +++ b/arch/arm/mm/proc-arm940.S
> @@ -363,6 +363,9 @@ ENTRY(arm940_processor_functions)
> ? ? ? ?.word ? cpu_arm940_dcache_clean_area
> ? ? ? ?.word ? cpu_arm940_switch_mm
> ? ? ? ?.word ? 0 ? ? ? ? ? ? ? @ cpu_*_set_pte
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm940_processor_functions, . - arm940_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
> index 1a5bbf0..8063345 100644
> --- a/arch/arm/mm/proc-arm946.S
> +++ b/arch/arm/mm/proc-arm946.S
> @@ -419,6 +419,9 @@ ENTRY(arm946_processor_functions)
> ? ? ? ?.word ? cpu_arm946_dcache_clean_area
> ? ? ? ?.word ? cpu_arm946_switch_mm
> ? ? ? ?.word ? 0 ? ? ? ? ? ? ? @ cpu_*_set_pte
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? arm946_processor_functions, . - arm946_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
> index db67e31..7b7ebd4 100644
> --- a/arch/arm/mm/proc-arm9tdmi.S
> +++ b/arch/arm/mm/proc-arm9tdmi.S
> @@ -70,6 +70,9 @@ ENTRY(arm9tdmi_processor_functions)
> ? ? ? ? ? ? ? ?.word ? cpu_arm9tdmi_dcache_clean_area
> ? ? ? ? ? ? ? ?.word ? cpu_arm9tdmi_switch_mm
> ? ? ? ? ? ? ? ?.word ? 0 ? ? ? ? ? ? ? @ cpu_*_set_pte
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> + ? ? ? ? ? ? ? .word ? 0
> ? ? ? ? ? ? ? ?.size ? arm9tdmi_processor_functions, . - arm9tdmi_processor_functions
>
> ? ? ? ? ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
> index 7c9ad62..fc2a4ae 100644
> --- a/arch/arm/mm/proc-fa526.S
> +++ b/arch/arm/mm/proc-fa526.S
> @@ -195,6 +195,9 @@ fa526_processor_functions:
> ? ? ? ?.word ? cpu_fa526_dcache_clean_area
> ? ? ? ?.word ? cpu_fa526_switch_mm
> ? ? ? ?.word ? cpu_fa526_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? fa526_processor_functions, . - fa526_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
> index b4597ed..d3883ee 100644
> --- a/arch/arm/mm/proc-feroceon.S
> +++ b/arch/arm/mm/proc-feroceon.S
> @@ -554,6 +554,9 @@ feroceon_processor_functions:
> ? ? ? ?.word ? cpu_feroceon_dcache_clean_area
> ? ? ? ?.word ? cpu_feroceon_switch_mm
> ? ? ? ?.word ? cpu_feroceon_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? feroceon_processor_functions, . - feroceon_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
> index 4458ee6..9d4f2ae 100644
> --- a/arch/arm/mm/proc-mohawk.S
> +++ b/arch/arm/mm/proc-mohawk.S
> @@ -388,6 +388,9 @@ mohawk_processor_functions:
> ? ? ? ?.word ? cpu_mohawk_dcache_clean_area
> ? ? ? ?.word ? cpu_mohawk_switch_mm
> ? ? ? ?.word ? cpu_mohawk_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? mohawk_processor_functions, . - mohawk_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
> index 5aa8d59..46f09ed 100644
> --- a/arch/arm/mm/proc-sa110.S
> +++ b/arch/arm/mm/proc-sa110.S
> @@ -203,6 +203,9 @@ ENTRY(sa110_processor_functions)
> ? ? ? ?.word ? cpu_sa110_dcache_clean_area
> ? ? ? ?.word ? cpu_sa110_switch_mm
> ? ? ? ?.word ? cpu_sa110_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? sa110_processor_functions, . - sa110_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
> index 2ac4e6f..74483d1 100644
> --- a/arch/arm/mm/proc-sa1100.S
> +++ b/arch/arm/mm/proc-sa1100.S
> @@ -169,6 +169,42 @@ ENTRY(cpu_sa1100_set_pte_ext)
> ?#endif
> ? ? ? ?mov ? ? pc, lr
>
> +.globl cpu_sa1100_suspend_size
> +.equ ? cpu_sa1100_suspend_size, 4*4
> +#ifdef CONFIG_PM
> +ENTRY(cpu_sa1100_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r7, lr}
> + ? ? ? mrc ? ? p15, 0, r4, c3, c0, 0 ? ? ? ? ? @ domain ID
> + ? ? ? mrc ? ? p15, 0, r5, c2, c0, 0 ? ? ? ? ? @ translation table base addr
> + ? ? ? mrc ? ? p15, 0, r6, c13, c0, 0 ? ? ? ? ?@ PID
> + ? ? ? mrc ? ? p15, 0, r7, c1, c0, 0 ? ? ? ? ? @ control reg
> + ? ? ? stmia ? r0, {r4 - r7} ? ? ? ? ? ? ? ? ? @ store cp regs
> + ? ? ? ldmfd ? sp!, {r4 - r7, pc}
> +ENDPROC(cpu_sa1100_do_suspend)
> +
> +ENTRY(cpu_sa1100_do_resume)
> + ? ? ? ldmia ? r0, {r4 - r7} ? ? ? ? ? ? ? ? ? @ load cp regs
> + ? ? ? mov ? ? r1, #0
> + ? ? ? mcr ? ? p15, 0, r1, c8, c7, 0 ? ? ? ? ? @ flush I+D TLBs
> + ? ? ? mcr ? ? p15, 0, r1, c7, c7, 0 ? ? ? ? ? @ flush I&D cache
> + ? ? ? mcr ? ? p15, 0, r1, c9, c0, 0 ? ? ? ? ? @ invalidate RB
> + ? ? ? mcr ? ? p15, 0, r1, c9, c0, 5 ? ? ? ? ? @ allow user space to use RB
> +
> + ? ? ? mcr ? ? p15, 0, r4, c3, c0, 0 ? ? ? ? ? @ domain ID
> + ? ? ? mcr ? ? p15, 0, r5, c2, c0, 0 ? ? ? ? ? @ translation table base addr
> + ? ? ? mcr ? ? p15, 0, r6, c13, c0, 0 ? ? ? ? ?@ PID
> + ? ? ? mov ? ? r0, r7 ? ? ? ? ? ? ? ? ? ? ? ? ?@ control register
> + ? ? ? mov ? ? r2, r5, lsr #14 ? ? ? ? ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \
> + ? ? ? ? ? ? ? ? ? ?PMD_SECT_CACHEABLE | PMD_SECT_AP_WRITE
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(cpu_sa1100_do_resume)
> +#else
> +#define cpu_sa1100_do_suspend ?0
> +#define cpu_sa1100_do_resume ? 0
> +#endif
> +
> ? ? ? ?__CPUINIT
>
> ? ? ? ?.type ? __sa1100_setup, #function
> @@ -218,6 +254,9 @@ ENTRY(sa1100_processor_functions)
> ? ? ? ?.word ? cpu_sa1100_dcache_clean_area
> ? ? ? ?.word ? cpu_sa1100_switch_mm
> ? ? ? ?.word ? cpu_sa1100_set_pte_ext
> + ? ? ? .word ? cpu_sa1100_suspend_size
> + ? ? ? .word ? cpu_sa1100_do_suspend
> + ? ? ? .word ? cpu_sa1100_do_resume
> ? ? ? ?.size ? sa1100_processor_functions, . - sa1100_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
> index 59a7e1f..832b6bd 100644
> --- a/arch/arm/mm/proc-v6.S
> +++ b/arch/arm/mm/proc-v6.S
> @@ -121,6 +121,53 @@ ENTRY(cpu_v6_set_pte_ext)
> ?#endif
> ? ? ? ?mov ? ? pc, lr
>
> +/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
> +.globl cpu_v6_suspend_size
> +.equ ? cpu_v6_suspend_size, 4 * 8
> +#ifdef CONFIG_PM
> +ENTRY(cpu_v6_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r11, lr}
> + ? ? ? mrc ? ? p15, 0, r4, c13, c0, 0 ?@ FCSE/PID
> + ? ? ? mrc ? ? p15, 0, r5, c13, c0, 1 ?@ Context ID
> + ? ? ? mrc ? ? p15, 0, r6, c3, c0, 0 ? @ Domain ID
> + ? ? ? mrc ? ? p15, 0, r7, c2, c0, 0 ? @ Translation table base 0
> + ? ? ? mrc ? ? p15, 0, r8, c2, c0, 1 ? @ Translation table base 1
> + ? ? ? mrc ? ? p15, 0, r9, c1, c0, 1 ? @ auxillary control register
> + ? ? ? mrc ? ? p15, 0, r10, c1, c0, 2 ?@ co-processor access control
> + ? ? ? mrc ? ? p15, 0, r11, c1, c0, 0 ?@ control register
> + ? ? ? stmia ? r0, {r4 - r11}
> + ? ? ? ldmfd ? sp!, {r4- r11, pc}
> +ENDPROC(cpu_v6_do_suspend)
> +
> +ENTRY(cpu_v6_do_resume)
> + ? ? ? mov ? ? ip, #0
> + ? ? ? mcr ? ? p15, 0, ip, c7, c14, 0 ?@ clean+invalidate D cache
> + ? ? ? mcr ? ? p15, 0, ip, c7, c5, 0 ? @ invalidate I cache
> + ? ? ? mcr ? ? p15, 0, ip, c7, c15, 0 ?@ clean+invalidate cache
> + ? ? ? mcr ? ? p15, 0, ip, c7, c10, 4 ?@ drain write buffer
> + ? ? ? ldmia ? r0, {r4 - r11}
> + ? ? ? mcr ? ? p15, 0, r4, c13, c0, 0 ?@ FCSE/PID
> + ? ? ? mcr ? ? p15, 0, r5, c13, c0, 1 ?@ Context ID
> + ? ? ? mcr ? ? p15, 0, r6, c3, c0, 0 ? @ Domain ID
> + ? ? ? mcr ? ? p15, 0, r7, c2, c0, 0 ? @ Translation table base 0
> + ? ? ? mcr ? ? p15, 0, r8, c2, c0, 1 ? @ Translation table base 1
> + ? ? ? mcr ? ? p15, 0, r9, c1, c0, 1 ? @ auxillary control register
> + ? ? ? mcr ? ? p15, 0, r10, c1, c0, 2 ?@ co-processor access control
> + ? ? ? mcr ? ? p15, 0, ip, c2, c0, 2 ? @ TTB control register
> + ? ? ? mcr ? ? p15, 0, ip, c7, c5, 4 ? @ ISB
> + ? ? ? mov ? ? r0, r11 ? ? ? ? ? ? ? ? @ control register
> + ? ? ? mov ? ? r2, r7, lsr #14 ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, cpu_resume_l1_flags
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(cpu_v6_do_resume)
> +cpu_resume_l1_flags:
> + ? ? ? ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_SMP)
> + ? ? ? ALT_UP(.long ?PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_UP)
> +#else
> +#define cpu_v6_do_suspend 0
> +#define cpu_v6_do_resume 0
> +#endif
>
>
> ? ? ? ?.type ? cpu_v6_name, #object
> @@ -206,6 +253,9 @@ ENTRY(v6_processor_functions)
> ? ? ? ?.word ? cpu_v6_dcache_clean_area
> ? ? ? ?.word ? cpu_v6_switch_mm
> ? ? ? ?.word ? cpu_v6_set_pte_ext
> + ? ? ? .word ? cpu_v6_suspend_size
> + ? ? ? .word ? cpu_v6_do_suspend
> + ? ? ? .word ? cpu_v6_do_resume
> ? ? ? ?.size ? v6_processor_functions, . - v6_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
> index 0c1172b..a5187dd 100644
> --- a/arch/arm/mm/proc-v7.S
> +++ b/arch/arm/mm/proc-v7.S
> @@ -171,6 +171,87 @@ cpu_v7_name:
> ? ? ? ?.ascii ?"ARMv7 Processor"
> ? ? ? ?.align
>
> + ? ? ? /*
> + ? ? ? ?* Memory region attributes with SCTLR.TRE=1
> + ? ? ? ?*
> + ? ? ? ?* ? n = TEX[0],C,B
> + ? ? ? ?* ? TR = PRRR[2n+1:2n] ? ? ? ? - memory type
> + ? ? ? ?* ? IR = NMRR[2n+1:2n] ? ? ? ? - inner cacheable property
> + ? ? ? ?* ? OR = NMRR[2n+17:2n+16] ? ? - outer cacheable property
> + ? ? ? ?*
> + ? ? ? ?* ? ? ? ? ? ? ? ? ? ? ?n ? ? ? TR ? ? ?IR ? ? ?OR
> + ? ? ? ?* ? UNCACHED ? ? ? ? ? 000 ? ? 00
> + ? ? ? ?* ? BUFFERABLE ? ? ? ? 001 ? ? 10 ? ? ?00 ? ? ?00
> + ? ? ? ?* ? WRITETHROUGH ? ? ? 010 ? ? 10 ? ? ?10 ? ? ?10
> + ? ? ? ?* ? WRITEBACK ? ? ? ? ?011 ? ? 10 ? ? ?11 ? ? ?11
> + ? ? ? ?* ? reserved ? ? ? ? ? 110
> + ? ? ? ?* ? WRITEALLOC ? ? ? ? 111 ? ? 10 ? ? ?01 ? ? ?01
> + ? ? ? ?* ? DEV_SHARED ? ? ? ? 100 ? ? 01
> + ? ? ? ?* ? DEV_NONSHARED ? ? ?100 ? ? 01
> + ? ? ? ?* ? DEV_WC ? ? ? ? ? ? 001 ? ? 10
> + ? ? ? ?* ? DEV_CACHED ? ? ? ? 011 ? ? 10
> + ? ? ? ?*
> + ? ? ? ?* Other attributes:
> + ? ? ? ?*
> + ? ? ? ?* ? DS0 = PRRR[16] = 0 ? ? ? ? - device shareable property
> + ? ? ? ?* ? DS1 = PRRR[17] = 1 ? ? ? ? - device shareable property
> + ? ? ? ?* ? NS0 = PRRR[18] = 0 ? ? ? ? - normal shareable property
> + ? ? ? ?* ? NS1 = PRRR[19] = 1 ? ? ? ? - normal shareable property
> + ? ? ? ?* ? NOS = PRRR[24+n] = 1 ? ? ? - not outer shareable
> + ? ? ? ?*/
> +.equ ? PRRR, ? 0xff0a81a8
> +.equ ? NMRR, ? 0x40e040e0
> +
> +/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
> +.globl cpu_v7_suspend_size
> +.equ ? cpu_v7_suspend_size, 4 * 8
> +#ifdef CONFIG_PM
> +ENTRY(cpu_v7_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r11, lr}
> + ? ? ? mrc ? ? p15, 0, r4, c13, c0, 0 ?@ FCSE/PID
> + ? ? ? mrc ? ? p15, 0, r5, c13, c0, 1 ?@ Context ID
> + ? ? ? mrc ? ? p15, 0, r6, c3, c0, 0 ? @ Domain ID
> + ? ? ? mrc ? ? p15, 0, r7, c2, c0, 0 ? @ TTB 0
> + ? ? ? mrc ? ? p15, 0, r8, c2, c0, 1 ? @ TTB 1
> + ? ? ? mrc ? ? p15, 0, r9, c1, c0, 0 ? @ Control register
> + ? ? ? mrc ? ? p15, 0, r10, c1, c0, 1 ?@ Auxiliary control register
> + ? ? ? mrc ? ? p15, 0, r11, c1, c0, 2 ?@ Co-processor access control
> + ? ? ? stmia ? r0, {r4 - r11}
> + ? ? ? ldmfd ? sp!, {r4 - r11, pc}
> +ENDPROC(cpu_v7_do_suspend)
> +
> +ENTRY(cpu_v7_do_resume)
> + ? ? ? mov ? ? ip, #0
> + ? ? ? mcr ? ? p15, 0, ip, c8, c7, 0 ? @ invalidate TLBs
> + ? ? ? mcr ? ? p15, 0, ip, c7, c5, 0 ? @ invalidate I cache
> + ? ? ? ldmia ? r0, {r4 - r11}
> + ? ? ? mcr ? ? p15, 0, r4, c13, c0, 0 ?@ FCSE/PID
> + ? ? ? mcr ? ? p15, 0, r5, c13, c0, 1 ?@ Context ID
> + ? ? ? mcr ? ? p15, 0, r6, c3, c0, 0 ? @ Domain ID
> + ? ? ? mcr ? ? p15, 0, r7, c2, c0, 0 ? @ TTB 0
> + ? ? ? mcr ? ? p15, 0, r8, c2, c0, 1 ? @ TTB 1
> + ? ? ? mcr ? ? p15, 0, ip, c2, c0, 2 ? @ TTB control register
> + ? ? ? mcr ? ? p15, 0, r10, c1, c0, 1 ?@ Auxillary control register
> + ? ? ? mcr ? ? p15, 0, r11, c1, c0, 2 ?@ Co-processor access control
> + ? ? ? ldr ? ? r4, =PRRR ? ? ? ? ? ? ? @ PRRR
> + ? ? ? ldr ? ? r5, =NMRR ? ? ? ? ? ? ? @ NMRR
> + ? ? ? mcr ? ? p15, 0, r4, c10, c2, 0 ?@ write PRRR
> + ? ? ? mcr ? ? p15, 0, r5, c10, c2, 1 ?@ write NMRR
> + ? ? ? isb
> + ? ? ? mov ? ? r0, r9 ? ? ? ? ? ? ? ? ?@ control register
> + ? ? ? mov ? ? r2, r7, lsr #14 ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, cpu_resume_l1_flags
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(cpu_v7_do_resume)
> +cpu_resume_l1_flags:
> + ? ? ? ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_SMP)
> + ? ? ? ALT_UP(.long ?PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_UP)
> +#else
> +#define cpu_v7_do_suspend ? ? ?0
> +#define cpu_v7_do_resume ? ? ? 0
> +#endif
> +
> ? ? ? ?__CPUINIT
>
> ?/*
> @@ -276,36 +357,8 @@ __v7_setup:
> ? ? ? ?ALT_SMP(orr ? ? r4, r4, #TTB_FLAGS_SMP)
> ? ? ? ?ALT_UP(orr ? ? ?r4, r4, #TTB_FLAGS_UP)
> ? ? ? ?mcr ? ? p15, 0, r4, c2, c0, 1 ? ? ? ? ? @ load TTB1
> - ? ? ? /*
> - ? ? ? ?* Memory region attributes with SCTLR.TRE=1
> - ? ? ? ?*
> - ? ? ? ?* ? n = TEX[0],C,B
> - ? ? ? ?* ? TR = PRRR[2n+1:2n] ? ? ? ? - memory type
> - ? ? ? ?* ? IR = NMRR[2n+1:2n] ? ? ? ? - inner cacheable property
> - ? ? ? ?* ? OR = NMRR[2n+17:2n+16] ? ? - outer cacheable property
> - ? ? ? ?*
> - ? ? ? ?* ? ? ? ? ? ? ? ? ? ? ?n ? ? ? TR ? ? ?IR ? ? ?OR
> - ? ? ? ?* ? UNCACHED ? ? ? ? ? 000 ? ? 00
> - ? ? ? ?* ? BUFFERABLE ? ? ? ? 001 ? ? 10 ? ? ?00 ? ? ?00
> - ? ? ? ?* ? WRITETHROUGH ? ? ? 010 ? ? 10 ? ? ?10 ? ? ?10
> - ? ? ? ?* ? WRITEBACK ? ? ? ? ?011 ? ? 10 ? ? ?11 ? ? ?11
> - ? ? ? ?* ? reserved ? ? ? ? ? 110
> - ? ? ? ?* ? WRITEALLOC ? ? ? ? 111 ? ? 10 ? ? ?01 ? ? ?01
> - ? ? ? ?* ? DEV_SHARED ? ? ? ? 100 ? ? 01
> - ? ? ? ?* ? DEV_NONSHARED ? ? ?100 ? ? 01
> - ? ? ? ?* ? DEV_WC ? ? ? ? ? ? 001 ? ? 10
> - ? ? ? ?* ? DEV_CACHED ? ? ? ? 011 ? ? 10
> - ? ? ? ?*
> - ? ? ? ?* Other attributes:
> - ? ? ? ?*
> - ? ? ? ?* ? DS0 = PRRR[16] = 0 ? ? ? ? - device shareable property
> - ? ? ? ?* ? DS1 = PRRR[17] = 1 ? ? ? ? - device shareable property
> - ? ? ? ?* ? NS0 = PRRR[18] = 0 ? ? ? ? - normal shareable property
> - ? ? ? ?* ? NS1 = PRRR[19] = 1 ? ? ? ? - normal shareable property
> - ? ? ? ?* ? NOS = PRRR[24+n] = 1 ? ? ? - not outer shareable
> - ? ? ? ?*/
> - ? ? ? ldr ? ? r5, =0xff0a81a8 ? ? ? ? ? ? ? ? @ PRRR
> - ? ? ? ldr ? ? r6, =0x40e040e0 ? ? ? ? ? ? ? ? @ NMRR
> + ? ? ? ldr ? ? r5, =PRRR ? ? ? ? ? ? ? ? ? ? ? @ PRRR
> + ? ? ? ldr ? ? r6, =NMRR ? ? ? ? ? ? ? ? ? ? ? @ NMRR
> ? ? ? ?mcr ? ? p15, 0, r5, c10, c2, 0 ? ? ? ? ?@ write PRRR
> ? ? ? ?mcr ? ? p15, 0, r6, c10, c2, 1 ? ? ? ? ?@ write NMRR
> ?#endif
> @@ -351,6 +404,9 @@ ENTRY(v7_processor_functions)
> ? ? ? ?.word ? cpu_v7_dcache_clean_area
> ? ? ? ?.word ? cpu_v7_switch_mm
> ? ? ? ?.word ? cpu_v7_set_pte_ext
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> + ? ? ? .word ? 0
> ? ? ? ?.size ? v7_processor_functions, . - v7_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
> index ec26355..63d8b20 100644
> --- a/arch/arm/mm/proc-xsc3.S
> +++ b/arch/arm/mm/proc-xsc3.S
> @@ -413,9 +413,52 @@ ENTRY(cpu_xsc3_set_pte_ext)
> ? ? ? ?mov ? ? pc, lr
>
> ? ? ? ?.ltorg
> -
> ? ? ? ?.align
>
> +.globl cpu_xsc3_suspend_size
> +.equ ? cpu_xsc3_suspend_size, 4 * 8
> +#ifdef CONFIG_PM
> +ENTRY(cpu_xsc3_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r10, lr}
> + ? ? ? mrc ? ? p14, 0, r4, c6, c0, 0 ? @ clock configuration, for turbo mode
> + ? ? ? mrc ? ? p15, 0, r5, c15, c1, 0 ?@ CP access reg
> + ? ? ? mrc ? ? p15, 0, r6, c13, c0, 0 ?@ PID
> + ? ? ? mrc ? ? p15, 0, r7, c3, c0, 0 ? @ domain ID
> + ? ? ? mrc ? ? p15, 0, r8, c2, c0, 0 ? @ translation table base addr
> + ? ? ? mrc ? ? p15, 0, r9, c1, c0, 1 ? @ auxiliary control reg
> + ? ? ? mrc ? ? p15, 0, r10, c1, c0, 0 ?@ control reg
> + ? ? ? bic ? ? r4, r4, #2 ? ? ? ? ? ? ?@ clear frequency change bit
> + ? ? ? stmia ? r0, {r1, r4 - r10} ? ? ?@ store v:p offset + cp regs
> + ? ? ? ldmia ? sp!, {r4 - r10, pc}
> +ENDPROC(cpu_xsc3_do_suspend)
> +
> +ENTRY(cpu_xsc3_do_resume)
> + ? ? ? ldmia ? r0, {r1, r4 - r10} ? ? ?@ load v:p offset + cp regs
> + ? ? ? mov ? ? ip, #0
> + ? ? ? mcr ? ? p15, 0, ip, c7, c7, 0 ? @ invalidate I & D caches, BTB
> + ? ? ? mcr ? ? p15, 0, ip, c7, c10, 4 ?@ drain write (&fill) buffer
> + ? ? ? mcr ? ? p15, 0, ip, c7, c5, 4 ? @ flush prefetch buffer
> + ? ? ? mcr ? ? p15, 0, ip, c8, c7, 0 ? @ invalidate I & D TLBs
> + ? ? ? mcr ? ? p14, 0, r4, c6, c0, 0 ? @ clock configuration, turbo mode.
> + ? ? ? mcr ? ? p15, 0, r5, c15, c1, 0 ?@ CP access reg
> + ? ? ? mcr ? ? p15, 0, r6, c13, c0, 0 ?@ PID
> + ? ? ? mcr ? ? p15, 0, r7, c3, c0, 0 ? @ domain ID
> + ? ? ? mcr ? ? p15, 0, r8, c2, c0, 0 ? @ translation table base addr
> + ? ? ? mcr ? ? p15, 0, r9, c1, c0, 1 ? @ auxiliary control reg
> +
> + ? ? ? @ temporarily map resume_turn_on_mmu into the page table,
> + ? ? ? @ otherwise prefetch abort occurs after MMU is turned on
> + ? ? ? mov ? ? r0, r10 ? ? ? ? ? ? ? ? @ control register
> + ? ? ? mov ? ? r2, r8, lsr #14 ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, =0x542e ? ? ? ? ? ? @ section flags
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(cpu_xsc3_do_resume)
> +#else
> +#define cpu_xsc3_do_suspend ? ?0
> +#define cpu_xsc3_do_resume ? ? 0
> +#endif
> +
> ? ? ? ?__CPUINIT
>
> ? ? ? ?.type ? __xsc3_setup, #function
> @@ -476,6 +519,9 @@ ENTRY(xsc3_processor_functions)
> ? ? ? ?.word ? cpu_xsc3_dcache_clean_area
> ? ? ? ?.word ? cpu_xsc3_switch_mm
> ? ? ? ?.word ? cpu_xsc3_set_pte_ext
> + ? ? ? .word ? cpu_xsc3_suspend_size
> + ? ? ? .word ? cpu_xsc3_do_suspend
> + ? ? ? .word ? cpu_xsc3_do_resume
> ? ? ? ?.size ? xsc3_processor_functions, . - xsc3_processor_functions
>
> ? ? ? ?.section ".rodata"
> diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
> index 5a37c5e..086038c 100644
> --- a/arch/arm/mm/proc-xscale.S
> +++ b/arch/arm/mm/proc-xscale.S
> @@ -513,11 +513,49 @@ ENTRY(cpu_xscale_set_pte_ext)
> ? ? ? ?xscale_set_pte_ext_epilogue
> ? ? ? ?mov ? ? pc, lr
>
> -
> ? ? ? ?.ltorg
> -
> ? ? ? ?.align
>
> +.globl cpu_xscale_suspend_size
> +.equ ? cpu_xscale_suspend_size, 4 * 7
> +#ifdef CONFIG_PM
> +ENTRY(cpu_xscale_do_suspend)
> + ? ? ? stmfd ? sp!, {r4 - r10, lr}
> + ? ? ? mrc ? ? p14, 0, r4, c6, c0, 0 ? @ clock configuration, for turbo mode
> + ? ? ? mrc ? ? p15, 0, r5, c15, c1, 0 ?@ CP access reg
> + ? ? ? mrc ? ? p15, 0, r6, c13, c0, 0 ?@ PID
> + ? ? ? mrc ? ? p15, 0, r7, c3, c0, 0 ? @ domain ID
> + ? ? ? mrc ? ? p15, 0, r8, c2, c0, 0 ? @ translation table base addr
> + ? ? ? mrc ? ? p15, 0, r9, c1, c1, 0 ? @ auxiliary control reg
> + ? ? ? mrc ? ? p15, 0, r10, c1, c0, 0 ?@ control reg
> + ? ? ? bic ? ? r4, r4, #2 ? ? ? ? ? ? ?@ clear frequency change bit
> + ? ? ? stmia ? r0, {r4 - r10} ? ? ? ? ?@ store cp regs
> + ? ? ? ldmfd ? sp!, {r4 - r10, pc}
> +ENDPROC(cpu_xscale_do_suspend)
> +
> +ENTRY(cpu_xscale_do_resume)
> + ? ? ? ldmia ? r0, {r4 - r10} ? ? ? ? ?@ load cp regs
> + ? ? ? mov ? ? ip, #0
> + ? ? ? mcr ? ? p15, 0, ip, c8, c7, 0 ? @ invalidate I & D TLBs
> + ? ? ? mcr ? ? p15, 0, ip, c7, c7, 0 ? @ invalidate I & D caches, BTB
> + ? ? ? mcr ? ? p14, 0, r4, c6, c0, 0 ? @ clock configuration, turbo mode.
> + ? ? ? mcr ? ? p15, 0, r5, c15, c1, 0 ?@ CP access reg
> + ? ? ? mcr ? ? p15, 0, r6, c13, c0, 0 ?@ PID
> + ? ? ? mcr ? ? p15, 0, r7, c3, c0, 0 ? @ domain ID
> + ? ? ? mcr ? ? p15, 0, r8, c2, c0, 0 ? @ translation table base addr
> + ? ? ? mcr ? ? p15, 0, r9, c1, c1, 0 ? @ auxiliary control reg
> + ? ? ? mov ? ? r0, r10 ? ? ? ? ? ? ? ? @ control register
> + ? ? ? mov ? ? r2, r8, lsr #14 ? ? ? ? @ get TTB0 base
> + ? ? ? mov ? ? r2, r2, lsl #14
> + ? ? ? ldr ? ? r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \
> + ? ? ? ? ? ? ? ? ? ?PMD_SECT_CACHEABLE | PMD_SECT_AP_WRITE
> + ? ? ? b ? ? ? cpu_resume_mmu
> +ENDPROC(cpu_xscale_do_resume)
> +#else
> +#define cpu_xscale_do_suspend ?0
> +#define cpu_xscale_do_resume ? 0
> +#endif
> +
> ? ? ? ?__CPUINIT
>
> ? ? ? ?.type ? __xscale_setup, #function
> @@ -565,6 +603,9 @@ ENTRY(xscale_processor_functions)
> ? ? ? ?.word ? cpu_xscale_dcache_clean_area
> ? ? ? ?.word ? cpu_xscale_switch_mm
> ? ? ? ?.word ? cpu_xscale_set_pte_ext
> + ? ? ? .word ? cpu_xscale_suspend_size
> + ? ? ? .word ? cpu_xscale_do_suspend
> + ? ? ? .word ? cpu_xscale_do_resume
> ? ? ? ?.size ? xscale_processor_functions, . - xscale_processor_functions
>
> ? ? ? ?.section ".rodata"
> --
> 1.6.2.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

Acked-by: Colin Cross <ccross@android.com>

Tested with idle and suspend on Tegra 2.

^ permalink raw reply

* [PATCH 1/6] ARM: move cache/processor/fault glue to separate include files
From: Colin Cross @ 2011-02-12  2:52 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <E1Pnvgc-0002yU-Gr@rmk-PC.arm.linux.org.uk>

On Fri, Feb 11, 2011 at 8:17 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> This allows the cache/processor/fault glue to be more easily used
> from assembler code.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> ?arch/arm/include/asm/cacheflush.h ?| ?133 +----------------
> ?arch/arm/include/asm/cpu-multi32.h | ? 69 --------
> ?arch/arm/include/asm/cpu-single.h ?| ? 44 ------
> ?arch/arm/include/asm/glue-cache.h ?| ?146 ++++++++++++++++++
> ?arch/arm/include/asm/glue-df.h ? ? | ?110 +++++++++++++
> ?arch/arm/include/asm/glue-pf.h ? ? | ? 57 +++++++
> ?arch/arm/include/asm/glue-proc.h ? | ?261 +++++++++++++++++++++++++++++++
> ?arch/arm/include/asm/glue.h ? ? ? ?| ?138 -----------------
> ?arch/arm/include/asm/proc-fns.h ? ?| ?299 ++++++++----------------------------
> ?arch/arm/kernel/asm-offsets.c ? ? ?| ? ?2 +
> ?arch/arm/kernel/entry-armv.S ? ? ? | ? ?3 +-
> ?11 files changed, 644 insertions(+), 618 deletions(-)
> ?delete mode 100644 arch/arm/include/asm/cpu-multi32.h
> ?delete mode 100644 arch/arm/include/asm/cpu-single.h
> ?create mode 100644 arch/arm/include/asm/glue-cache.h
> ?create mode 100644 arch/arm/include/asm/glue-df.h
> ?create mode 100644 arch/arm/include/asm/glue-pf.h
> ?create mode 100644 arch/arm/include/asm/glue-proc.h
>
> diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
> index 3acd8fa..18a5664 100644
> --- a/arch/arm/include/asm/cacheflush.h
> +++ b/arch/arm/include/asm/cacheflush.h
> @@ -12,7 +12,7 @@
>
> ?#include <linux/mm.h>
>
> -#include <asm/glue.h>
> +#include <asm/glue-cache.h>
> ?#include <asm/shmparam.h>
> ?#include <asm/cachetype.h>
> ?#include <asm/outercache.h>
> @@ -20,123 +20,6 @@
> ?#define CACHE_COLOUR(vaddr) ? ?((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
>
> ?/*
> - * ? ? Cache Model
> - * ? ? ===========
> - */
> -#undef _CACHE
> -#undef MULTI_CACHE
> -
> -#if defined(CONFIG_CPU_CACHE_V3)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE v3
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_CACHE_V4)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE v4
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
> - ? ?defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
> - ? ?defined(CONFIG_CPU_ARM1026)
> -# define MULTI_CACHE 1
> -#endif
> -
> -#if defined(CONFIG_CPU_FA526)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE fa
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_ARM926T)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE arm926
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_ARM940T)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE arm940
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_ARM946E)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE arm946
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_CACHE_V4WB)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE v4wb
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_XSCALE)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE xscale
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_XSC3)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE xsc3
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_MOHAWK)
> -# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -# else
> -# ?define _CACHE mohawk
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_FEROCEON)
> -# define MULTI_CACHE 1
> -#endif
> -
> -#if defined(CONFIG_CPU_V6)
> -//# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -//# else
> -//# ?define _CACHE v6
> -//# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_V7)
> -//# ifdef _CACHE
> -# ?define MULTI_CACHE 1
> -//# else
> -//# ?define _CACHE v7
> -//# endif
> -#endif
> -
> -#if !defined(_CACHE) && !defined(MULTI_CACHE)
> -#error Unknown cache maintainence model
> -#endif
> -
> -/*
> ?* This flag is used to indicate that the page pointed to by a pte is clean
> ?* and does not require cleaning before returning it to the user.
> ?*/
> @@ -249,19 +132,11 @@ extern struct cpu_cache_fns cpu_cache;
> ?* visible to the CPU.
> ?*/
> ?#define dmac_map_area ? ? ? ? ? ? ? ? ?cpu_cache.dma_map_area
> -#define dmac_unmap_area ? ? ? ? ? ? ? ?cpu_cache.dma_unmap_area
> +#define dmac_unmap_area ? ? ? ? ? ? ? ? ? ? ? ?cpu_cache.dma_unmap_area
> ?#define dmac_flush_range ? ? ? ? ? ? ? cpu_cache.dma_flush_range
>
> ?#else
>
> -#define __cpuc_flush_icache_all ? ? ? ? ? ? ? ?__glue(_CACHE,_flush_icache_all)
> -#define __cpuc_flush_kern_all ? ? ? ? ?__glue(_CACHE,_flush_kern_cache_all)
> -#define __cpuc_flush_user_all ? ? ? ? ?__glue(_CACHE,_flush_user_cache_all)
> -#define __cpuc_flush_user_range ? ? ? ? ? ? ? ?__glue(_CACHE,_flush_user_cache_range)
> -#define __cpuc_coherent_kern_range ? ? __glue(_CACHE,_coherent_kern_range)
> -#define __cpuc_coherent_user_range ? ? __glue(_CACHE,_coherent_user_range)
> -#define __cpuc_flush_dcache_area ? ? ? __glue(_CACHE,_flush_kern_dcache_area)
> -
> ?extern void __cpuc_flush_icache_all(void);
> ?extern void __cpuc_flush_kern_all(void);
> ?extern void __cpuc_flush_user_all(void);
> @@ -276,10 +151,6 @@ extern void __cpuc_flush_dcache_area(void *, size_t);
> ?* is visible to DMA, or data written by DMA to system memory is
> ?* visible to the CPU.
> ?*/
> -#define dmac_map_area ? ? ? ? ? ? ? ? ?__glue(_CACHE,_dma_map_area)
> -#define dmac_unmap_area ? ? ? ? ? ? ? ?__glue(_CACHE,_dma_unmap_area)
> -#define dmac_flush_range ? ? ? ? ? ? ? __glue(_CACHE,_dma_flush_range)
> -
> ?extern void dmac_map_area(const void *, size_t, int);
> ?extern void dmac_unmap_area(const void *, size_t, int);
> ?extern void dmac_flush_range(const void *, const void *);
> diff --git a/arch/arm/include/asm/cpu-multi32.h b/arch/arm/include/asm/cpu-multi32.h
> deleted file mode 100644
> index e2b5b0b..0000000
> --- a/arch/arm/include/asm/cpu-multi32.h
> +++ /dev/null
> @@ -1,69 +0,0 @@
> -/*
> - * ?arch/arm/include/asm/cpu-multi32.h
> - *
> - * ?Copyright (C) 2000 Russell King
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -#include <asm/page.h>
> -
> -struct mm_struct;
> -
> -/*
> - * Don't change this structure - ASM code
> - * relies on it.
> - */
> -extern struct processor {
> - ? ? ? /* MISC
> - ? ? ? ?* get data abort address/flags
> - ? ? ? ?*/
> - ? ? ? void (*_data_abort)(unsigned long pc);
> - ? ? ? /*
> - ? ? ? ?* Retrieve prefetch fault address
> - ? ? ? ?*/
> - ? ? ? unsigned long (*_prefetch_abort)(unsigned long lr);
> - ? ? ? /*
> - ? ? ? ?* Set up any processor specifics
> - ? ? ? ?*/
> - ? ? ? void (*_proc_init)(void);
> - ? ? ? /*
> - ? ? ? ?* Disable any processor specifics
> - ? ? ? ?*/
> - ? ? ? void (*_proc_fin)(void);
> - ? ? ? /*
> - ? ? ? ?* Special stuff for a reset
> - ? ? ? ?*/
> - ? ? ? void (*reset)(unsigned long addr) __attribute__((noreturn));
> - ? ? ? /*
> - ? ? ? ?* Idle the processor
> - ? ? ? ?*/
> - ? ? ? int (*_do_idle)(void);
> - ? ? ? /*
> - ? ? ? ?* Processor architecture specific
> - ? ? ? ?*/
> - ? ? ? /*
> - ? ? ? ?* clean a virtual address range from the
> - ? ? ? ?* D-cache without flushing the cache.
> - ? ? ? ?*/
> - ? ? ? void (*dcache_clean_area)(void *addr, int size);
> -
> - ? ? ? /*
> - ? ? ? ?* Set the page table
> - ? ? ? ?*/
> - ? ? ? void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm);
> - ? ? ? /*
> - ? ? ? ?* Set a possibly extended PTE. ?Non-extended PTEs should
> - ? ? ? ?* ignore 'ext'.
> - ? ? ? ?*/
> - ? ? ? void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
> -} processor;
> -
> -#define cpu_proc_init() ? ? ? ? ? ? ? ? ? ? ? ?processor._proc_init()
> -#define cpu_proc_fin() ? ? ? ? ? ? ? ? processor._proc_fin()
> -#define cpu_reset(addr) ? ? ? ? ? ? ? ? ? ? ? ?processor.reset(addr)
> -#define cpu_do_idle() ? ? ? ? ? ? ? ? ?processor._do_idle()
> -#define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz)
> -#define cpu_set_pte_ext(ptep,pte,ext) ?processor.set_pte_ext(ptep,pte,ext)
> -#define cpu_do_switch_mm(pgd,mm) ? ? ? processor.switch_mm(pgd,mm)
> diff --git a/arch/arm/include/asm/cpu-single.h b/arch/arm/include/asm/cpu-single.h
> deleted file mode 100644
> index f073a6d..0000000
> --- a/arch/arm/include/asm/cpu-single.h
> +++ /dev/null
> @@ -1,44 +0,0 @@
> -/*
> - * ?arch/arm/include/asm/cpu-single.h
> - *
> - * ?Copyright (C) 2000 Russell King
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -/*
> - * Single CPU
> - */
> -#ifdef __STDC__
> -#define __catify_fn(name,x) ? ?name##x
> -#else
> -#define __catify_fn(name,x) ? ?name/**/x
> -#endif
> -#define __cpu_fn(name,x) ? ? ? __catify_fn(name,x)
> -
> -/*
> - * If we are supporting multiple CPUs, then we must use a table of
> - * function pointers for this lot. ?Otherwise, we can optimise the
> - * table away.
> - */
> -#define cpu_proc_init ? ? ? ? ? ? ? ? ?__cpu_fn(CPU_NAME,_proc_init)
> -#define cpu_proc_fin ? ? ? ? ? ? ? ? ? __cpu_fn(CPU_NAME,_proc_fin)
> -#define cpu_reset ? ? ? ? ? ? ? ? ? ? ?__cpu_fn(CPU_NAME,_reset)
> -#define cpu_do_idle ? ? ? ? ? ? ? ? ? ?__cpu_fn(CPU_NAME,_do_idle)
> -#define cpu_dcache_clean_area ? ? ? ? ?__cpu_fn(CPU_NAME,_dcache_clean_area)
> -#define cpu_do_switch_mm ? ? ? ? ? ? ? __cpu_fn(CPU_NAME,_switch_mm)
> -#define cpu_set_pte_ext ? ? ? ? ? ? ? ? ? ? ? ?__cpu_fn(CPU_NAME,_set_pte_ext)
> -
> -#include <asm/page.h>
> -
> -struct mm_struct;
> -
> -/* declare all the functions as extern */
> -extern void cpu_proc_init(void);
> -extern void cpu_proc_fin(void);
> -extern int cpu_do_idle(void);
> -extern void cpu_dcache_clean_area(void *, int);
> -extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
> -extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
> -extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
> diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
> new file mode 100644
> index 0000000..0591d35
> --- /dev/null
> +++ b/arch/arm/include/asm/glue-cache.h
> @@ -0,0 +1,146 @@
> +/*
> + * ?arch/arm/include/asm/glue-cache.h
> + *
> + * ?Copyright (C) 1999-2002 Russell King
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef ASM_GLUE_CACHE_H
> +#define ASM_GLUE_CACHE_H
> +
> +#include <asm/glue.h>
> +
> +/*
> + * ? ? Cache Model
> + * ? ? ===========
> + */
> +#undef _CACHE
> +#undef MULTI_CACHE
> +
> +#if defined(CONFIG_CPU_CACHE_V3)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE v3
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_CACHE_V4)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE v4
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
> + ? ?defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
> + ? ?defined(CONFIG_CPU_ARM1026)
> +# define MULTI_CACHE 1
> +#endif
> +
> +#if defined(CONFIG_CPU_FA526)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE fa
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_ARM926T)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE arm926
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_ARM940T)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE arm940
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_ARM946E)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE arm946
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_CACHE_V4WB)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE v4wb
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_XSCALE)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE xscale
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_XSC3)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE xsc3
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_MOHAWK)
> +# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +# else
> +# ?define _CACHE mohawk
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_FEROCEON)
> +# define MULTI_CACHE 1
> +#endif
> +
> +#if defined(CONFIG_CPU_V6)
> +//# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +//# else
> +//# ?define _CACHE v6
> +//# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_V7)
> +//# ifdef _CACHE
> +# ?define MULTI_CACHE 1
> +//# else
> +//# ?define _CACHE v7
> +//# endif
> +#endif
> +
> +#if !defined(_CACHE) && !defined(MULTI_CACHE)
> +#error Unknown cache maintainence model
> +#endif
> +
> +#ifndef MULTI_CACHE
> +#define __cpuc_flush_icache_all ? ? ? ? ? ? ? ?__glue(_CACHE,_flush_icache_all)
> +#define __cpuc_flush_kern_all ? ? ? ? ?__glue(_CACHE,_flush_kern_cache_all)
> +#define __cpuc_flush_user_all ? ? ? ? ?__glue(_CACHE,_flush_user_cache_all)
> +#define __cpuc_flush_user_range ? ? ? ? ? ? ? ?__glue(_CACHE,_flush_user_cache_range)
> +#define __cpuc_coherent_kern_range ? ? __glue(_CACHE,_coherent_kern_range)
> +#define __cpuc_coherent_user_range ? ? __glue(_CACHE,_coherent_user_range)
> +#define __cpuc_flush_dcache_area ? ? ? __glue(_CACHE,_flush_kern_dcache_area)
> +
> +#define dmac_map_area ? ? ? ? ? ? ? ? ?__glue(_CACHE,_dma_map_area)
> +#define dmac_unmap_area ? ? ? ? ? ? ? ? ? ? ? ?__glue(_CACHE,_dma_unmap_area)
> +#define dmac_flush_range ? ? ? ? ? ? ? __glue(_CACHE,_dma_flush_range)
> +#endif
> +
> +#endif
> diff --git a/arch/arm/include/asm/glue-df.h b/arch/arm/include/asm/glue-df.h
> new file mode 100644
> index 0000000..354d571
> --- /dev/null
> +++ b/arch/arm/include/asm/glue-df.h
> @@ -0,0 +1,110 @@
> +/*
> + * ?arch/arm/include/asm/glue-df.h
> + *
> + * ?Copyright (C) 1997-1999 Russell King
> + * ?Copyright (C) 2000-2002 Deep Blue Solutions Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef ASM_GLUE_DF_H
> +#define ASM_GLUE_DF_H
> +
> +#include <asm/glue.h>
> +
> +/*
> + * ? ? Data Abort Model
> + * ? ? ================
> + *
> + * ? ? We have the following to choose from:
> + * ? ? ? arm6 ? ? ? ? ?- ARM6 style
> + * ? ? ? arm7 ? ? ? ? ?- ARM7 style
> + * ? ? ? v4_early ? ? ?- ARMv4 without Thumb early abort handler
> + * ? ? ? v4t_late ? ? ?- ARMv4 with Thumb late abort handler
> + * ? ? ? v4t_early ? ? - ARMv4 with Thumb early abort handler
> + * ? ? ? v5tej_early ? - ARMv5 with Thumb and Java early abort handler
> + * ? ? ? xscale ? ? ? ?- ARMv5 with Thumb with Xscale extensions
> + * ? ? ? v6_early ? ? ?- ARMv6 generic early abort handler
> + * ? ? ? v7_early ? ? ?- ARMv7 generic early abort handler
> + */
> +#undef CPU_DABORT_HANDLER
> +#undef MULTI_DABORT
> +
> +#if defined(CONFIG_CPU_ARM610)
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER cpu_arm6_data_abort
> +# endif
> +#endif
> +
> +#if defined(CONFIG_CPU_ARM710)
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER cpu_arm7_data_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_LV4T
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v4t_late_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_EV4
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v4_early_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_EV4T
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v4t_early_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_EV5TJ
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v5tj_early_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_EV5T
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v5t_early_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_EV6
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v6_early_abort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ABRT_EV7
> +# ifdef CPU_DABORT_HANDLER
> +# ?define MULTI_DABORT 1
> +# else
> +# ?define CPU_DABORT_HANDLER v7_early_abort
> +# endif
> +#endif
> +
> +#ifndef CPU_DABORT_HANDLER
> +#error Unknown data abort handler type
> +#endif
> +
> +#endif
> diff --git a/arch/arm/include/asm/glue-pf.h b/arch/arm/include/asm/glue-pf.h
> new file mode 100644
> index 0000000..d385f37
> --- /dev/null
> +++ b/arch/arm/include/asm/glue-pf.h
> @@ -0,0 +1,57 @@
> +/*
> + * ?arch/arm/include/asm/glue-pf.h
> + *
> + * ?Copyright (C) 1997-1999 Russell King
> + * ?Copyright (C) 2000-2002 Deep Blue Solutions Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef ASM_GLUE_PF_H
> +#define ASM_GLUE_PF_H
> +
> +#include <asm/glue.h>
> +
> +/*
> + * ? ? Prefetch Abort Model
> + * ? ? ================
> + *
> + * ? ? We have the following to choose from:
> + * ? ? ? legacy ? ? ? ?- no IFSR, no IFAR
> + * ? ? ? v6 ? ? ? ? ? ?- ARMv6: IFSR, no IFAR
> + * ? ? ? v7 ? ? ? ? ? ?- ARMv7: IFSR and IFAR
> + */
> +
> +#undef CPU_PABORT_HANDLER
> +#undef MULTI_PABORT
> +
> +#ifdef CONFIG_CPU_PABRT_LEGACY
> +# ifdef CPU_PABORT_HANDLER
> +# ?define MULTI_PABORT 1
> +# else
> +# ?define CPU_PABORT_HANDLER legacy_pabort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_PABRT_V6
> +# ifdef CPU_PABORT_HANDLER
> +# ?define MULTI_PABORT 1
> +# else
> +# ?define CPU_PABORT_HANDLER v6_pabort
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_PABRT_V7
> +# ifdef CPU_PABORT_HANDLER
> +# ?define MULTI_PABORT 1
> +# else
> +# ?define CPU_PABORT_HANDLER v7_pabort
> +# endif
> +#endif
> +
> +#ifndef CPU_PABORT_HANDLER
> +#error Unknown prefetch abort handler type
> +#endif
> +
> +#endif
> diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h
> new file mode 100644
> index 0000000..e3bf443
> --- /dev/null
> +++ b/arch/arm/include/asm/glue-proc.h
> @@ -0,0 +1,261 @@
> +/*
> + * ?arch/arm/include/asm/glue-proc.h
> + *
> + * ?Copyright (C) 1997-1999 Russell King
> + * ?Copyright (C) 2000 Deep Blue Solutions Ltd
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef ASM_GLUE_PROC_H
> +#define ASM_GLUE_PROC_H
> +
> +#include <asm/glue.h>
> +
> +/*
> + * Work out if we need multiple CPU support
> + */
> +#undef MULTI_CPU
> +#undef CPU_NAME
> +
> +/*
> + * CPU_NAME - the prefix for CPU related functions
> + */
> +
> +#ifdef CONFIG_CPU_ARM610
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm6
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM7TDMI
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm7tdmi
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM710
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm7
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM720T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm720
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM740T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm740
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM9TDMI
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm9tdmi
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM920T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm920
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM922T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm922
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_FA526
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_fa526
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM925T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm925
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM926T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm926
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM940T
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm940
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM946E
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm946
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_SA110
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_sa110
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_SA1100
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_sa1100
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM1020
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm1020
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM1020E
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm1020e
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM1022
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm1022
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_ARM1026
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_arm1026
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_XSCALE
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_xscale
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_XSC3
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_xsc3
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_MOHAWK
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_mohawk
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_FEROCEON
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_feroceon
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_V6
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_v6
> +# endif
> +#endif
> +
> +#ifdef CONFIG_CPU_V7
> +# ifdef CPU_NAME
> +# ?undef ?MULTI_CPU
> +# ?define MULTI_CPU
> +# else
> +# ?define CPU_NAME cpu_v7
> +# endif
> +#endif
> +
> +#ifndef MULTI_CPU
> +#define cpu_proc_init ? ? ? ? ? ? ? ? ?__glue(CPU_NAME,_proc_init)
> +#define cpu_proc_fin ? ? ? ? ? ? ? ? ? __glue(CPU_NAME,_proc_fin)
> +#define cpu_reset ? ? ? ? ? ? ? ? ? ? ?__glue(CPU_NAME,_reset)
> +#define cpu_do_idle ? ? ? ? ? ? ? ? ? ?__glue(CPU_NAME,_do_idle)
> +#define cpu_dcache_clean_area ? ? ? ? ?__glue(CPU_NAME,_dcache_clean_area)
> +#define cpu_do_switch_mm ? ? ? ? ? ? ? __glue(CPU_NAME,_switch_mm)
> +#define cpu_set_pte_ext ? ? ? ? ? ? ? ? ? ? ? ?__glue(CPU_NAME,_set_pte_ext)
> +#endif
> +
> +#endif
> diff --git a/arch/arm/include/asm/glue.h b/arch/arm/include/asm/glue.h
> index 234a3fc..0ec35d1 100644
> --- a/arch/arm/include/asm/glue.h
> +++ b/arch/arm/include/asm/glue.h
> @@ -15,7 +15,6 @@
> ?*/
> ?#ifdef __KERNEL__
>
> -
> ?#ifdef __STDC__
> ?#define ____glue(name,fn) ? ? ?name##fn
> ?#else
> @@ -23,141 +22,4 @@
> ?#endif
> ?#define __glue(name,fn) ? ? ? ? ? ? ? ?____glue(name,fn)
>
> -
> -
> -/*
> - * ? ? Data Abort Model
> - * ? ? ================
> - *
> - * ? ? We have the following to choose from:
> - * ? ? ? arm6 ? ? ? ? ?- ARM6 style
> - * ? ? ? arm7 ? ? ? ? ?- ARM7 style
> - * ? ? ? v4_early ? ? ?- ARMv4 without Thumb early abort handler
> - * ? ? ? v4t_late ? ? ?- ARMv4 with Thumb late abort handler
> - * ? ? ? v4t_early ? ? - ARMv4 with Thumb early abort handler
> - * ? ? ? v5tej_early ? - ARMv5 with Thumb and Java early abort handler
> - * ? ? ? xscale ? ? ? ?- ARMv5 with Thumb with Xscale extensions
> - * ? ? ? v6_early ? ? ?- ARMv6 generic early abort handler
> - * ? ? ? v7_early ? ? ?- ARMv7 generic early abort handler
> - */
> -#undef CPU_DABORT_HANDLER
> -#undef MULTI_DABORT
> -
> -#if defined(CONFIG_CPU_ARM610)
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER cpu_arm6_data_abort
> -# endif
> -#endif
> -
> -#if defined(CONFIG_CPU_ARM710)
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER cpu_arm7_data_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_LV4T
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v4t_late_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_EV4
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v4_early_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_EV4T
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v4t_early_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_EV5TJ
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v5tj_early_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_EV5T
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v5t_early_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_EV6
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v6_early_abort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ABRT_EV7
> -# ifdef CPU_DABORT_HANDLER
> -# ?define MULTI_DABORT 1
> -# else
> -# ?define CPU_DABORT_HANDLER v7_early_abort
> -# endif
> -#endif
> -
> -#ifndef CPU_DABORT_HANDLER
> -#error Unknown data abort handler type
> -#endif
> -
> -/*
> - * ? ? Prefetch Abort Model
> - * ? ? ================
> - *
> - * ? ? We have the following to choose from:
> - * ? ? ? legacy ? ? ? ?- no IFSR, no IFAR
> - * ? ? ? v6 ? ? ? ? ? ?- ARMv6: IFSR, no IFAR
> - * ? ? ? v7 ? ? ? ? ? ?- ARMv7: IFSR and IFAR
> - */
> -
> -#undef CPU_PABORT_HANDLER
> -#undef MULTI_PABORT
> -
> -#ifdef CONFIG_CPU_PABRT_LEGACY
> -# ifdef CPU_PABORT_HANDLER
> -# ?define MULTI_PABORT 1
> -# else
> -# ?define CPU_PABORT_HANDLER legacy_pabort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_PABRT_V6
> -# ifdef CPU_PABORT_HANDLER
> -# ?define MULTI_PABORT 1
> -# else
> -# ?define CPU_PABORT_HANDLER v6_pabort
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_PABRT_V7
> -# ifdef CPU_PABORT_HANDLER
> -# ?define MULTI_PABORT 1
> -# else
> -# ?define CPU_PABORT_HANDLER v7_pabort
> -# endif
> -#endif
> -
> -#ifndef CPU_PABORT_HANDLER
> -#error Unknown prefetch abort handler type
> -#endif
> -
> ?#endif
> diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
> index 8fdae9b..6980215 100644
> --- a/arch/arm/include/asm/proc-fns.h
> +++ b/arch/arm/include/asm/proc-fns.h
> @@ -13,248 +13,77 @@
>
> ?#ifdef __KERNEL__
>
> +#include <asm/glue-proc.h>
> +#include <asm/page.h>
>
> -/*
> - * Work out if we need multiple CPU support
> - */
> -#undef MULTI_CPU
> -#undef CPU_NAME
> +#ifndef __ASSEMBLY__
> +
> +struct mm_struct;
>
> ?/*
> - * CPU_NAME - the prefix for CPU related functions
> + * Don't change this structure - ASM code relies on it.
> ?*/
> -
> -#ifdef CONFIG_CPU_ARM610
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm6
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM7TDMI
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm7tdmi
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM710
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm7
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM720T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm720
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM740T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm740
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM9TDMI
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm9tdmi
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM920T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm920
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM922T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm922
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_FA526
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_fa526
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM925T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm925
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM926T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm926
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM940T
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm940
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM946E
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm946
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_SA110
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_sa110
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_SA1100
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_sa1100
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM1020
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm1020
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM1020E
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm1020e
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM1022
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm1022
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_ARM1026
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_arm1026
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_XSCALE
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_xscale
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_XSC3
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_xsc3
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_MOHAWK
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_mohawk
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_FEROCEON
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_feroceon
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_V6
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_v6
> -# endif
> -#endif
> -
> -#ifdef CONFIG_CPU_V7
> -# ifdef CPU_NAME
> -# ?undef ?MULTI_CPU
> -# ?define MULTI_CPU
> -# else
> -# ?define CPU_NAME cpu_v7
> -# endif
> -#endif
> -
> -#ifndef __ASSEMBLY__
> +extern struct processor {
> + ? ? ? /* MISC
> + ? ? ? ?* get data abort address/flags
> + ? ? ? ?*/
> + ? ? ? void (*_data_abort)(unsigned long pc);
> + ? ? ? /*
> + ? ? ? ?* Retrieve prefetch fault address
> + ? ? ? ?*/
> + ? ? ? unsigned long (*_prefetch_abort)(unsigned long lr);
> + ? ? ? /*
> + ? ? ? ?* Set up any processor specifics
> + ? ? ? ?*/
> + ? ? ? void (*_proc_init)(void);
> + ? ? ? /*
> + ? ? ? ?* Disable any processor specifics
> + ? ? ? ?*/
> + ? ? ? void (*_proc_fin)(void);
> + ? ? ? /*
> + ? ? ? ?* Special stuff for a reset
> + ? ? ? ?*/
> + ? ? ? void (*reset)(unsigned long addr) __attribute__((noreturn));
> + ? ? ? /*
> + ? ? ? ?* Idle the processor
> + ? ? ? ?*/
> + ? ? ? int (*_do_idle)(void);
> + ? ? ? /*
> + ? ? ? ?* Processor architecture specific
> + ? ? ? ?*/
> + ? ? ? /*
> + ? ? ? ?* clean a virtual address range from the
> + ? ? ? ?* D-cache without flushing the cache.
> + ? ? ? ?*/
> + ? ? ? void (*dcache_clean_area)(void *addr, int size);
> +
> + ? ? ? /*
> + ? ? ? ?* Set the page table
> + ? ? ? ?*/
> + ? ? ? void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm);
> + ? ? ? /*
> + ? ? ? ?* Set a possibly extended PTE. ?Non-extended PTEs should
> + ? ? ? ?* ignore 'ext'.
> + ? ? ? ?*/
> + ? ? ? void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
> +} processor;
>
> ?#ifndef MULTI_CPU
> -#include <asm/cpu-single.h>
> +extern void cpu_proc_init(void);
> +extern void cpu_proc_fin(void);
> +extern int cpu_do_idle(void);
> +extern void cpu_dcache_clean_area(void *, int);
> +extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
> +extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
> +extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
> ?#else
> -#include <asm/cpu-multi32.h>
> +#define cpu_proc_init() ? ? ? ? ? ? ? ? ? ? ? ?processor._proc_init()
> +#define cpu_proc_fin() ? ? ? ? ? ? ? ? processor._proc_fin()
> +#define cpu_reset(addr) ? ? ? ? ? ? ? ? ? ? ? ?processor.reset(addr)
> +#define cpu_do_idle() ? ? ? ? ? ? ? ? ?processor._do_idle()
> +#define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz)
> +#define cpu_set_pte_ext(ptep,pte,ext) ?processor.set_pte_ext(ptep,pte,ext)
> +#define cpu_do_switch_mm(pgd,mm) ? ? ? processor.switch_mm(pgd,mm)
> ?#endif
>
> ?#include <asm/memory.h>
> diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
> index 82da661..5302a91 100644
> --- a/arch/arm/kernel/asm-offsets.c
> +++ b/arch/arm/kernel/asm-offsets.c
> @@ -13,6 +13,8 @@
> ?#include <linux/sched.h>
> ?#include <linux/mm.h>
> ?#include <linux/dma-mapping.h>
> +#include <asm/glue-df.h>
> +#include <asm/glue-pf.h>
> ?#include <asm/mach/arch.h>
> ?#include <asm/thread_info.h>
> ?#include <asm/memory.h>
> diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
> index 2b46fea..e8d8856 100644
> --- a/arch/arm/kernel/entry-armv.S
> +++ b/arch/arm/kernel/entry-armv.S
> @@ -16,7 +16,8 @@
> ?*/
>
> ?#include <asm/memory.h>
> -#include <asm/glue.h>
> +#include <asm/glue-df.h>
> +#include <asm/glue-pf.h>
> ?#include <asm/vfpmacros.h>
> ?#include <mach/entry-macro.S>
> ?#include <asm/thread_notify.h>
> --
> 1.6.2.5

Acked-by: Colin Cross <ccross@android.com>

Tested on Tegra 2.

^ permalink raw reply

* [PATCH 6/6] ARM: pm: allow generic sleep code to be used with SMP CPU idle
From: Colin Cross @ 2011-02-12  2:52 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <E1PnviF-0002yt-EC@rmk-PC.arm.linux.org.uk>

On Fri, Feb 11, 2011 at 8:19 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> Allow the generic sleep code to be used with SMP CPU idle by storing
> N CPU stack pointers rather than just one.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> ?arch/arm/kernel/sleep.S | ? 26 +++++++++++++++++++++++++-
> ?1 files changed, 25 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
> index 9f106fa..e10618f 100644
> --- a/arch/arm/kernel/sleep.S
> +++ b/arch/arm/kernel/sleep.S
> @@ -25,7 +25,14 @@ ENTRY(cpu_suspend)
> ? ? ? ?stmfd ? sp!, {r1, r2, r3, ip} ? @ save v:p, virt SP, retfn, phys resume fn
> ? ? ? ?ldr ? ? r3, =sleep_save_sp
> ? ? ? ?add ? ? r2, sp, r1 ? ? ? ? ? ? ?@ convert SP to phys
> +#ifdef CONFIG_SMP
> + ? ? ? ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
> + ? ? ? ALT_UP(mov lr, #0)
> + ? ? ? and ? ? lr, lr, #15
> + ? ? ? str ? ? r2, [r3, lr, lsl #2] ? ?@ save phys SP
> +#else
> ? ? ? ?str ? ? r2, [r3] ? ? ? ? ? ? ? ?@ save phys SP
> +#endif
> ? ? ? ?mov ? ? lr, pc
> ? ? ? ?ldr ? ? pc, [r10, #CPU_DO_SUSPEND] @ save CPU state
> ?#else
> @@ -36,7 +43,14 @@ ENTRY(cpu_suspend)
> ? ? ? ?stmfd ? sp!, {r1, r2, r3} ? ? ? @ save v:p, virt SP, return fn
> ? ? ? ?ldr ? ? r3, =sleep_save_sp
> ? ? ? ?add ? ? r2, sp, r1 ? ? ? ? ? ? ?@ convert SP to phys
> +#ifdef CONFIG_SMP
> + ? ? ? ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
> + ? ? ? ALT_UP(mov lr, #0)
> + ? ? ? and ? ? lr, lr, #15
> + ? ? ? str ? ? r2, [r3, lr, lsl #2] ? ?@ save phys SP
> +#else
> ? ? ? ?str ? ? r2, [r3] ? ? ? ? ? ? ? ?@ save phys SP
> +#endif
> ? ? ? ?bl ? ? ?cpu_do_suspend
> ?#endif
>
> @@ -96,7 +110,15 @@ cpu_resume_after_mmu:
> ? ? ? ?.data
> ? ? ? ?.align
> ?ENTRY(cpu_resume)
> +#ifdef CONFIG_SMP
> + ? ? ? adr ? ? r0, sleep_save_sp
> + ? ? ? ALT_SMP(mrc p15, 0, r1, c0, c0, 5)
> + ? ? ? ALT_UP(mov r1, #0)
> + ? ? ? and ? ? r1, r1, #15
> + ? ? ? ldr ? ? r0, [r0, r1, lsl #2] ? ?@ stack phys addr
> +#else
> ? ? ? ?ldr ? ? r0, sleep_save_sp ? ? ? @ stack phys addr
> +#endif
> ? ? ? ?msr ? ? cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
> ?#ifdef MULTI_CPU
> ? ? ? ?ldmia ? r0!, {r1, sp, lr, pc} ? @ load v:p, stack, return fn, resume fn
> @@ -107,4 +129,6 @@ ENTRY(cpu_resume)
> ?ENDPROC(cpu_resume)
>
> ?sleep_save_sp:
> - ? ? ? .word ? 0 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ preserve stack phys ptr here
> + ? ? ? .rept ? CONFIG_NR_CPUS
> + ? ? ? .long ? 0 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ preserve stack phys ptr here
> + ? ? ? .endr
> --
> 1.6.2.5

Acked-by: Colin Cross <ccross@android.com>

Tested with idle and suspend on Tegra 2.

^ permalink raw reply

* [PATCH v2] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration
From: Richard Zhao @ 2011-02-12  5:47 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <19797.16490.726250.924375@ipc1.ka-ro>

On Fri, Feb 11, 2011 at 02:58:02PM +0100, Lothar Wa?mann wrote:
> Hi,
> 
> Richard Zhao writes:
> > On Fri, Feb 11, 2011 at 02:05:21PM +0100, Lothar Wa?mann wrote:
> > > Hi,
> > > 
> > > Richard Zhao writes:
> > > > Hi Julien,
> > > > 
> > > > #define _MX51_PAD_USBH1_DATA2__UART2_TXD	IOMUX_PAD(0x690, 0x290, 1, 0x09ec, 5, 0)
> > > > 
> > > > Will you change the above line too?
> > > > 
> > > Seems like a general copy/paste error in the i.MX51 Ref Manual.
> > > For all pads that can have an UART RXD or TXD function the manual
> > > states that the UART*_IPP_UART_RXD_MUX_SELECT_INPUT register must be
> > > configured, while this is obviously only sensible for the RXD
> > > function.
> > Yes, it's for RXD. RXD can also select input from TXD.
> > 
> The RXD function can be routed to the TXD pads via
> RXD_MUX_SELECT_INPUT, but IMO setting the INPUT_MUX for an OUTPUT
> function (TXD) is nonsense.
> 
> E.g.:
> |Table A-1271. Register: IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT
> |
> |010: Selecting Pad: UART2_RXD for Mode: ALT0.
> |011: Selecting Pad: UART2_TXD for Mode: ALT0.
> so, the input path for the RXD function can be routed to either the
> UART2_RXD or UART2_TXD pad.
Right. I double checked with IC guys. 011 means UART2_TXD/RXD swapped. When
changing mode of DCE/DTE, TXD/RXD and RTS/CTS may need swapped. Using this
setting, you don't need to swap the physical wires.

Thanks
Richard
> 
> |Table A-286. Register IOMUXC_SW_MUX_CTL_PAD_UART2_RXD Bits Description
> |000: Select mux mode: ALT0 mux port: RXD_MUX of instance: uart2.
> |NOTE: Pad UART2_RXD is involved in Daisy Chain.
> |- Config Register IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT for mode
> |ALT0.
> This is OK. RXD_MUX is an input whose source is defined by the
> RXD_MUX_SELECT_INPUT register.
> 
> But:
> |Table A-288. Register IOMUXC_SW_MUX_CTL_PAD_UART2_TXD Bits Description
> |000: Select mux mode: ALT0 mux port: TXD_MUX of instance: uart2.
> |
> |NOTE: Pad UART2_TXD is involved in Daisy Chain.
> |- Config Register IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT for mode
> |ALT0.
> IMO does not make any sense. TXD_MUX is an OUTPUT function.
> How can the INPUT MUX route an OUTPUT PAD?
> 
> Also, the table Table 4-3. i.MX51 Daisy Chain Settings only mentions
> the uart_rxd_mux pins, but not uart_txd_mux.
> 
> 
> Lothar Wa?mann
> -- 
> ___________________________________________________________
> 
> Ka-Ro electronics GmbH | Pascalstra?e 22 | D - 52076 Aachen
> Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10
> Gesch?ftsf?hrer: Matthias Kaussen
> Handelsregistereintrag: Amtsgericht Aachen, HRB 4996
> 
> www.karo-electronics.de | info at karo-electronics.de
> ___________________________________________________________
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* [RFC] Inter-processor Mailboxes Drivers
From: Sundar @ 2011-02-12  6:28 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <4D55A7F7.5090700@mentor.com>

Hi,

On Sat, Feb 12, 2011 at 2:49 AM, Meador Inge <meador_inge@mentor.com> wrote:
>
> ? ?1. Hardware specific bits somewhere under '.../arch/*'. ?Drivers
> ? ? ? for the MPIC message registers on Power and OMAP4 mailboxes, for
> ? ? ? example.

Yes; this can help.

> ? ?2. A higher level driver under '.../drivers/mailbox/*'. ?That the
> ? ? ? pieces in (1) would register with. ?This piece would expose the
> ? ? ? main kernel API.

A lot of mailboxes are too platform specific with regards to the communication
with the main CPU and probably it depends on the mailbox too; you can
find polling and
interrupt supported mailbox support at times on the same platform.
APIs should probably be
generic enough to be able to operate in any context.

> Now I have the following questions:
>
> ? ?1. Do others see value in this?

At least I would like this; I wanted to generalize such mailbox IPCs
right from the
day when I was working on one, but coudnt really work on that.

> ? ?2. Does something like this already exist?

Not generic as you say; but apart from the OMAP platforms,
you could refer to arch/arm/mach-ux500/prcmu for a mailbox based
IPC on the U8500 platform.

> ? ?3. Is someone else already working on this?

Not sure of that too :), but I am CCing Linus W, the maintainer
of U8500 if he thinks it is a good idea to come up with a mailbox IPC
framework

Cheers!
-- 
---------
The views expressed in this email are personal and do not necessarily
echo my employers.

^ permalink raw reply

* [PATCH] omap3: cpuidle: Add description field to each C-state.
From: Santosh Shilimkar @ 2011-02-12  7:42 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110211190723.b93bcb60.jhnikula@gmail.com>

> -----Original Message-----
> From: Jarkko Nikula [mailto:jhnikula at gmail.com]
> Sent: Friday, February 11, 2011 10:37 PM
> To: Santosh Shilimkar
> Cc: linux-omap at vger.kernel.org; khilman at ti.com; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PATCH] omap3: cpuidle: Add description field to each
> C-state.
>
> On Fri, 11 Feb 2011 20:42:12 +0530
> Santosh Shilimkar <santosh.shilimkar@ti.com> wrote:
>
> > Add a description field to each idle C-state. This helps to give
> > better data with PowerTop and one don't have to refer to the code
> > to link what Cx means from system point of view while analysing
> > PowerTop data.
> >
> > No functional change.
> >
> Out of curiosity what powertop version is required to get these
> handy descriptions visible?
>
It should work with most of the power Top version. I have a
older 1.13 version.

> As I see these in /sys/devices/system/cpu/cpu0/cpuidle/stateX/desc
> it's fair to give my tested by
>
> Tested-by: Jarkko Nikula <jhnikula@gmail.com>
Thanks !!

^ permalink raw reply

* [PATCH v3 0/6] Basic ARM devicetree support
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel

Third posting.  v3 reverts the v2 changes to the handling of the dtb
during early init.  The real problem turned out to be using the wrong
function for allocating early memory.  Switching to alloc_bootmem()
fixed the corruption issue.  Memory reservation was never the issue.

v3 also simplifies the handling of reserved memory sections and adds
parsing of the dtb reserved map.

I'm not asking for these patches to be merged into mainline yet, but
I'm fairly confident that they should be pretty close to their final
form.

Not included in this series is Russell's patch to remove early vetting
of the machine type number and Rob's patch to map the region if atags
or the dtb are not within the first 1MB.  However, I am carrying those
patches in my devicetree/arm and devicetree/test branches.

Please test.

...

This patch series allows CONFIG_OF to be enabled on ARM and allows the
kernel to accept a dtb pointer from boot firmware instead of atags.
If a dtb is passed, then the kernel will use the root 'compatible'
property to find a matching machine_desc, and it will use it to obtain
the memory layout, initrd location and kernel parameters string.

Only limited device tree support is enabled here.  It does not perform
any kind of device registration from device tree data.  That support
will be enabled in a later patch set.  Rather, this series is a stable
base that other engineers can use to start working on device tree
support for their platforms.

Tested on Versatile (qemu) and nVidia Tegra Harmony.  Kernel compiles
and boots with CONFIG_OF both on and off, both with and without passing
a device tree blob.

This series is reflected in the following branch (stable; will not be
rebased):

 git://git.secretlab.ca/git/linux-2.6 devicetree/arm

The 'clean' patches (rebased) can be found here:

 git://git.secretlab.ca/git/linux-2.6 devicetree/test

---

Grant Likely (5):
      arm/dt: Make __vet_atags also accept a dtb image
      arm/dt: consolidate atags setup into setup_machine_atags
      arm/dt: probe for platforms via the device tree
      arm/dt: Basic versatile devicetree support
      arm/dt: Basic tegra devicetree support

Jeremy Kerr (1):
      arm/dt: Allow CONFIG_OF on ARM


 arch/arm/Kconfig                       |    7 ++
 arch/arm/include/asm/mach/arch.h       |    2 
 arch/arm/include/asm/prom.h            |   37 +++++++++
 arch/arm/include/asm/setup.h           |    3 +
 arch/arm/kernel/Makefile               |    1 
 arch/arm/kernel/devtree.c              |  136 ++++++++++++++++++++++++++++++++
 arch/arm/kernel/head-common.S          |   24 ++++--
 arch/arm/kernel/head.S                 |    8 +-
 arch/arm/kernel/setup.c                |   78 ++++++++++--------
 arch/arm/mach-tegra/board-harmony.c    |    6 +
 arch/arm/mach-versatile/versatile_ab.c |    6 +
 arch/arm/mach-versatile/versatile_pb.c |    6 +
 arch/arm/mm/init.c                     |   11 +++
 13 files changed, 280 insertions(+), 45 deletions(-)
 create mode 100644 arch/arm/include/asm/prom.h
 create mode 100644 arch/arm/kernel/devtree.c

-- 
Signature

^ permalink raw reply

* [PATCH v3 1/6] arm/dt: Make __vet_atags also accept a dtb image
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110212080634.15682.21141.stgit@localhost6.localdomain6>

The dtb is passed to the kernel via register r2, which is the same
method that is used to pass an atags pointer.  This patch modifies
__vet_atags to not clear r2 when it encounters a dtb image.

v2: fixed bugs pointed out by Nicolas Pitre

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/kernel/head-common.S |   24 ++++++++++++++++++------
 arch/arm/kernel/head.S        |    8 ++++----
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index c84b57d..854bd22 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -15,6 +15,12 @@
 #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
 #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
 
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define OF_DT_MAGIC 0xd00dfeed
+#else
+#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
+#endif
+
 /*
  * Exception handling.  Something went wrong and we can't proceed.  We
  * ought to tell the user, but since we don't have any guarantee that
@@ -28,20 +34,26 @@
 
 /* Determine validity of the r2 atags pointer.  The heuristic requires
  * that the pointer be aligned, in the first 16k of physical RAM and
- * that the ATAG_CORE marker is first and present.  Future revisions
+ * that the ATAG_CORE marker is first and present.  If CONFIG_OF_FLATTREE
+ * is selected, then it will also accept a dtb pointer.  Future revisions
  * of this function may be more lenient with the physical address and
  * may also be able to move the ATAGS block if necessary.
  *
  * Returns:
- *  r2 either valid atags pointer, or zero
+ *  r2 either valid atags pointer, valid dtb pointer, or zero
  *  r5, r6 corrupted
  */
 __vet_atags:
 	tst	r2, #0x3			@ aligned?
 	bne	1f
 
-	ldr	r5, [r2, #0]			@ is first tag ATAG_CORE?
-	cmp	r5, #ATAG_CORE_SIZE
+	ldr	r5, [r2, #0]
+#ifdef CONFIG_OF_FLATTREE
+	ldr	r6, =OF_DT_MAGIC		@ is it a DTB?
+	cmp	r5, r6
+	beq	2f
+#endif
+	cmp	r5, #ATAG_CORE_SIZE		@ is first tag ATAG_CORE?
 	cmpne	r5, #ATAG_CORE_SIZE_EMPTY
 	bne	1f
 	ldr	r5, [r2, #4]
@@ -49,7 +61,7 @@ __vet_atags:
 	cmp	r5, r6
 	bne	1f
 
-	mov	pc, lr				@ atag pointer is ok
+2:	mov	pc, lr				@ atag/dtb pointer is ok
 
 1:	mov	r2, #0
 	mov	pc, lr
@@ -61,7 +73,7 @@ ENDPROC(__vet_atags)
  *
  *  r0  = cp#15 control register
  *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags/dtb pointer
  *  r9  = processor ID
  */
 	__INIT
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 941f6ea..180427d 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -66,7 +66,7 @@
  *
  * This is normally called from the decompressor code.  The requirements
  * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
- * r1 = machine nr, r2 = atags pointer.
+ * r1 = machine nr, r2 = atags or dtb pointer.
  *
  * This code is mostly position independent, so if you link the kernel at
  * 0xc0008000, you call this at __pa(0xc0008000).
@@ -89,7 +89,7 @@ ENTRY(stext)
 	beq	__error_p			@ yes, error 'p'
 
 	/*
-	 * r1 = machine no, r2 = atags,
+	 * r1 = machine no, r2 = atags or dtb,
 	 * r9 = cpuid, r10 = procinfo
 	 */
 	bl	__vet_atags
@@ -347,7 +347,7 @@ __secondary_data:
  *
  *  r0  = cp#15 control register
  *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags or dtb pointer
  *  r4  = page table pointer
  *  r9  = processor ID
  *  r13 = *virtual* address to jump to upon completion
@@ -384,7 +384,7 @@ ENDPROC(__enable_mmu)
  *
  *  r0  = cp#15 control register
  *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags or dtb pointer
  *  r9  = processor ID
  *  r13 = *virtual* address to jump to upon completion
  *

^ permalink raw reply related

* [PATCH v3 2/6] arm/dt: Allow CONFIG_OF on ARM
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110212080634.15682.21141.stgit@localhost6.localdomain6>

From: Jeremy Kerr <jeremy.kerr@canonical.com>

Add some basic empty infrastructure for DT support on ARM.

v3: - moved cmd_line export and initrd setup to this patch to make the
      series bisectable.
    - switched to alloc_bootmem_align() for allocation when
      unflattening the device tree.  memblock_alloc() was not the
      right interface.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/Kconfig             |    7 ++++++
 arch/arm/include/asm/prom.h  |   25 ++++++++++++++++++++++
 arch/arm/include/asm/setup.h |    3 +++
 arch/arm/kernel/Makefile     |    1 +
 arch/arm/kernel/devtree.c    |   47 ++++++++++++++++++++++++++++++++++++++++++
 arch/arm/kernel/setup.c      |    4 ++--
 arch/arm/mm/init.c           |    9 ++++++++
 7 files changed, 94 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/include/asm/prom.h
 create mode 100644 arch/arm/kernel/devtree.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165..d8a330f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1586,6 +1586,13 @@ endmenu
 
 menu "Boot options"
 
+config USE_OF
+	bool "Flattened Device Tree support"
+	select OF
+	select OF_EARLY_FLATTREE
+	help
+	  Include support for flattened device tree machine descriptions.
+
 # Compressed boot loader in ROM.  Yes, we really want to ask about
 # TEXT and BSS so we preserve their values in the config files.
 config ZBOOT_ROM_TEXT
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
new file mode 100644
index 0000000..8f1037f
--- /dev/null
+++ b/arch/arm/include/asm/prom.h
@@ -0,0 +1,25 @@
+/*
+ *  arch/arm/include/asm/prom.h
+ *
+ *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ASMARM_PROM_H
+#define __ASMARM_PROM_H
+
+#ifdef CONFIG_OF
+
+#include <asm/setup.h>
+#include <asm/irq.h>
+
+static inline void irq_dispose_mapping(unsigned int virq)
+{
+	return;
+}
+
+#endif /* CONFIG_OF */
+#endif /* ASMARM_PROM_H */
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index f1e5a9b..1cec82a 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -221,6 +221,9 @@ extern struct meminfo meminfo;
 #define bank_phys_end(bank)	((bank)->start + (bank)->size)
 #define bank_phys_size(bank)	(bank)->size
 
+extern int arm_add_memory(unsigned long start, unsigned long size);
+extern char cmd_line[COMMAND_LINE_SIZE];
+
 #endif  /*  __KERNEL__  */
 
 #endif
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 185ee82..8df05fd 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_ARM_THUMBEE)	+= thumbee.o
 obj-$(CONFIG_KGDB)		+= kgdb.o
 obj-$(CONFIG_ARM_UNWIND)	+= unwind.o
 obj-$(CONFIG_HAVE_TCM)		+= tcm.o
+obj-$(CONFIG_OF)		+= devtree.o
 obj-$(CONFIG_CRASH_DUMP)	+= crash_dump.o
 obj-$(CONFIG_SWP_EMULATE)	+= swp_emulate.o
 CFLAGS_swp_emulate.o		:= -Wa,-march=armv7-a
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
new file mode 100644
index 0000000..75e3df8
--- /dev/null
+++ b/arch/arm/kernel/devtree.c
@@ -0,0 +1,47 @@
+/*
+ *  linux/arch/arm/kernel/devtree.c
+ *
+ *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/bootmem.h>
+#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/setup.h>
+#include <asm/page.h>
+
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+	arm_add_memory(base, size);
+}
+
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+{
+	return alloc_bootmem_align(size, align);
+}
+
+/**
+ * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
+ *
+ * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
+ * mapped 1:1 onto Linux irq numbers.  Cascaded irq controllers are not
+ * supported.
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+				   const u32 *intspec, unsigned int intsize)
+{
+	return intspec[0];
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 78678b0..0c692c7 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -125,7 +125,7 @@ EXPORT_SYMBOL(elf_platform);
 
 static const char *cpu_name;
 static const char *machine_name;
-static char __initdata cmd_line[COMMAND_LINE_SIZE];
+char cmd_line[COMMAND_LINE_SIZE];
 struct machine_desc *machine_desc __initdata;
 
 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
@@ -480,7 +480,7 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
 	return list;
 }
 
-static int __init arm_add_memory(unsigned long start, unsigned long size)
+int __init arm_add_memory(unsigned long start, unsigned long size)
 {
 	struct membank *bank = &meminfo.bank[meminfo.nr_banks];
 
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index cddd684..a2ba1d1 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -15,6 +15,7 @@
 #include <linux/mman.h>
 #include <linux/nodemask.h>
 #include <linux/initrd.h>
+#include <linux/of_fdt.h>
 #include <linux/highmem.h>
 #include <linux/gfp.h>
 #include <linux/memblock.h>
@@ -71,6 +72,14 @@ static int __init parse_tag_initrd2(const struct tag *tag)
 
 __tagtable(ATAG_INITRD2, parse_tag_initrd2);
 
+#ifdef CONFIG_OF_FLATTREE
+void __init early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end)
+{
+	phys_initrd_start = start;
+	phys_initrd_size = end - start + 1;
+}
+#endif /* CONFIG_OF_FLATTREE */
+
 /*
  * This keeps memory configuration data used by a couple memory
  * initialization functions, as well as show_mem() for the skipping

^ permalink raw reply related

* [PATCH v3 3/6] arm/dt: consolidate atags setup into setup_machine_atags
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110212080634.15682.21141.stgit@localhost6.localdomain6>

In preparation for adding device tree support, this patch consolidates
all of the atag-specific setup into a single function.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/kernel/setup.c |   68 ++++++++++++++++++++++++-----------------------
 1 files changed, 35 insertions(+), 33 deletions(-)

diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 0c692c7..7bc7a27 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -461,25 +461,6 @@ void cpu_init(void)
 	    : "r14");
 }
 
-static struct machine_desc * __init setup_machine(unsigned int nr)
-{
-	struct machine_desc *list;
-
-	/*
-	 * locate machine in the list of supported machines.
-	 */
-	list = lookup_machine_type(nr);
-	if (!list) {
-		printk("Machine configuration botched (nr %d), unable "
-		       "to continue.\n", nr);
-		while (1);
-	}
-
-	printk("Machine: %s\n", list->name);
-
-	return list;
-}
-
 int __init arm_add_memory(unsigned long start, unsigned long size)
 {
 	struct membank *bank = &meminfo.bank[meminfo.nr_banks];
@@ -833,21 +814,23 @@ static void __init squash_mem_tags(struct tag *tag)
 			tag->hdr.tag = ATAG_NONE;
 }
 
-void __init setup_arch(char **cmdline_p)
+static struct machine_desc * __init setup_machine_tags(unsigned int nr)
 {
 	struct tag *tags = (struct tag *)&init_tags;
 	struct machine_desc *mdesc;
 	char *from = default_command_line;
 
-	unwind_init();
-
-	setup_processor();
-	mdesc = setup_machine(machine_arch_type);
-	machine_desc = mdesc;
-	machine_name = mdesc->name;
+	/*
+	 * locate machine in the list of supported machines.
+	 */
+	mdesc = lookup_machine_type(nr);
+	if (!mdesc) {
+		printk("Machine configuration botched (nr %d), unable "
+		       "to continue.\n", nr);
+		while (1);
+	}
 
-	if (mdesc->soft_reboot)
-		reboot_setup("s");
+	printk("Machine: %s\n", mdesc->name);
 
 	if (__atags_pointer)
 		tags = phys_to_virt(__atags_pointer);
@@ -875,16 +858,35 @@ void __init setup_arch(char **cmdline_p)
 		parse_tags(tags);
 	}
 
-	init_mm.start_code = (unsigned long) _text;
-	init_mm.end_code   = (unsigned long) _etext;
-	init_mm.end_data   = (unsigned long) _edata;
-	init_mm.brk	   = (unsigned long) _end;
-
 	/* parse_early_param needs a boot_command_line */
 	strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
 
 	/* populate cmd_line too for later use, preserving boot_command_line */
 	strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
+
+	return mdesc;
+}
+
+
+void __init setup_arch(char **cmdline_p)
+{
+	struct machine_desc *mdesc;
+
+	unwind_init();
+
+	setup_processor();
+	mdesc = setup_machine_tags(machine_arch_type);
+	machine_desc = mdesc;
+	machine_name = mdesc->name;
+
+	if (mdesc->soft_reboot)
+		reboot_setup("s");
+
+	init_mm.start_code = (unsigned long) _text;
+	init_mm.end_code   = (unsigned long) _etext;
+	init_mm.end_data   = (unsigned long) _edata;
+	init_mm.brk	   = (unsigned long) _end;
+
 	*cmdline_p = cmd_line;
 
 	parse_early_param();

^ permalink raw reply related

* [PATCH v3 4/6] arm/dt: probe for platforms via the device tree
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110212080634.15682.21141.stgit@localhost6.localdomain6>

If a dtb is passed to the kernel then the kernel needs to iterate
through compiled-in mdescs looking for one that matches and move the
dtb data to a safe location before it gets accidentally overwritten by
the kernel.

This patch creates a new function, setup_machine_fdt() which is
analogous to the setup_machine_atags() created in the previous patch.
It does all the early setup needed to use a device tree machine
description.

v3: - Added processing of reserved list.
    - Backed out the v2 change that copied instead of reserved the
      dtb.  dtb is reserved again and the real problem was fixed by
      using alloc_bootmem_align() for early allocation of RAM for
      unflattening the tree.
    - Moved cmd_line and initrd changes to earlier patch to make series
      bisectable.
v2: Changed to save the dtb by copying into an allocated buffer.
    - Since the dtb will very likely be passed in the first 16k of ram
      where the interrupt vectors live, memblock_reserve() is
      insufficient to protect the dtb data.
[based on work originally written by Jeremy Kerr <jeremy.kerr@canonical.com>]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/include/asm/mach/arch.h |    2 +
 arch/arm/include/asm/prom.h      |   12 +++++
 arch/arm/kernel/devtree.c        |   89 ++++++++++++++++++++++++++++++++++++++
 arch/arm/kernel/setup.c          |    8 +++
 arch/arm/mm/init.c               |    2 +
 5 files changed, 112 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 3a0893a..2ed24e7 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -22,6 +22,8 @@ struct machine_desc {
 	unsigned int		nr;		/* architecture number	*/
 	const char		*name;		/* architecture name	*/
 	unsigned long		boot_params;	/* tagged list		*/
+	const char		**dt_compat;	/* array of device tree
+						 * 'compatible' strings	*/
 
 	unsigned int		nr_irqs;	/* number of IRQs */
 
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 8f1037f..11b8708 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -21,5 +21,17 @@ static inline void irq_dispose_mapping(unsigned int virq)
 	return;
 }
 
+extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
+extern void arm_dt_memblock_reserve(void);
+
+#else /* CONFIG_OF */
+
+static inline struct machine_desc *setup_machine_fdt(unsigned int dt_phys)
+{
+	return NULL;
+}
+
+static inline void arm_dt_memblock_reserve(void) { }
+
 #endif /* CONFIG_OF */
 #endif /* ASMARM_PROM_H */
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 75e3df8..f5b6f1d 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -21,6 +21,8 @@
 
 #include <asm/setup.h>
 #include <asm/page.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
 
 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 {
@@ -32,6 +34,33 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 	return alloc_bootmem_align(size, align);
 }
 
+void __init arm_dt_memblock_reserve(void)
+{
+	u64 *reserve_map, base, size;
+
+	if (!initial_boot_params)
+		return;
+
+	/* Reserve the dtb region */
+	memblock_reserve(virt_to_phys(initial_boot_params),
+			 be32_to_cpu(initial_boot_params->totalsize));
+
+	/*
+	 * Process the reserve map.  This will probably overlap the initrd
+	 * and dtb locations which are already reserved, but overlaping
+	 * doesn't hurt anything
+	 */
+	reserve_map = ((void*)initial_boot_params) +
+			be32_to_cpu(initial_boot_params->off_mem_rsvmap);
+	while (1) {
+		base = be64_to_cpup(reserve_map++);
+		size = be64_to_cpup(reserve_map++);
+		if (!size)
+			break;
+		memblock_reserve(base, size);
+	}
+}
+
 /**
  * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
  *
@@ -45,3 +74,63 @@ unsigned int irq_create_of_mapping(struct device_node *controller,
 	return intspec[0];
 }
 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+extern struct machine_desc __arch_info_begin, __arch_info_end;
+
+/**
+ * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
+ * @dt_phys: physical address of dt blob
+ *
+ * If a dtb was passed to the kernel in r2, then use it to choose the
+ * correct machine_desc and to setup the system.
+ */
+struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
+{
+	struct boot_param_header *devtree;
+	struct machine_desc *mdesc, *mdesc_best = NULL;
+	unsigned int score, mdesc_score = ~1;
+	unsigned long dt_root;
+	const char *model;
+
+	devtree = phys_to_virt(dt_phys);
+
+	/* check device tree validity */
+	if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
+		return NULL;
+
+	/* Search the mdescs for the 'best' compatible value match */
+	initial_boot_params = devtree;
+	dt_root = of_get_flat_dt_root();
+	for (mdesc = &__arch_info_begin; mdesc < &__arch_info_end; mdesc++) {
+		score = of_flat_dt_match(dt_root, mdesc->dt_compat);
+		if (score > 0 && score < mdesc_score) {
+			mdesc_best = mdesc;
+			mdesc_score = score;
+		}
+	}
+	if (!mdesc_best) {
+		printk("Machine not supported, unable to continue.\n");
+		while (1);
+	}
+
+	model = of_get_flat_dt_prop(dt_root, "model", NULL);
+	if (!model)
+		model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
+	if (!model)
+		model = "<unknown>";
+	pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
+
+	/* Retrieve various information from the /chosen node */
+	of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
+	/* Initialize {size,address}-cells info */
+	of_scan_flat_dt(early_init_dt_scan_root, NULL);
+	/* Setup memory, calling early_init_dt_add_memory_arch */
+	of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+	/* Save command line for /proc/cmdline  */
+	strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
+
+	/* Change machine number to match the mdesc we're using */
+	__machine_arch_type = mdesc->nr;
+
+	return mdesc_best;
+}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7bc7a27..3d737a0 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -20,6 +20,7 @@
 #include <linux/screen_info.h>
 #include <linux/init.h>
 #include <linux/kexec.h>
+#include <linux/of_fdt.h>
 #include <linux/crash_dump.h>
 #include <linux/root_dev.h>
 #include <linux/cpu.h>
@@ -42,6 +43,7 @@
 #include <asm/cachetype.h>
 #include <asm/tlbflush.h>
 
+#include <asm/prom.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
@@ -875,7 +877,9 @@ void __init setup_arch(char **cmdline_p)
 	unwind_init();
 
 	setup_processor();
-	mdesc = setup_machine_tags(machine_arch_type);
+	mdesc = setup_machine_fdt(__atags_pointer);
+	if (!mdesc)
+		mdesc = setup_machine_tags(machine_arch_type);
 	machine_desc = mdesc;
 	machine_name = mdesc->name;
 
@@ -896,6 +900,8 @@ void __init setup_arch(char **cmdline_p)
 	paging_init(mdesc);
 	request_standard_resources(mdesc);
 
+	unflatten_device_tree();
+
 #ifdef CONFIG_SMP
 	if (is_smp())
 		smp_init_cpus();
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index a2ba1d1..8e3387c 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -22,6 +22,7 @@
 #include <linux/sort.h>
 
 #include <asm/mach-types.h>
+#include <asm/prom.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
@@ -322,6 +323,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
 #endif
 
 	arm_mm_memblock_reserve();
+	arm_dt_memblock_reserve();
 
 	/* reserve any platform specific memblock areas */
 	if (mdesc->reserve)

^ permalink raw reply related

* [PATCH v3 5/6] arm/dt: Basic versatile devicetree support
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110212080634.15682.21141.stgit@localhost6.localdomain6>

This patch adds adds very basic support for booting versatile with a
device tree.  It simply allows the existing machine_descs to match
against the versatile ab & pb compatible values so that the kernel can
boot.  Kernel parameters and the initrd pointer is read out of the
tree instead of atags.

This is not complete device tree support.  This change will be
reverted when a new machine_desc is added that can populate the
versatile device registrations directly from data in the tree instead
of using hard coded data.  That change will be made in a future patch.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/mach-versatile/versatile_ab.c |    6 ++++++
 arch/arm/mach-versatile/versatile_pb.c |    6 ++++++
 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index aa9730f..62053df 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -33,6 +33,11 @@
 
 #include "core.h"
 
+static const char *versatile_ab_match[] __initdata = {
+	"arm,versatile-ab",
+	NULL,
+};
+
 MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.boot_params	= 0x00000100,
@@ -40,4 +45,5 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
 	.init_irq	= versatile_init_irq,
 	.timer		= &versatile_timer,
 	.init_machine	= versatile_init,
+	.dt_compat	= versatile_ab_match,
 MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index bf46964..eba12fa 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -106,6 +106,11 @@ static void __init versatile_pb_init(void)
 	}
 }
 
+static const char *versatile_pb_match[] __initdata = {
+	"arm,versatile-pb",
+	NULL,
+};
+
 MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.boot_params	= 0x00000100,
@@ -113,4 +118,5 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
 	.init_irq	= versatile_init_irq,
 	.timer		= &versatile_timer,
 	.init_machine	= versatile_pb_init,
+	.dt_compat	= versatile_pb_match,
 MACHINE_END

^ permalink raw reply related

* [PATCH v3 6/6] arm/dt: Basic tegra devicetree support
From: Grant Likely @ 2011-02-12  8:14 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20110212080634.15682.21141.stgit@localhost6.localdomain6>

This patch adds adds very basic support for booting tegra with a
device tree.  It simply allows the existing machine_descs to match
against the tegra compatible values so that the kernel can boot.
Kernel parameters and the initrd pointer is read out of the tree
instead of atags.

This is not complete device tree support.  This change will be
reverted when a new machine_desc is added that can populate the
device registrations directly from data in the tree instead of using
hard coded data.  That change will be made in a future patch.

v2: Fixed cut-and-paste error in commit text

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/mach-tegra/board-harmony.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index b9dbdb1..99884e9 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -113,6 +113,11 @@ static void __init tegra_harmony_init(void)
 	platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
 }
 
+static const char * tegra_harmony_board_compat[] = {
+	"nvidia,harmony",
+	NULL
+};
+
 MACHINE_START(HARMONY, "harmony")
 	.boot_params  = 0x00000100,
 	.fixup		= tegra_harmony_fixup,
@@ -120,4 +125,5 @@ MACHINE_START(HARMONY, "harmony")
 	.init_machine   = tegra_harmony_init,
 	.map_io         = tegra_map_common_io,
 	.timer          = &tegra_timer,
+	.dt_compat      = tegra_harmony_board_compat,
 MACHINE_END

^ permalink raw reply related

* mc13xxx-core, support for i2c, V4
From: Grant Likely @ 2011-02-12  8:40 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1294119299-18352-1-git-send-email-marc@cpdesign.com.au>

On Tue, Jan 04, 2011 at 04:34:55PM +1100, Marc Reilly wrote:
> Hi,
> 
> These patches add i2c support for the mc13xxx-core drive. For v4 I've tried to take
> in all previous comments, hopefully making it better to follow, and bisectable.

This series looks okay to me.  Since this is audio drivers, I expect
that it would best be taken via the ASoC tree?  Have you sent it to
Mark Brown and the ALSA list for review?

g.

^ permalink raw reply

* [PATCH] omap4: Fix ULPI PHY init for ES1.0 SDP (Re: 4430SDP boot failure)
From: Santosh Shilimkar @ 2011-02-12  8:46 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <cace62268ad657586f07ecbb0e6a99ab@mail.gmail.com>

Tony,
> -----Original Message-----
> From: Santosh Shilimkar [mailto:santosh.shilimkar at ti.com]
> Sent: Thursday, February 03, 2011 2:13 PM
> To: Tony Lindgren
> Cc: Anand Gadiyar; Russell King - ARM Linux; linux-arm-
> kernel at lists.infradead.org; linux-omap at vger.kernel.org; Keshava
> Munegowda; Felipe Balbi
> Subject: RE: [PATCH] omap4: Fix ULPI PHY init for ES1.0 SDP (Re:
> 4430SDP boot failure)
>
> > -----Original Message-----
> > From: Tony Lindgren [mailto:tony at atomide.com]
> > Sent: Thursday, February 03, 2011 1:19 AM
> > To: Santosh Shilimkar
> > Cc: Anand Gadiyar; Russell King - ARM Linux; linux-arm-
> > kernel at lists.infradead.org; linux-omap at vger.kernel.org; Keshava
> > Munegowda; Felipe Balbi
> > Subject: Re: [PATCH] omap4: Fix ULPI PHY init for ES1.0 SDP (Re:
> > 4430SDP boot failure)
> >
> > * Santosh Shilimkar <santosh.shilimkar@ti.com> [110201 22:04]:
> > > >
> > > > It's a ES1.0 blaze, with the patch below it reboots early
> > > > during the boot. I also have to disable omap_l2_cache_init
> > > > on this board to get it to boot.
> > > >
> > > Do you still get this problem with 'omap_l2_cache_init' ?
> > > As reported earlier, we don't see this issue on ES1.0
> > > SDP.
> >
> > Yeah I do, it rarely makes it to the userspace. Works reliably
> > if I disable omap_l2_cache_init.
> >
> Ok. I shall try few experiments and try to reproduce it

Not sure if it's the same issue but I managed to reproduce the
issue on ES2.0 itself. And after some experiments, it boiled
down to the V6 and V7 issue. By disabling OMAP2 from the build,
everything was fine again.

Regards,
Santosh

^ permalink raw reply


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